Stanislav Shwartsman
a4c47d9559
added helper function to stringify EFLAGS as well and reuse it in Bochs debugger
2024-10-23 12:43:50 +03:00
Stanislav Shwartsman
2dfdd98ccf
improve debug print after simulation finishes
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add detailed print for CR0, CR4, XCR0 and EFER extensions
2024-10-23 12:15:02 +03:00
Stanislav Shwartsman
36b9cd93cf
enable more bits in MSR IA32_SPEC_CTRL to support Win11 boot in Sapphire Rapids and Arrow Lake CPU models
2024-10-23 11:14:23 +03:00
Stanislav Shwartsman
d69acea2c0
fix name of the processor in the warning message
2024-10-23 10:48:24 +03:00
Stanislav Shwartsman
f90201b603
added ArrowLake CPU definition
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features: AVX-VNNI, AVX-IFMA, AVX-VNNI-INT8, AVX-VNNI-INT16, AVX_NE_CONVERT, GFNI, VAES/VPCLMULQDQ, SHA512, SM3/SM4, CMPCCXADD, LASS, SERIALIZE, UINTR
update CHANGES
2024-10-23 10:20:23 +03:00
Stanislav Shwartsman
5c81b532a2
opcodes with EVEX.LLIG could come with any VL value and still will be allowed on AVX10.VL256 only machine
2024-10-22 23:27:00 +03:00
Stanislav Shwartsman
1f6436499d
add AVX10.256 emulation VMX control
2024-10-22 22:15:41 +03:00
Stanislav Shwartsman
6717e8255d
add XSAVE/XRSTOR support for AVX10.256
2024-10-22 21:43:57 +03:00
Stanislav Shwartsman
8469fcade1
make assignHandler member function for cleaner code
2024-10-22 21:09:16 +03:00
Stanislav Shwartsman
5bff389409
fix complation with minimalistic configuration which has no CPUID yet
2024-10-22 20:55:33 +03:00
Stanislav Shwartsman
60f8ab2a36
add preliminary AVX10.1 handling
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AVX10.1 includes the following AVX extensions:
x86_feature(BX_ISA_AVX512, "avx512") /* AVX-512 instruction */
x86_feature(BX_ISA_AVX512_DQ, "avx512dq") /* AVX-512DQ instruction */
x86_feature(BX_ISA_AVX512_BW, "avx512bw") /* AVX-512 Byte/Word instruction */
x86_feature(BX_ISA_AVX512_CD, "avx512cd") /* AVX-512 Conflict Detection instruction */
x86_feature(BX_ISA_AVX512_VBMI, "avx512vbmi") /* AVX-512 VBMI : Vector Bit Manipulation Instructions */
x86_feature(BX_ISA_AVX512_VBMI2, "avx512vbmi2") /* AVX-512 VBMI2 : Vector Bit Manipulation Instructions */
x86_feature(BX_ISA_AVX512_IFMA52, "avx512ifma52") /* AVX-512 IFMA52 Instructions */
x86_feature(BX_ISA_AVX512_VPOPCNTDQ, "avx512vpopcnt") /* AVX-512 VPOPCNTD/VPOPCNTQ Instructions */
x86_feature(BX_ISA_AVX512_VNNI, "avx512vnni") /* AVX-512 VNNI Instructions */
x86_feature(BX_ISA_AVX512_BITALG, "avx512bitalg") /* AVX-512 BITALG Instructions */
x86_feature(BX_ISA_AVX512_BF16, "avx512bf16") /* AVX-512 BF16 Instructions */
x86_feature(BX_ISA_AVX512_FP16, "avx512fp16") /* AVX-512 FP16 Instructions */
And it could be handling 256-bit only, in this case avx10_1 will be enabled but avx10_vl512 will not.
Bochs will support all relevant instructions but without 512 bit mode in this case, attemp to encode VL512 in EVEX will result in #UD
also added support for AVX10 CPUID leaf 0x24
TODO: VMX support
2024-10-22 20:44:46 +03:00
Stanislav Shwartsman
3db8404a03
correctly report CPUID leafs 0x19-0x1c as reserved on Sappire Rapids CPUID with AMX enabled
2024-10-22 12:51:14 +03:00
Cacodemon345
f6617f29d6
UHCI: do not deactivate TDs on NAKs ( #362 )
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NAKs from USB devices do not deactivate TDs according to the official
UHCI spec (page 22).
Reference: http://ftp.netbsd.org/pub/NetBSD/misc/blymn/uhci11d.pdf
2024-10-21 16:10:19 +02:00
Volker Ruppert
ffb3b43268
Cirrus: Fixed banking and hardware cursor in VGA compatible modes.
2024-10-20 19:44:14 +02:00
Volker Ruppert
d5e89aa731
Cirrus: Fixed uninitialized variable.
2024-10-20 16:32:47 +02:00
Stanislav Shwartsman
8c053ca361
added initial code for AMX_MOVRS instructions
2024-10-20 11:08:58 +03:00
Stanislav Shwartsman
3de88be5ac
comment out avx512pf and avx512er ISA extensions which not supported by Bochs
2024-10-20 10:49:29 +03:00
Stanislav Shwartsman
4ceb60f12b
better code formating
2024-10-19 20:17:07 +03:00
Stanislav Shwartsman
e8d5f983fb
replace long_mul function in wide_int.cc with much faster code from softfloat3e
2024-10-19 18:26:07 +03:00
Stanislav Shwartsman
987e205fb0
implement AMX_TF32 extension
2024-10-19 10:15:38 +03:00
Stanislav Shwartsman
690441e0cb
fix issue #363 (spurious physical memory read error message)
2024-10-18 18:17:59 +03:00
Stanislav Shwartsman
de7862a3f9
updates to CPUID definitions published in Intel ISA extensions rev54 doc
2024-10-18 17:37:54 +03:00
Volker Ruppert
60491a64cf
Cirrus: Added horizontal pixel panning support for 8, 15 and 16 bpp modes.
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Original Cirrus VGABIOS uses this feature in VBE function 0x07 since the
screen start address is dword aligned. It's only documented for standard VGA,
but not for the extended Cirrus modes.
TODO: Implement this in the LGPL'd VGABIOS.
2024-10-17 19:33:06 +02:00
Volker Ruppert
a1d6e72b1b
Continued work on GTK USB debugger (tree now shown).
2024-10-13 10:08:35 +02:00
Stanislav Shwartsman
67a9bffb42
updates for CPUID definitions
2024-10-12 18:07:28 +03:00
Stanislav Shwartsman
b5665c39da
CMPCCXADD instructions can be executed only in 64-bit mode
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configure and compile them only for 64-bit mode as well
2024-10-12 17:22:14 +03:00
Volker Ruppert
ab89d23f06
Cirrus: Don't decrement height if redraw area contiues on the left of the display.
2024-10-06 09:56:10 +02:00
Volker Ruppert
85c58ff450
Cirrus: Modified redraw code added for #221 to fix stack overflow ( #358 ).
2024-10-04 09:22:01 +02:00
Volker Ruppert
9054a9c998
Cirrus PCI: Discard extra bytes at BitBLT writes if necessary ( #357 ).
2024-10-03 19:11:56 +02:00
Volker Ruppert
4a32e42230
Continued work on GTK USB debugger (First step to implement treeview).
2024-10-01 12:09:32 +02:00
Volker Ruppert
3ca671ca80
Banshee/Voodoo3: Added 16 bpp to 32 bpp pixel format conversion
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for screen-to-screen bitblt operation (big endian code untested).
2024-09-22 17:05:11 +02:00
Volker Ruppert
e1a160e81e
Cirrus: Added support for graphics controller mode extensions in VGA mode.
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Now the GD5446 PCI driver and the GD5430 ISA driver work correctly.
Attempt to fix hardware cursor in VGA mode. The specs don't say anything about
this case, but this version works now with 640x480 resolution.
2024-09-21 10:39:27 +02:00
Vort
750548365d
Fix big-endian support in bx_banshee_c::mem_read ( #354 )
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Byte reversing code in commit 52c2fbee5e
uses `8` bit shift, while `3` bit shift should be used instead.
Tested with Debian 7 _([hdd
image](https://people.debian.org/~aurel32/qemu/powerpc/ ))_ inside of
QEMU PowerPC emulation:
![qemu_bochs_win311_voodoo](https://github.com/user-attachments/assets/097f70b7-95aa-4e4f-857b-53e0c6fdafdf )
2024-09-21 07:49:29 +03:00
Volker Ruppert
52c2fbee5e
Banshee / Voodoo3: Added support for mem_read() with length 3.
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This should fix Voodoo3 with Windows 3.11 driver.
2024-09-19 20:22:30 +02:00
Volker Ruppert
0fe6799544
Cirrus: Attempt to fix hardware cursor drawing in the VGA case.
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NOTE: This doesn't fix the issues with Windows 3.11 driver yet.
Renamed VGA core memsize_mask to vgamem_mask to avoid confusion.
Attempt to fix hardware cursor for indexed host displays.
2024-09-19 19:02:52 +02:00
Volker Ruppert
d4cee9c360
Cirrus: Added 8 bpp display update code for VGA mode with hardware cursor.
2024-09-18 17:19:25 +02:00
Volker Ruppert
ec469aa626
Cirrus: Added display update code for VGA mode with hardware cursor.
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TODO: Fixup mem_read / mem_write for this case. The display has some issues
and the cursor pattern is not yet written to memory top.
2024-09-17 20:44:22 +02:00
Volker Ruppert
48824a452b
Partly fixed Cirrus PCI issues found with Windows 3.11 driver.
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Implemented byte swapping apertures for word and dword in mem_write_handler().
This fixes missing / unreadable text in 8 bpp and 16 bpp modes.
TODO: 4 bpp and 24 bpp issues with this driver.
2024-09-13 18:00:04 +02:00
Volker Ruppert
bfebb17b9d
Fixed Voodoo3 issue found with Diablo II game ( #349 ).
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If front and back buffer addresses are identical, 'video_changed' flag must be set.
2024-09-11 16:29:40 +02:00
Volker Ruppert
f5e3dd9dce
Added JSR and RET functions to CMDFIFO (Voodoo2/Banshee/Voodoo3).
2024-09-08 20:52:40 +02:00
Volker Ruppert
79c820e7b1
win32 gui: fixed dimension_update() for 15 bpp modes.
2024-09-08 07:01:26 +02:00
Volker Ruppert
9c57f1d211
Banshee / Voodoo3: Attempt to fix issue #337 .
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Use real resolution to perform address wrap check.
2024-09-05 12:50:29 +02:00
Stanislav Shwartsman
ea8d06b97e
update msrs.def to avoid Windows boot dealing with these MSRs
2024-09-01 23:00:08 +03:00
Stanislav Shwartsman
5d2d4220b7
fixed err message format string
2024-09-01 22:33:11 +03:00
Stanislav Shwartsman
de278480fa
XSAVEC/XSAVES: Fixed corruption of MXCSR/x87 state by SSE state save in XSAVEC/XSAVES instructions (bug introduced in release 2.8)
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added explicit BX_ERROR message into bochs log when MXCSR restore error occur
2024-09-01 21:34:01 +03:00
Stanislav Shwartsman
af8e6c08ad
djust indentation
2024-08-31 20:13:23 +03:00
Stanislav Shwartsman
8d6ac222fe
update CHANGES with CPU fixes done
2024-08-31 17:44:43 +03:00
Stanislav Shwartsman
67b83db1d2
fixed implementation of SHA1RNDS4 instruction
2024-08-31 17:29:10 +03:00
Volker Ruppert
0138ad4114
ES1370: fixing status register access makes mixer work ( #336 ).
2024-08-25 10:53:50 +02:00
Volker Ruppert
a6ceeb7cd1
Fixed initializing of USB debugger options.
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It should not segfault if no USB HC option is used before.
2024-08-23 21:25:34 +02:00