Commit Graph

116 Commits

Author SHA1 Message Date
Stanislav Shwartsman
65b8712d04 More tuning of SSE 2002-11-14 19:59:29 +00:00
Stanislav Shwartsman
5803e20240 Changed policy of SSE/SSE2 checking 2002-11-13 21:00:05 +00:00
Stanislav Shwartsman
0df9c9af85 Implemented integer SSE2 instructions:
PSRLW_PdqIb
PSRLD_PdqIb
PSRLQ_PdqIb
PSLLW_PdqIb
PSLLD_PdqIb
PSLLQ_PdqIb
PSRAW_PdqIb
PSRAD_PdqIb
PSRLW_VdqWdq
PSRLD_VdqWdq
PSRLQ_VdqWdq
PSRAW_PdqWdq
PSRAD_PdqWdq
PSLLW_VdqWdq
PSLLD_VdqWdq
PSLLQ_VdqWdq
PMOVMSKB_GdVRdq
PMULUDQ_VdqWdq
PMINUB_VdqWdq
PMINSW_VdqWdq
PMAXUB_VdqWdq
PMAXSW_VdqWdq

Fixed bug in the PMINUB_PqQq and PMAXUB_PqQq SSE instructions
2002-11-08 17:47:46 +00:00
Stanislav Shwartsman
4363745725 Implemented SSE2 integer instructions:
PACKSSDW_VdqWdq
PUNPCKHDQ_VdqWq
PUNPCKHWD_VdqWq
PUNPCKHBW_VdqWq
PUNPCKHQDQ_VdqWq
MOVD_EdVd
MOVD_VdqEd
2002-11-08 12:47:24 +00:00
Stanislav Shwartsman
b200ff2058 Implemented several integer SSE2 instructions (similar to the MMX):
PACKSSWB_VdqWq
PCMPGTB_VdqWq
PCMPGTW_VdqWq
PCMPGTD_VdqWdq
PACKUSWB_VdqWdq
PCMPEQB_VdqWdq
PCMPEQW_VdqWdq
PCMPEQD_VdqWdq
PADDQ_VdqWdq
PSUBUSB_VdqWdq
PSUBUSW_VdqWdq
PAND_VdqWdq
PANDN_VdqWdq
PAVGB_VdqWdq
PAVGW_VdqWdq
POR_VdqWdq
PXOR_VdqWdq
PSUBB_VdqWdq
PSUBW_VdqWdq
PSUBD_VdqWdq
PSUBQ_VdqWdq
PADDB_VdqWdq
PADDW_VdqWdq
PADDD_VdqWdq
PADDQ_VdqWdq
2002-11-07 22:41:34 +00:00
Stanislav Shwartsman
0e60aa8232 We will need integer saturation functions also in SSE2 instructions 2002-11-02 12:35:33 +00:00
Stanislav Shwartsman
277f14dd76 Implemented PMOVMSKB_GdPRq instruction (SSE) 2002-10-19 21:46:07 +00:00
Stanislav Shwartsman
63ac78d496 Implemented MOVNTQ instruction 2002-10-19 21:28:50 +00:00
Stanislav Shwartsman
21201bc237 Add opcode name to the information message in case of MMX/SSE/SSE2 instruction is not supported 2002-10-19 20:16:42 +00:00
Stanislav Shwartsman
194952a53d Merged BOCHS-SSE branch 2002-10-16 17:37:35 +00:00
Kevin Lawton
66452e9898 Replaced tabs in cpu/*.{cc,h} files with spaces. 2002-10-04 17:04:33 +00:00
Kevin Lawton
402d02974d Moved the EFLAGS.RF check and clearing of inhibit_mask code
in cpu.cc out of the main loop, and into the asynchronous
events handling.  I went through all the code paths, and
there doesn't seem to be any reason for that code to be
in the hot loop.

Added another accessor for getting instruction data, called
modC0().  A lot of instructions test whether the mod field
of mod-nnn-rm is 0xc0 or not, ie., it's a register operation
and not memory.  So I flag this in fetchdecode{,64}.cc.
This added on the order of 1% performance improvement for
a Win95 boot.

Macroized a few leftover calls to Write_RMV_virtual_xyz()
that didn't get modified in the x86-64 merge.  Really, they
just call the real function for now, but I want to have them
available to do direct writes with the guest2host TLB pointers.
2002-09-20 03:52:59 +00:00
Kevin Lawton
6723ca9bf4 Moved more separate fields in the bxInstruction_c into bitfields
with accessors.  Had to touch a number of files to update the
access using the new accessors.

Moved rm_addr to the CPU structure, to slim down bxInstruction_c
and to prevent future instruction caching from getting sprayed
with writes to individual rm_addr fields.  There only needs to
be one.  Though need to deal with instructions which have
static non-modrm addresses, but which are using rm_addr since
that will change.

bxInstruction_c is down to about 40 bytes now.  Trying to
get down to 24 bytes.
2002-09-18 05:36:48 +00:00
Kevin Lawton
07b0df2a8a Updated accessing of modrm/sib addressing information to
use accessors.  This lets me work on compressing the
size of fetch-decode structure (now called bxInstruction_c).

I've reduced it down to about 76 bytes.  We should be able
to do much better soon.  I needed the abstraction of the
accessors, so I have a lot of freedom to re-arrange things
without making massive future changes.

Lost a few percent of performance in these mods, but my
main focus was to get the abstraction.
2002-09-17 22:50:53 +00:00
Kevin Lawton
1e22357b06 Very small #ifdef mods so that all the static functions would
be compiled out, when MMX is not enabled for a compile.  Eliminates
the unused warnings from the compiler.
2002-09-09 17:13:13 +00:00
Bryce Denney
be659a09b3 - check in Stanislav Shwartsman's patch "bochs-mmx.patch-endian-support".
He writes: Detailed description: MMX instruction set support.
  Also supports BIG_ENDIAN systems. Tested on Solaris and HP1100.
- modified files:
    configure.in cpu/Makefile.in cpu/cpu.h cpu/fetchdecode.cc
    cpu/proc_ctrl.cc fpu/fpu_system.h fpu/wmFPUemu_glue.cc
- added files: cpu/i387.h cpu/mmx.cc
2002-09-09 16:11:25 +00:00