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- check in Stanislav Shwartsman's patch "bochs-mmx.patch-endian-support".

Browse Source 
He writes: Detailed description: MMX instruction set support.
  Also supports BIG_ENDIAN systems. Tested on Solaris and HP1100.
- modified files:
    configure.in cpu/Makefile.in cpu/cpu.h cpu/fetchdecode.cc
    cpu/proc_ctrl.cc fpu/fpu_system.h fpu/wmFPUemu_glue.cc
- added files: cpu/i387.h cpu/mmx.cc
This commit is contained in:
Bryce Denney 2002-09-09 16:11:25 +00:00
parent 19ed21c9b0
commit be659a09b3
9 changed files with 2288 additions and 157 deletions
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19
bochs/configure.in
View File

@ -2,7 +2,7 @@ dnl // Process this file with autoconf to produce a configure script.
AC_PREREQ(2.4)
AC_INIT(bochs.h)
AC_REVISION([[$Id: configure.in,v 1.94 2002-09-05 19:59:20 bdenney Exp $]])
AC_REVISION([[$Id: configure.in,v 1.95 2002-09-09 16:11:23 bdenney Exp $]])
AC_CONFIG_HEADER(config.h)
dnl // Put Bochs version information right here so that it gets substituted
@ -927,6 +927,23 @@ AC_ARG_ENABLE(mmx,
]
)
AC_MSG_CHECKING(for MMX support)
AC_ARG_ENABLE(mmx,
[ --enable-mmx compile in MMX emulation],
[if test "$enableval" = yes; then
AC_MSG_RESULT(yes)
AC_DEFINE(BX_SUPPORT_MMX, 1)
elif test "$enableval" = no; then
AC_MSG_RESULT(no)
AC_DEFINE(BX_SUPPORT_MMX, 0)
fi
],
[
AC_MSG_RESULT(no)
AC_DEFINE(BX_SUPPORT_MMX, 0)
]
)
AC_MSG_CHECKING(for FPU emulation)
FPU_VAR=''
FPU_GLUE_OBJ=''

12
bochs/cpu/Makefile.in
View File

@ -48,7 +48,7 @@ APIC_OBJS = @APIC_OBJS@
OBJS = \
init.o \
access.o \
cpu.o resolve32.o fetchdecode.o \
cpu.o mmx.o resolve32.o fetchdecode.o \
exception.o \
ctrl_xfer_pro.o \
flag_ctrl_pro.o \
@ -214,6 +214,16 @@ cpu.o: cpu.@CPP_SUFFIX@ ../bochs.h ../config.h ../osdep.h ../debug/debug.h \
../iodev/unmapped.h ../iodev/eth.h ../iodev/ne2k.h \
../iodev/guest2host.h ../iodev/slowdown_timer.h \
../instrument/stubs/instrument.h
mmx.o: mmx.@CPP_SUFFIX@ ../bochs.h ../config.h ../osdep.h ../debug/debug.h \
../bxversion.h ../gui/siminterface.h ../state_file.h ../cpu/cpu.h \
../cpu/lazy_flags.h ../memory/memory.h ../pc_system.h ../gui/gui.h \
../gui/control.h ../iodev/iodev.h ../iodev/pci.h ../iodev/vga.h \
../iodev/cmos.h ../iodev/dma.h ../iodev/floppy.h ../iodev/harddrv.h \
../iodev/keyboard.h ../iodev/parallel.h ../iodev/pic.h ../iodev/pit.h \
../iodev/pit_wrap.h ../iodev/pit82c54.h ../iodev/serial.h \
../iodev/unmapped.h ../iodev/eth.h ../iodev/ne2k.h \
../iodev/guest2host.h ../iodev/slowdown_timer.h \
../instrument/stubs/instrument.h
ctrl_xfer16.o: ctrl_xfer16.@CPP_SUFFIX@ ../bochs.h ../config.h ../osdep.h \
../debug/debug.h ../bxversion.h ../gui/siminterface.h ../state_file.h \
../cpu/cpu.h ../cpu/lazy_flags.h ../memory/memory.h ../pc_system.h \

89
bochs/cpu/cpu.h
View File

@ -1,5 +1,5 @@
/////////////////////////////////////////////////////////////////////////
// $Id: cpu.h,v 1.37 2002-09-08 04:08:14 kevinlawton Exp $
// $Id: cpu.h,v 1.38 2002-09-09 16:11:23 bdenney Exp $
/////////////////////////////////////////////////////////////////////////
//
// Copyright (C) 2001 MandrakeSoft S.A.
@ -729,6 +729,8 @@ typedef void (*BxDTShim_t)(void);
class BX_MEM_C;
#include "cpu/i387.h"
class BX_CPU_C : public logfunctions {
public: // for now...
@ -829,6 +831,8 @@ public: // for now...
bx_regs_msr_t msr;
#endif
i387_t the_i387;
// pointer to the address space that this processor uses.
BX_MEM_C *mem;
@ -1303,6 +1307,71 @@ public: // for now...
BX_SMF void ESC6(BxInstruction_t *);
BX_SMF void ESC7(BxInstruction_t *);
/* MMX */
BX_SMF void PUNPCKLBW_PqQd(BxInstruction_t *i);
BX_SMF void PUNPCKLWD_PqQd(BxInstruction_t *i);
BX_SMF void PUNPCKLDQ_PqQd(BxInstruction_t *i);
BX_SMF void PACKSSWB_PqQq(BxInstruction_t *i);
BX_SMF void PCMPGTB_PqQq(BxInstruction_t *i);
BX_SMF void PCMPGTW_PqQq(BxInstruction_t *i);
BX_SMF void PCMPGTD_PqQq(BxInstruction_t *i);
BX_SMF void PACKUSWB_PqQq(BxInstruction_t *i);
BX_SMF void PUNPCKHBW_PqQq(BxInstruction_t *i);
BX_SMF void PUNPCKHWD_PqQq(BxInstruction_t *i);
BX_SMF void PUNPCKHDQ_PqQq(BxInstruction_t *i);
BX_SMF void PACKSSDW_PqQq(BxInstruction_t *i);
BX_SMF void MOVD_PqEd(BxInstruction_t *i);
BX_SMF void MOVQ_PqQq(BxInstruction_t *i);
BX_SMF void PCMPEQB_PqQq(BxInstruction_t *i);
BX_SMF void PCMPEQW_PqQq(BxInstruction_t *i);
BX_SMF void PCMPEQD_PqQq(BxInstruction_t *i);
BX_SMF void EMMS(BxInstruction_t *i);
BX_SMF void MOVD_EdPd(BxInstruction_t *i);
BX_SMF void MOVQ_QqPq(BxInstruction_t *i);
BX_SMF void PSRLW_PqQq(BxInstruction_t *i);
BX_SMF void PSRLD_PqQq(BxInstruction_t *i);
BX_SMF void PSRLQ_PqQq(BxInstruction_t *i);
BX_SMF void PMULLW_PqQq(BxInstruction_t *i);
BX_SMF void PSUBUSB_PqQq(BxInstruction_t *i);
BX_SMF void PSUBUSW_PqQq(BxInstruction_t *i);
BX_SMF void PAND_PqQq(BxInstruction_t *i);
BX_SMF void PADDUSB_PqQq(BxInstruction_t *i);
BX_SMF void PADDUSW_PqQq(BxInstruction_t *i);
BX_SMF void PANDN_PqQq(BxInstruction_t *i);
BX_SMF void PSRAW_PqQq(BxInstruction_t *i);
BX_SMF void PSRAD_PqQq(BxInstruction_t *i);
BX_SMF void PMULHW_PqQq(BxInstruction_t *i);
BX_SMF void PSUBSB_PqQq(BxInstruction_t *i);
BX_SMF void PSUBSW_PqQq(BxInstruction_t *i);
BX_SMF void POR_PqQq(BxInstruction_t *i);
BX_SMF void PADDSB_PqQq(BxInstruction_t *i);
BX_SMF void PADDSW_PqQq(BxInstruction_t *i);
BX_SMF void PXOR_PqQq(BxInstruction_t *i);
BX_SMF void PSLLW_PqQq(BxInstruction_t *i);
BX_SMF void PSLLD_PqQq(BxInstruction_t *i);
BX_SMF void PSLLQ_PqQq(BxInstruction_t *i);
BX_SMF void PMADDWD_PqQq(BxInstruction_t *i);
BX_SMF void PSUBB_PqQq(BxInstruction_t *i);
BX_SMF void PSUBW_PqQq(BxInstruction_t *i);
BX_SMF void PSUBD_PqQq(BxInstruction_t *i);
BX_SMF void PADDB_PqQq(BxInstruction_t *i);
BX_SMF void PADDW_PqQq(BxInstruction_t *i);
BX_SMF void PADDD_PqQq(BxInstruction_t *i);
BX_SMF void PSRLW_PqIb(BxInstruction_t *i);
BX_SMF void PSRAW_PqIb(BxInstruction_t *i);
BX_SMF void PSLLW_PqIb(BxInstruction_t *i);
BX_SMF void PSRLD_PqIb(BxInstruction_t *i);
BX_SMF void PSRAD_PqIb(BxInstruction_t *i);
BX_SMF void PSLLD_PqIb(BxInstruction_t *i);
BX_SMF void PSRLQ_PqIb(BxInstruction_t *i);
BX_SMF void PSLLQ_PqIb(BxInstruction_t *i);
/* MMX */
#if BX_SUPPORT_MMX
BX_SMF void PrepareMmxInstruction(void);
BX_SMF void PrintMmxRegisters(void);
#endif
BX_SMF void fpu_execute(BxInstruction_t *i);
BX_SMF void fpu_init(void);
BX_SMF void fpu_print_regs (void);
@ -1634,6 +1703,8 @@ public: // for now...
BX_SMF BX_CPP_INLINE Bit8u get_CPL(void);
BX_SMF BX_CPP_INLINE Bit32u get_EIP(void);
BX_SMF BX_CPP_INLINE int which_cpu(void);
#if BX_CPU_LEVEL >= 2
BX_SMF BX_CPP_INLINE Boolean real_mode(void);
#endif
@ -1655,6 +1726,14 @@ public: // for now...
#define BX_HWDebugMemRW 0x03
#endif
BX_SMF BX_CPP_INLINE int BX_CPU_C_PREFIX which_cpu(void)
{
#if (BX_SMP_PROCESSORS==1)
return 0;
#else
return local_apic.get_id();
#endif
}
#if BX_SMP_PROCESSORS==1
// single processor simulation, so there's one of everything
@ -1939,7 +2018,13 @@ BX_CPU_C::set_PF_base(Bit8u val) {
#define BxGroup7 BxGroupN
#define BxGroup8 BxGroupN
#define BxGroup9 BxGroupN
#define BxGroupa BxGroupN
#define BxGroupA BxGroupN
#if BX_SUPPORT_MMX
#define BxAnotherMMX BxAnother
#else
#define BxAnotherMMX (0)
#endif
#if BX_DEBUGGER
typedef enum _show_flags {

268
bochs/cpu/fetchdecode.cc
View File

@ -1,5 +1,5 @@
/////////////////////////////////////////////////////////////////////////
// $Id: fetchdecode.cc,v 1.8 2002-09-03 04:54:28 kevinlawton Exp $
// $Id: fetchdecode.cc,v 1.9 2002-09-09 16:11:24 bdenney Exp $
/////////////////////////////////////////////////////////////////////////
//
// Copyright (C) 2001 MandrakeSoft S.A.
@ -344,6 +344,40 @@ static BxOpcodeInfo_t BxOpcodeInfoG9[8] = {
/* 7 */ { 0, &BX_CPU_C::BxError }
};
#if BX_SUPPORT_MMX
static BxOpcodeInfo_t BxOpcodeInfoGAw[8] = { /* MMX */
/* 0 */ { 0, &BX_CPU_C::BxError },
/* 1 */ { 0, &BX_CPU_C::BxError },
/* 2 */ { BxImmediate_Ib, &BX_CPU_C::PSRLW_PqIb },
/* 3 */ { 0, &BX_CPU_C::BxError },
/* 4 */ { BxImmediate_Ib, &BX_CPU_C::PSRAW_PqIb },
/* 5 */ { 0, &BX_CPU_C::BxError },
/* 6 */ { BxImmediate_Ib, &BX_CPU_C::PSLLW_PqIb },
/* 7 */ { 0, &BX_CPU_C::BxError }
};
static BxOpcodeInfo_t BxOpcodeInfoGAd[8] = { /* MMX */
/* 0 */ { 0, &BX_CPU_C::BxError },
/* 1 */ { 0, &BX_CPU_C::BxError },
/* 2 */ { BxImmediate_Ib, &BX_CPU_C::PSRLD_PqIb },
/* 3 */ { 0, &BX_CPU_C::BxError },
/* 4 */ { BxImmediate_Ib, &BX_CPU_C::PSRAD_PqIb },
/* 5 */ { 0, &BX_CPU_C::BxError },
/* 6 */ { BxImmediate_Ib, &BX_CPU_C::PSLLD_PqIb },
/* 7 */ { 0, &BX_CPU_C::BxError }
};
static BxOpcodeInfo_t BxOpcodeInfoGAq[8] = { /* MMX */
/* 0 */ { 0, &BX_CPU_C::BxError },
/* 1 */ { 0, &BX_CPU_C::BxError },
/* 2 */ { BxImmediate_Ib, &BX_CPU_C::PSRLQ_PqIb },
/* 3 */ { 0, &BX_CPU_C::BxError },
/* 4 */ { 0, &BX_CPU_C::BxError },
/* 5 */ { 0, &BX_CPU_C::BxError },
/* 6 */ { BxImmediate_Ib, &BX_CPU_C::PSLLQ_PqIb },
/* 7 */ { 0, &BX_CPU_C::BxError }
};
#endif
// 512 entries for 16bit mode
// 512 entries for 32bit mode
@ -703,38 +737,44 @@ static BxOpcodeInfo_t BxOpcodeInfo[512*2] = {
/* 0F 5D */ { 0, &BX_CPU_C::BxError },
/* 0F 5E */ { 0, &BX_CPU_C::BxError },
/* 0F 5F */ { 0, &BX_CPU_C::BxError },
/* 0F 60 */ { 0, &BX_CPU_C::BxError },
/* 0F 61 */ { 0, &BX_CPU_C::BxError },
/* 0F 62 */ { 0, &BX_CPU_C::BxError },
/* 0F 63 */ { 0, &BX_CPU_C::BxError },
/* 0F 64 */ { 0, &BX_CPU_C::BxError },
/* 0F 65 */ { 0, &BX_CPU_C::BxError },
/* 0F 66 */ { 0, &BX_CPU_C::BxError },
/* 0F 67 */ { 0, &BX_CPU_C::BxError },
/* 0F 68 */ { 0, &BX_CPU_C::BxError },
/* 0F 69 */ { 0, &BX_CPU_C::BxError },
/* 0F 6A */ { 0, &BX_CPU_C::BxError },
/* 0F 6B */ { 0, &BX_CPU_C::BxError },
/* 0F 60 */ { BxAnotherMMX, &BX_CPU_C::PUNPCKLBW_PqQd }, /* MMX */
/* 0F 61 */ { BxAnotherMMX, &BX_CPU_C::PUNPCKLWD_PqQd }, /* MMX */
/* 0F 62 */ { BxAnotherMMX, &BX_CPU_C::PUNPCKLDQ_PqQd }, /* MMX */
/* 0F 63 */ { BxAnotherMMX, &BX_CPU_C::PACKSSWB_PqQq }, /* MMX */
/* 0F 64 */ { BxAnotherMMX, &BX_CPU_C::PCMPGTB_PqQq }, /* MMX */
/* 0F 65 */ { BxAnotherMMX, &BX_CPU_C::PCMPGTW_PqQq }, /* MMX */
/* 0F 66 */ { BxAnotherMMX, &BX_CPU_C::PCMPGTD_PqQq }, /* MMX */
/* 0F 67 */ { BxAnotherMMX, &BX_CPU_C::PACKUSWB_PqQq }, /* MMX */
/* 0F 68 */ { BxAnotherMMX, &BX_CPU_C::PUNPCKHBW_PqQq }, /* MMX */
/* 0F 69 */ { BxAnotherMMX, &BX_CPU_C::PUNPCKHWD_PqQq }, /* MMX */
/* 0F 6A */ { BxAnotherMMX, &BX_CPU_C::PUNPCKHDQ_PqQq }, /* MMX */
/* 0F 6B */ { BxAnotherMMX, &BX_CPU_C::PACKSSDW_PqQq }, /* MMX */
/* 0F 6C */ { 0, &BX_CPU_C::BxError },
/* 0F 6D */ { 0, &BX_CPU_C::BxError },
/* 0F 6E */ { 0, &BX_CPU_C::BxError },
/* 0F 6F */ { 0, &BX_CPU_C::BxError },
/* 0F 6E */ { BxAnotherMMX, &BX_CPU_C::MOVD_PqEd }, /* MMX */
/* 0F 6F */ { BxAnotherMMX, &BX_CPU_C::MOVQ_PqQq }, /* MMX */
/* 0F 70 */ { 0, &BX_CPU_C::BxError },
#if BX_SUPPORT_MMX
/* 0F 71 */ { BxAnother | BxGroupA, NULL, BxOpcodeInfoGAw },
/* 0F 72 */ { BxAnother | BxGroupA, NULL, BxOpcodeInfoGAd },
/* 0F 73 */ { BxAnother | BxGroupA, NULL, BxOpcodeInfoGAq },
#else
/* 0F 71 */ { 0, &BX_CPU_C::BxError },
/* 0F 72 */ { 0, &BX_CPU_C::BxError },
/* 0F 73 */ { 0, &BX_CPU_C::BxError },
/* 0F 74 */ { 0, &BX_CPU_C::BxError },
/* 0F 75 */ { 0, &BX_CPU_C::BxError },
/* 0F 76 */ { 0, &BX_CPU_C::BxError },
/* 0F 77 */ { 0, &BX_CPU_C::BxError },
#endif
/* 0F 74 */ { BxAnotherMMX, &BX_CPU_C::PCMPEQB_PqQq }, /* MMX */
/* 0F 75 */ { BxAnotherMMX, &BX_CPU_C::PCMPEQW_PqQq }, /* MMX */
/* 0F 76 */ { BxAnotherMMX, &BX_CPU_C::PCMPEQD_PqQq }, /* MMX */
/* 0F 77 */ { 0, &BX_CPU_C::EMMS }, /* MMX */
/* 0F 78 */ { 0, &BX_CPU_C::BxError },
/* 0F 79 */ { 0, &BX_CPU_C::BxError },
/* 0F 7A */ { 0, &BX_CPU_C::BxError },
/* 0F 7B */ { 0, &BX_CPU_C::BxError },
/* 0F 7C */ { 0, &BX_CPU_C::BxError },
/* 0F 7D */ { 0, &BX_CPU_C::BxError },
/* 0F 7E */ { 0, &BX_CPU_C::BxError },
/* 0F 7F */ { 0, &BX_CPU_C::BxError },
/* 0F 7E */ { BxAnotherMMX, &BX_CPU_C::MOVD_EdPd }, /* MMX */
/* 0F 7F */ { BxAnotherMMX, &BX_CPU_C::MOVQ_QqPq }, /* MMX */
/* 0F 80 */ { BxImmediate_BrOff16, &BX_CPU_C::JCC_Jw },
/* 0F 81 */ { BxImmediate_BrOff16, &BX_CPU_C::JCC_Jw },
/* 0F 82 */ { BxImmediate_BrOff16, &BX_CPU_C::JCC_Jw },
@ -816,53 +856,53 @@ static BxOpcodeInfo_t BxOpcodeInfo[512*2] = {
/* 0F CE */ { 0, &BX_CPU_C::BSWAP_ESI },
/* 0F CF */ { 0, &BX_CPU_C::BSWAP_EDI },
/* 0F D0 */ { 0, &BX_CPU_C::BxError },
/* 0F D1 */ { 0, &BX_CPU_C::BxError },
/* 0F D2 */ { 0, &BX_CPU_C::BxError },
/* 0F D3 */ { 0, &BX_CPU_C::BxError },
/* 0F D1 */ { BxAnotherMMX, &BX_CPU_C::PSRLW_PqQq }, /* MMX */
/* 0F D2 */ { BxAnotherMMX, &BX_CPU_C::PSRLD_PqQq }, /* MMX */
/* 0F D3 */ { BxAnotherMMX, &BX_CPU_C::PSRLQ_PqQq }, /* MMX */
/* 0F D4 */ { 0, &BX_CPU_C::BxError },
/* 0F D5 */ { 0, &BX_CPU_C::BxError },
/* 0F D5 */ { BxAnotherMMX, &BX_CPU_C::PMULLW_PqQq }, /* MMX */
/* 0F D6 */ { 0, &BX_CPU_C::BxError },
/* 0F D7 */ { 0, &BX_CPU_C::BxError },
/* 0F D8 */ { 0, &BX_CPU_C::BxError },
/* 0F D9 */ { 0, &BX_CPU_C::BxError },
/* 0F D8 */ { BxAnotherMMX, &BX_CPU_C::PSUBUSB_PqQq }, /* MMX */
/* 0F D9 */ { BxAnotherMMX, &BX_CPU_C::PSUBUSW_PqQq }, /* MMX */
/* 0F DA */ { 0, &BX_CPU_C::BxError },
/* 0F DB */ { 0, &BX_CPU_C::BxError },
/* 0F DC */ { 0, &BX_CPU_C::BxError },
/* 0F DD */ { 0, &BX_CPU_C::BxError },
/* 0F DB */ { BxAnotherMMX, &BX_CPU_C::PAND_PqQq }, /* MMX */
/* 0F DC */ { BxAnotherMMX, &BX_CPU_C::PADDUSB_PqQq }, /* MMX */
/* 0F DD */ { BxAnotherMMX, &BX_CPU_C::PADDUSW_PqQq }, /* MMX */
/* 0F DE */ { 0, &BX_CPU_C::BxError },
/* 0F DF */ { 0, &BX_CPU_C::BxError },
/* 0F DF */ { BxAnotherMMX, &BX_CPU_C::PANDN_PqQq }, /* MMX */
/* 0F E0 */ { 0, &BX_CPU_C::BxError },
/* 0F E1 */ { 0, &BX_CPU_C::BxError },
/* 0F E2 */ { 0, &BX_CPU_C::BxError },
/* 0F E1 */ { BxAnotherMMX, &BX_CPU_C::PSRAW_PqQq }, /* MMX */
/* 0F E2 */ { BxAnotherMMX, &BX_CPU_C::PSRAD_PqQq }, /* MMX */
/* 0F E3 */ { 0, &BX_CPU_C::BxError },
/* 0F E4 */ { 0, &BX_CPU_C::BxError },
/* 0F E5 */ { 0, &BX_CPU_C::BxError },
/* 0F E5 */ { BxAnotherMMX, &BX_CPU_C::PMULHW_PqQq }, /* MMX */
/* 0F E6 */ { 0, &BX_CPU_C::BxError },
/* 0F E7 */ { 0, &BX_CPU_C::BxError },
/* 0F E8 */ { 0, &BX_CPU_C::BxError },
/* 0F E9 */ { 0, &BX_CPU_C::BxError },
/* 0F E8 */ { BxAnotherMMX, &BX_CPU_C::PSUBSB_PqQq }, /* MMX */
/* 0F E9 */ { BxAnotherMMX, &BX_CPU_C::PSUBSW_PqQq }, /* MMX */
/* 0F EA */ { 0, &BX_CPU_C::BxError },
/* 0F EB */ { 0, &BX_CPU_C::BxError },
/* 0F EC */ { 0, &BX_CPU_C::BxError },
/* 0F ED */ { 0, &BX_CPU_C::BxError },
/* 0F EB */ { BxAnotherMMX, &BX_CPU_C::POR_PqQq }, /* MMX */
/* 0F EC */ { BxAnotherMMX, &BX_CPU_C::PADDSB_PqQq }, /* MMX */
/* 0F ED */ { BxAnotherMMX, &BX_CPU_C::PADDSW_PqQq }, /* MMX */
/* 0F EE */ { 0, &BX_CPU_C::BxError },
/* 0F EF */ { 0, &BX_CPU_C::BxError },
/* 0F F0 */ { 0, &BX_CPU_C::UndefinedOpcode },
/* 0F F1 */ { 0, &BX_CPU_C::UndefinedOpcode },
/* 0F F2 */ { 0, &BX_CPU_C::UndefinedOpcode },
/* 0F F3 */ { 0, &BX_CPU_C::UndefinedOpcode },
/* 0F F4 */ { 0, &BX_CPU_C::UndefinedOpcode },
/* 0F F5 */ { 0, &BX_CPU_C::UndefinedOpcode },
/* 0F F6 */ { 0, &BX_CPU_C::UndefinedOpcode },
/* 0F F7 */ { 0, &BX_CPU_C::UndefinedOpcode },
/* 0F F8 */ { 0, &BX_CPU_C::UndefinedOpcode },
/* 0F F9 */ { 0, &BX_CPU_C::UndefinedOpcode },
/* 0F FA */ { 0, &BX_CPU_C::UndefinedOpcode },
/* 0F FB */ { 0, &BX_CPU_C::UndefinedOpcode },
/* 0F FC */ { 0, &BX_CPU_C::UndefinedOpcode },
/* 0F FD */ { 0, &BX_CPU_C::UndefinedOpcode },
/* 0F FE */ { 0, &BX_CPU_C::UndefinedOpcode },
/* 0F FF */ { 0, &BX_CPU_C::UndefinedOpcode },
/* 0F EF */ { BxAnotherMMX, &BX_CPU_C::PXOR_PqQq }, /* MMX */
/* 0F F0 */ { 0, &BX_CPU_C::BxError },
/* 0F F1 */ { BxAnotherMMX, &BX_CPU_C::PSLLW_PqQq }, /* MMX */
/* 0F F2 */ { BxAnotherMMX, &BX_CPU_C::PSLLD_PqQq }, /* MMX */
/* 0F F3 */ { BxAnotherMMX, &BX_CPU_C::PSLLQ_PqQq }, /* MMX */
/* 0F F4 */ { 0, &BX_CPU_C::BxError },
/* 0F F5 */ { BxAnotherMMX, &BX_CPU_C::PMADDWD_PqQq }, /* MMX */
/* 0F F6 */ { 0, &BX_CPU_C::BxError },
/* 0F F7 */ { 0, &BX_CPU_C::BxError },
/* 0F F8 */ { BxAnotherMMX, &BX_CPU_C::PSUBB_PqQq }, /* MMX */
/* 0F F9 */ { BxAnotherMMX, &BX_CPU_C::PSUBW_PqQq }, /* MMX */
/* 0F FA */ { BxAnotherMMX, &BX_CPU_C::PSUBD_PqQq }, /* MMX */
/* 0F FB */ { 0, &BX_CPU_C::BxError },
/* 0F FC */ { BxAnotherMMX, &BX_CPU_C::PADDB_PqQq }, /* MMX */
/* 0F FD */ { BxAnotherMMX, &BX_CPU_C::PADDW_PqQq }, /* MMX */
/* 0F FE */ { BxAnotherMMX, &BX_CPU_C::PADDD_PqQq }, /* MMX */
/* 0F FF */ { 0, &BX_CPU_C::BxError },
// 512 entries for 32bit mod
/* 00 */ { BxAnother, &BX_CPU_C::ADD_EbGb },
@ -1218,38 +1258,44 @@ static BxOpcodeInfo_t BxOpcodeInfo[512*2] = {
/* 0F 5D */ { 0, &BX_CPU_C::BxError },
/* 0F 5E */ { 0, &BX_CPU_C::BxError },
/* 0F 5F */ { 0, &BX_CPU_C::BxError },
/* 0F 60 */ { 0, &BX_CPU_C::BxError },
/* 0F 61 */ { 0, &BX_CPU_C::BxError },
/* 0F 62 */ { 0, &BX_CPU_C::BxError },
/* 0F 63 */ { 0, &BX_CPU_C::BxError },
/* 0F 64 */ { 0, &BX_CPU_C::BxError },
/* 0F 65 */ { 0, &BX_CPU_C::BxError },
/* 0F 66 */ { 0, &BX_CPU_C::BxError },
/* 0F 67 */ { 0, &BX_CPU_C::BxError },
/* 0F 68 */ { 0, &BX_CPU_C::BxError },
/* 0F 69 */ { 0, &BX_CPU_C::BxError },
/* 0F 6A */ { 0, &BX_CPU_C::BxError },
/* 0F 6B */ { 0, &BX_CPU_C::BxError },
/* 0F 60 */ { BxAnotherMMX, &BX_CPU_C::PUNPCKLBW_PqQd }, /* MMX */
/* 0F 61 */ { BxAnotherMMX, &BX_CPU_C::PUNPCKLWD_PqQd }, /* MMX */
/* 0F 62 */ { BxAnotherMMX, &BX_CPU_C::PUNPCKLDQ_PqQd }, /* MMX */
/* 0F 63 */ { BxAnotherMMX, &BX_CPU_C::PACKSSWB_PqQq }, /* MMX */
/* 0F 64 */ { BxAnotherMMX, &BX_CPU_C::PCMPGTB_PqQq }, /* MMX */
/* 0F 65 */ { BxAnotherMMX, &BX_CPU_C::PCMPGTW_PqQq }, /* MMX */
/* 0F 66 */ { BxAnotherMMX, &BX_CPU_C::PCMPGTD_PqQq }, /* MMX */
/* 0F 67 */ { BxAnotherMMX, &BX_CPU_C::PACKUSWB_PqQq }, /* MMX */
/* 0F 68 */ { BxAnotherMMX, &BX_CPU_C::PUNPCKHBW_PqQq }, /* MMX */
/* 0F 69 */ { BxAnotherMMX, &BX_CPU_C::PUNPCKHWD_PqQq }, /* MMX */
/* 0F 6A */ { BxAnotherMMX, &BX_CPU_C::PUNPCKHDQ_PqQq }, /* MMX */
/* 0F 6B */ { BxAnotherMMX, &BX_CPU_C::PACKSSDW_PqQq }, /* MMX */
/* 0F 6C */ { 0, &BX_CPU_C::BxError },
/* 0F 6D */ { 0, &BX_CPU_C::BxError },
/* 0F 6E */ { 0, &BX_CPU_C::BxError },
/* 0F 6F */ { 0, &BX_CPU_C::BxError },
/* 0F 6E */ { BxAnotherMMX, &BX_CPU_C::MOVD_PqEd }, /* MMX */
/* 0F 6F */ { BxAnotherMMX, &BX_CPU_C::MOVQ_PqQq }, /* MMX */
/* 0F 70 */ { 0, &BX_CPU_C::BxError },
#if BX_SUPPORT_MMX
/* 0F 71 */ { BxAnother | BxGroupA, NULL, BxOpcodeInfoGAw },
/* 0F 72 */ { BxAnother | BxGroupA, NULL, BxOpcodeInfoGAd },
/* 0F 73 */ { BxAnother | BxGroupA, NULL, BxOpcodeInfoGAq },
#else
/* 0F 71 */ { 0, &BX_CPU_C::BxError },
/* 0F 72 */ { 0, &BX_CPU_C::BxError },
/* 0F 73 */ { 0, &BX_CPU_C::BxError },
/* 0F 74 */ { 0, &BX_CPU_C::BxError },
/* 0F 75 */ { 0, &BX_CPU_C::BxError },
/* 0F 76 */ { 0, &BX_CPU_C::BxError },
/* 0F 77 */ { 0, &BX_CPU_C::BxError },
#endif
/* 0F 74 */ { BxAnotherMMX, &BX_CPU_C::PCMPEQB_PqQq }, /* MMX */
/* 0F 75 */ { BxAnotherMMX, &BX_CPU_C::PCMPEQW_PqQq }, /* MMX */
/* 0F 76 */ { BxAnotherMMX, &BX_CPU_C::PCMPEQD_PqQq }, /* MMX */
/* 0F 77 */ { 0, &BX_CPU_C::EMMS }, /* MMX */
/* 0F 78 */ { 0, &BX_CPU_C::BxError },
/* 0F 79 */ { 0, &BX_CPU_C::BxError },
/* 0F 7A */ { 0, &BX_CPU_C::BxError },
/* 0F 7B */ { 0, &BX_CPU_C::BxError },
/* 0F 7C */ { 0, &BX_CPU_C::BxError },
/* 0F 7D */ { 0, &BX_CPU_C::BxError },
/* 0F 7E */ { 0, &BX_CPU_C::BxError },
/* 0F 7F */ { 0, &BX_CPU_C::BxError },
/* 0F 7E */ { BxAnotherMMX, &BX_CPU_C::MOVD_EdPd }, /* MMX */
/* 0F 7F */ { BxAnotherMMX, &BX_CPU_C::MOVQ_QqPq }, /* MMX */
/* 0F 80 */ { BxImmediate_BrOff32, &BX_CPU_C::JCC_Jd },
/* 0F 81 */ { BxImmediate_BrOff32, &BX_CPU_C::JCC_Jd },
/* 0F 82 */ { BxImmediate_BrOff32, &BX_CPU_C::JCC_Jd },
@ -1331,53 +1377,53 @@ static BxOpcodeInfo_t BxOpcodeInfo[512*2] = {
/* 0F CE */ { 0, &BX_CPU_C::BSWAP_ESI },
/* 0F CF */ { 0, &BX_CPU_C::BSWAP_EDI },
/* 0F D0 */ { 0, &BX_CPU_C::BxError },
/* 0F D1 */ { 0, &BX_CPU_C::BxError },
/* 0F D2 */ { 0, &BX_CPU_C::BxError },
/* 0F D3 */ { 0, &BX_CPU_C::BxError },
/* 0F D1 */ { BxAnotherMMX, &BX_CPU_C::PSRLW_PqQq }, /* MMX */
/* 0F D2 */ { BxAnotherMMX, &BX_CPU_C::PSRLD_PqQq }, /* MMX */
/* 0F D3 */ { BxAnotherMMX, &BX_CPU_C::PSRLQ_PqQq }, /* MMX */
/* 0F D4 */ { 0, &BX_CPU_C::BxError },
/* 0F D5 */ { 0, &BX_CPU_C::BxError },
/* 0F D5 */ { BxAnotherMMX, &BX_CPU_C::PMULLW_PqQq }, /* MMX */
/* 0F D6 */ { 0, &BX_CPU_C::BxError },
/* 0F D7 */ { 0, &BX_CPU_C::BxError },
/* 0F D8 */ { 0, &BX_CPU_C::BxError },
/* 0F D9 */ { 0, &BX_CPU_C::BxError },
/* 0F D8 */ { BxAnotherMMX, &BX_CPU_C::PSUBUSB_PqQq }, /* MMX */
/* 0F D9 */ { BxAnotherMMX, &BX_CPU_C::PSUBUSW_PqQq }, /* MMX */
/* 0F DA */ { 0, &BX_CPU_C::BxError },
/* 0F DB */ { 0, &BX_CPU_C::BxError },
/* 0F DC */ { 0, &BX_CPU_C::BxError },
/* 0F DD */ { 0, &BX_CPU_C::BxError },
/* 0F DB */ { BxAnotherMMX, &BX_CPU_C::PAND_PqQq }, /* MMX */
/* 0F DC */ { BxAnotherMMX, &BX_CPU_C::PADDUSB_PqQq }, /* MMX */
/* 0F DD */ { BxAnotherMMX, &BX_CPU_C::PADDUSW_PqQq }, /* MMX */
/* 0F DE */ { 0, &BX_CPU_C::BxError },
/* 0F DF */ { 0, &BX_CPU_C::BxError },
/* 0F DF */ { BxAnotherMMX, &BX_CPU_C::PANDN_PqQq }, /* MMX */
/* 0F E0 */ { 0, &BX_CPU_C::BxError },
/* 0F E1 */ { 0, &BX_CPU_C::BxError },
/* 0F E2 */ { 0, &BX_CPU_C::BxError },
/* 0F E1 */ { BxAnotherMMX, &BX_CPU_C::PSRAW_PqQq }, /* MMX */
/* 0F E2 */ { BxAnotherMMX, &BX_CPU_C::PSRAD_PqQq }, /* MMX */
/* 0F E3 */ { 0, &BX_CPU_C::BxError },
/* 0F E4 */ { 0, &BX_CPU_C::BxError },
/* 0F E5 */ { 0, &BX_CPU_C::BxError },
/* 0F E5 */ { BxAnotherMMX, &BX_CPU_C::PMULHW_PqQq }, /* MMX */
/* 0F E6 */ { 0, &BX_CPU_C::BxError },
/* 0F E7 */ { 0, &BX_CPU_C::BxError },
/* 0F E8 */ { 0, &BX_CPU_C::BxError },
/* 0F E9 */ { 0, &BX_CPU_C::BxError },
/* 0F E8 */ { BxAnotherMMX, &BX_CPU_C::PSUBSB_PqQq }, /* MMX */
/* 0F E9 */ { BxAnotherMMX, &BX_CPU_C::PSUBSW_PqQq }, /* MMX */
/* 0F EA */ { 0, &BX_CPU_C::BxError },
/* 0F EB */ { 0, &BX_CPU_C::BxError },
/* 0F EC */ { 0, &BX_CPU_C::BxError },
/* 0F ED */ { 0, &BX_CPU_C::BxError },
/* 0F EB */ { BxAnotherMMX, &BX_CPU_C::POR_PqQq }, /* MMX */
/* 0F EC */ { BxAnotherMMX, &BX_CPU_C::PADDSB_PqQq }, /* MMX */
/* 0F ED */ { BxAnotherMMX, &BX_CPU_C::PADDSW_PqQq }, /* MMX */
/* 0F EE */ { 0, &BX_CPU_C::BxError },
/* 0F EF */ { 0, &BX_CPU_C::BxError },
/* 0F F0 */ { 0, &BX_CPU_C::UndefinedOpcode },
/* 0F F1 */ { 0, &BX_CPU_C::UndefinedOpcode },
/* 0F F2 */ { 0, &BX_CPU_C::UndefinedOpcode },
/* 0F F3 */ { 0, &BX_CPU_C::UndefinedOpcode },
/* 0F F4 */ { 0, &BX_CPU_C::UndefinedOpcode },
/* 0F F5 */ { 0, &BX_CPU_C::UndefinedOpcode },
/* 0F F6 */ { 0, &BX_CPU_C::UndefinedOpcode },
/* 0F F7 */ { 0, &BX_CPU_C::UndefinedOpcode },
/* 0F F8 */ { 0, &BX_CPU_C::UndefinedOpcode },
/* 0F F9 */ { 0, &BX_CPU_C::UndefinedOpcode },
/* 0F FA */ { 0, &BX_CPU_C::UndefinedOpcode },
/* 0F FB */ { 0, &BX_CPU_C::UndefinedOpcode },
/* 0F FC */ { 0, &BX_CPU_C::UndefinedOpcode },
/* 0F FD */ { 0, &BX_CPU_C::UndefinedOpcode },
/* 0F FE */ { 0, &BX_CPU_C::UndefinedOpcode },
/* 0F FF */ { 0, &BX_CPU_C::UndefinedOpcode },
/* 0F EF */ { BxAnotherMMX, &BX_CPU_C::PXOR_PqQq }, /* MMX */
/* 0F F0 */ { 0, &BX_CPU_C::BxError },
/* 0F F1 */ { BxAnotherMMX, &BX_CPU_C::PSLLW_PqQq }, /* MMX */
/* 0F F2 */ { BxAnotherMMX, &BX_CPU_C::PSLLD_PqQq }, /* MMX */
/* 0F F3 */ { BxAnotherMMX, &BX_CPU_C::PSLLQ_PqQq }, /* MMX */
/* 0F F4 */ { 0, &BX_CPU_C::BxError },
/* 0F F5 */ { BxAnotherMMX, &BX_CPU_C::PMADDWD_PqQq }, /* MMX */
/* 0F F6 */ { 0, &BX_CPU_C::BxError },
/* 0F F7 */ { 0, &BX_CPU_C::BxError },
/* 0F F8 */ { BxAnotherMMX, &BX_CPU_C::PSUBB_PqQq }, /* MMX */
/* 0F F9 */ { BxAnotherMMX, &BX_CPU_C::PSUBW_PqQq }, /* MMX */
/* 0F FA */ { BxAnotherMMX, &BX_CPU_C::PSUBD_PqQq }, /* MMX */
/* 0F FB */ { 0, &BX_CPU_C::BxError },
/* 0F FC */ { BxAnotherMMX, &BX_CPU_C::PADDB_PqQq }, /* MMX */
/* 0F FD */ { BxAnotherMMX, &BX_CPU_C::PADDW_PqQq }, /* MMX */
/* 0F FE */ { BxAnotherMMX, &BX_CPU_C::PADDD_PqQq }, /* MMX */
/* 0F FF */ { 0, &BX_CPU_C::BxError }
};

157
bochs/cpu/i387.h Normal file
View File

@ -0,0 +1,157 @@
#ifndef BX_I387_RELATED_EXTENSIONS_H
#define BX_I387_RELATED_EXTENSIONS_H
/* Get data sizes from config.h generated from simulator's
* configure script
*/
#include "config.h"
typedef Bit8u u8; /* for FPU only */
typedef Bit8s s8;
typedef Bit16u u16;
typedef Bit16s s16;
typedef Bit32u u32;
typedef Bit32s s32;
typedef Bit64u u64;
typedef Bit64s s64;
//
// Minimal i387 structure, pruned from the linux headers. Only
// the fields which were necessary are included.
//
struct BxFpuRegisters {
s32 cwd;
s32 swd;
s32 twd;
s32 fip;
s32 fcs;
s32 foo;
s32 fos;
u32 fill0; /* to make sure the following aligns on an 8byte boundary */
u64 st_space[16]; /* 8*16 bytes per FP-reg (aligned) = 128 bytes */
unsigned char ftop;
unsigned char no_update;
unsigned char rm;
unsigned char alimit;
};
#if BX_SUPPORT_MMX
typedef union {
Bit8u u8;
Bit8s s8;
} MMX_BYTE;
typedef union {
Bit16u u16;
Bit16s s16;
struct {
#ifdef BX_BIG_ENDIAN
MMX_BYTE hi;
MMX_BYTE lo;
#else
MMX_BYTE lo;
MMX_BYTE hi;
#endif
} bytes;
} MMX_WORD;
typedef union {
Bit32u u32;
Bit32s s32;
struct {
#ifdef BX_BIG_ENDIAN
MMX_WORD hi;
MMX_WORD lo;
#else
MMX_WORD lo;
MMX_WORD hi;
#endif
} words;
} MMX_DWORD;
typedef union {
Bit64u u64;
Bit64s s64;
struct {
#ifdef BX_BIG_ENDIAN
MMX_DWORD hi;
MMX_DWORD lo;
#else
MMX_DWORD lo;
MMX_DWORD hi;
#endif
} dwords;
} MMX_QWORD, BxPackedMmxRegister;
#define MMXSB0(reg) (reg.dwords.lo.words.lo.bytes.lo.s8)
#define MMXSB1(reg) (reg.dwords.lo.words.lo.bytes.hi.s8)
#define MMXSB2(reg) (reg.dwords.lo.words.hi.bytes.lo.s8)
#define MMXSB3(reg) (reg.dwords.lo.words.hi.bytes.hi.s8)
#define MMXSB4(reg) (reg.dwords.hi.words.lo.bytes.lo.s8)
#define MMXSB5(reg) (reg.dwords.hi.words.lo.bytes.hi.s8)
#define MMXSB6(reg) (reg.dwords.hi.words.hi.bytes.lo.s8)
#define MMXSB7(reg) (reg.dwords.hi.words.hi.bytes.hi.s8)
#define MMXUB0(reg) (reg.dwords.lo.words.lo.bytes.lo.u8)
#define MMXUB1(reg) (reg.dwords.lo.words.lo.bytes.hi.u8)
#define MMXUB2(reg) (reg.dwords.lo.words.hi.bytes.lo.u8)
#define MMXUB3(reg) (reg.dwords.lo.words.hi.bytes.hi.u8)
#define MMXUB4(reg) (reg.dwords.hi.words.lo.bytes.lo.u8)
#define MMXUB5(reg) (reg.dwords.hi.words.lo.bytes.hi.u8)
#define MMXUB6(reg) (reg.dwords.hi.words.hi.bytes.lo.u8)
#define MMXUB7(reg) (reg.dwords.hi.words.hi.bytes.hi.u8)
#define MMXSW0(reg) (reg.dwords.lo.words.lo.s16)
#define MMXSW1(reg) (reg.dwords.lo.words.hi.s16)
#define MMXSW2(reg) (reg.dwords.hi.words.lo.s16)
#define MMXSW3(reg) (reg.dwords.hi.words.hi.s16)
#define MMXUW0(reg) (reg.dwords.lo.words.lo.u16)
#define MMXUW1(reg) (reg.dwords.lo.words.hi.u16)
#define MMXUW2(reg) (reg.dwords.hi.words.lo.u16)
#define MMXUW3(reg) (reg.dwords.hi.words.hi.u16)
#define MMXSD0(reg) (reg.dwords.lo.s32)
#define MMXSD1(reg) (reg.dwords.hi.s32)
#define MMXUD0(reg) (reg.dwords.lo.u32)
#define MMXUD1(reg) (reg.dwords.hi.u32)
#define MMXSQ(reg) (reg.s64)
#define MMXUQ(reg) (reg.u64)
typedef struct mmx_physical_reg_t
{
BxPackedMmxRegister packed_mmx_register;
Bit16u exp; /* 4 bytes: exponent of fp register,
set to 0xFFFF by all mmx commands */
Bit32u aligment; /* 4 bytes: aligment */
} BxMmxRegister;
/* to be compatible with fpu register file */
struct BxMmxRegisters
{
Bit32u cwd; /* fpu control word */
Bit32u swd; /* fpu status word */
Bit32u twd; /* fpu tag word */
Bit32u fip;
Bit32u fcs;
Bit32u foo;
Bit32u fos;
Bit32u alignment;
BxMmxRegister mmx[8];
unsigned char tos; /* top-of-stack */
unsigned char no_update;
unsigned char rm;
unsigned char alimit;
};
#endif /* BX_SUPPORT_MMX */
typedef union FpuMmxRegisters
{
struct BxFpuRegisters soft;
#if BX_SUPPORT_MMX
struct BxMmxRegisters mmx;
#endif
} i387_t;
#endif

1842
bochs/cpu/mmx.cc Normal file
View File

File diff suppressed because it is too large Load Diff

10
bochs/cpu/proc_ctrl.cc
View File

@ -1,5 +1,5 @@
/////////////////////////////////////////////////////////////////////////
// $Id: proc_ctrl.cc,v 1.31 2002-09-08 04:08:14 kevinlawton Exp $
// $Id: proc_ctrl.cc,v 1.32 2002-09-09 16:11:25 bdenney Exp $
/////////////////////////////////////////////////////////////////////////
//
// Copyright (C) 2001 MandrakeSoft S.A.
@ -1035,6 +1035,9 @@ BX_CPU_C::CPUID(BxInstruction_t *i)
# if BX_SUPPORT_FPU
features |= 0x01;
# endif
# if BX_SUPPORT_MMX
features |= (1<<23); // support MMX
# endif
#elif BX_CPU_LEVEL == 6
family = 6;
@ -1048,9 +1051,12 @@ BX_CPU_C::CPUID(BxInstruction_t *i)
# if BX_SUPPORT_FPU
features |= 0x01; // has FPU
# endif
# if BX_SUPPORT_MMX
features |= (1<<23); // support MMX
# endif
#else
BX_PANIC(("CPUID: not implemented for > 6"));
#endif
#endif
#if BX_SUPPORT_4MEG_PAGES
features |= 8; // support page-size extension (4m pages)

44
bochs/fpu/fpu_system.h
View File

@ -1,6 +1,6 @@
/*---------------------------------------------------------------------------+
| fpu_system.h |
| $Id: fpu_system.h,v 1.3 2001-10-06 03:53:46 bdenney Exp $
| $Id: fpu_system.h,v 1.4 2002-09-09 16:11:25 bdenney Exp $
| |
| Copyright (C) 1992,1994,1997 |
| W. Metzenthen, 22 Parker St, Ormond, Vic 3163, |
@ -96,18 +96,7 @@
* rather than a kernel (ported by Kevin Lawton)
* ------------------------------------------------------------ */
/* Get data sizes from config.h generated from simulator's
* configure script
*/
#include "config.h"
typedef Bit8u u8;
typedef Bit8s s8;
typedef Bit16u u16;
typedef Bit16s s16;
typedef Bit32u u32;
typedef Bit32s s32;
typedef Bit64u u64;
typedef Bit64s s64;
#include <cpu/i387.h>
/* bbd: include ported linux headers after config.h for GCC_ATTRIBUTE macro */
#include <linux/kernel.h>
@ -144,36 +133,13 @@ struct info {
#define FPU_info ((struct info *) NULL)
//
// Minimal i387 structure, pruned from the linux headers. Only
// the fields which were necessary are included.
//
typedef struct {
struct {
s32 cwd;
s32 swd;
s32 twd;
s32 fip;
s32 fcs;
s32 foo;
s32 fos;
u32 fill0; /* to make sure the following aligns on an 8byte boundary */
u64 st_space[16]; /* 8*16 bytes per FP-reg (aligned) = 128 bytes */
unsigned char ftop;
unsigned char no_update;
unsigned char rm;
unsigned char alimit;
} GCC_ATTRIBUTE((aligned(16), packed)) soft;
} i387_t;
extern i387_t i387;
#endif
#define SIGSEGV 11
extern i387_t *current_i387;
#define i387 (*current_i387)
#define I387 i387

4
bochs/fpu/wmFPUemu_glue.cc
View File

@ -45,7 +45,7 @@ extern "C" {
static BxInstruction_t *fpu_iptr = NULL;
static BX_CPU_C *fpu_cpu_ptr = NULL;
i387_t i387;
i387_t *current_i387;
extern "C" void
math_emulate2(fpu_addr_modes addr_modes,
@ -62,6 +62,7 @@ extern "C" void printfp(char *s, FPU_REG *r);
void
BX_CPU_C::fpu_init(void)
{
current_i387 = &(BX_CPU_THIS_PTR the_i387);
finit();
}
@ -76,6 +77,7 @@ BX_CPU_C::fpu_execute(BxInstruction_t *i)
fpu_iptr = i;
fpu_cpu_ptr = this;
current_i387 = &(BX_CPU_THIS_PTR the_i387);
#if 0
addr_modes.default_mode = VM86;