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75bda1d5cd
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2507 Commits

Author SHA1 Message Date
Stanislav Shwartsman
75bda1d5cd implemented SVM emulation support for Bochs (incomplete yet) 
I am merging the code in order to start making shortcuts between VMX emulation and SVM emulation.
Of course SVM emulation is incomplete, completely untested and not expected to work.
But someone could already take a look one the code and give some suggestions.

Also looking for anybody with existing SVM kernels - as simple as possible - for testing.

Status:
 - exceptions intercept is not implemented yet
 - IO intercept is not implemented yet
 - MSR intercept is not implemented yet
 - virtual interrupts are not implemented yet
 - CPUID is not implemented yet

No advanced SVM featurez planned - I am implementing the very basic 'Pacifica' document from 2005 using QEMU code as reference.
 2011-12-25 19:35:29 +00:00
Stanislav Shwartsman
2dee4b12be added VMX .bochsrc option to ctoggle VMX ON/OFF on runtime 2011-12-21 09:11:51 +00:00
Stanislav Shwartsman
e7ed8aca5c move inhibit interrrupts functionality to icount interface 2011-12-21 06:17:45 +00:00
Stanislav Shwartsman
7cdeecf198 VMX: fixed VirtualBox VMX guest Guru Meditation - FS.BASE get corrupted after saving/restoring unusable selector 2011-12-19 16:06:53 +00:00
Stanislav Shwartsman
6cc03432d9 improve VMX debug print 2011-12-18 21:04:30 +00:00
Stanislav Shwartsman
f6203dae7d instrumentation: added special indication for indirect call/jump 2011-12-18 18:11:56 +00:00
Stanislav Shwartsman
9763643106 VMX: Fixed VMFUNC instruction behavior to align with Intel SDM revision 041 2011-12-17 14:06:23 +00:00
Stanislav Shwartsman
cbbd8bfd46 fixed some warnings after compilation with msvcpp 2010 2011-12-10 18:58:25 +00:00
Stanislav Shwartsman
ac0ebc9728 added debug prints about vmcs initialization 2011-12-09 19:57:40 +00:00
Stanislav Shwartsman
f496e78326 fixed compilation warning 2011-12-02 19:40:31 +00:00
Stanislav Shwartsman
1e3e6ff2af BMI: fixed EFLAGS after BMI instructions (set EFLAGS while preserving PF was not implemented properly in 2.5 release) 2011-11-29 19:50:26 +00:00
Stanislav Shwartsman
b8f2d91b9a fixed compilation err 2011-11-28 21:16:40 +00:00
Stanislav Shwartsman
99bec5155e fixed compilation err in instrumentation module 2011-11-28 10:08:03 +00:00
Stanislav Shwartsman
8cb359fab5 fixed flags handling for BMI instructions 2011-11-27 13:23:26 +00:00
Stanislav Shwartsman
100622e958 fix ULL suffix for 64bit int, use BX_CONST64 instead 2011-11-26 19:01:53 +00:00
Stanislav Shwartsman
f09bdf353a RDMSR can also read TSC so make it end-of-trace as well (same as RDTSC) 2011-11-24 16:03:51 +00:00
Stanislav Shwartsman
f660d3dc68 implemented missed XOP instructions FRCZPS/PD/SS/SD + update CHANGES with fixed bugs 2011-11-24 11:34:26 +00:00
Stanislav Shwartsman
c74f590077 implemented TSC-Deadline APIC timer mode 2011-11-21 12:51:50 +00:00
Stanislav Shwartsman
e4bd200119 do not report TSC Deadline for Sandy Bridge CPUID - not implemented yet 2011-11-20 18:25:39 +00:00
Stanislav Shwartsman
9be8552b80 - Implemented VM Functions support and EPTP-Switching VM Functions 
- Added VMEXIT conditions for INVPCID instruction

Now Bochs is fully aligned with latest pulished Intel's SDM rev040.
 2011-11-05 07:31:51 +00:00
Stanislav Shwartsman
42a0a178eb disasm for XOP instructions 2011-10-30 08:58:49 +00:00
Stanislav Shwartsman
ad9bdbe550 fixed compilation failure 2011-10-21 08:06:55 +00:00
Stanislav Shwartsman
b1a6b34616 implemented PERMIL2PS/PERMIL2PD XOP instructions 2011-10-20 17:37:57 +00:00
Stanislav Shwartsman
ddecc0234a fixed (c) info 2011-10-20 14:06:12 +00:00
Stanislav Shwartsman
3035fcd0af implemented XOP FMADCSWD/FMADCSSWD instructions 2011-10-20 13:55:26 +00:00
Stanislav Shwartsman
5d9bbae71c bugfix: cant use ib2 it is overlap with disp32 2011-10-19 21:28:36 +00:00
Stanislav Shwartsman
5cc04b9955 Implemented AMDs Buldozer XOP and TBM extensions. 
XOP: few instructions are still missing, coming soon

  BX_PANIC(("VPERMILPS_VpsHpsWpsVIbR: not implemented yet"));
  BX_PANIC(("VPERMILPD_VpdHpdWpdVIbR: not implemented yet"));
  BX_PANIC(("VPMADCSSWD_VdqHdqWdqVIbR: not implemented yet"));
  BX_PANIC(("VPMADCSWD_VdqHdqWdqVIbR: not implemented yet"));
  BX_PANIC(("VFRCZPS_VpsWpsR: not implemented yet"));
  BX_PANIC(("VFRCZPD_VpdWpdR: not implemented yet"));
  BX_PANIC(("VFRCZSS_VssWssR: not implemented yet"));
  BX_PANIC(("VFRCZSD_VsdWsdR: not implemented yet"));
 2011-10-19 20:54:04 +00:00
Stanislav Shwartsman
314171bb56 fixed compilation w/o AVX 2011-10-09 13:56:39 +00:00
Stanislav Shwartsman
71cbff104b fixing xsave/xrstor flows with AVX 2011-10-09 09:19:49 +00:00
Stanislav Shwartsman
8ada4ce5e4 added to cpudb: Intel(R) Core(TM) i5 M 520 (Arrandale) - based on Westmere arch 2011-10-07 19:32:44 +00:00
Stanislav Shwartsman
2580d8c46d added FMA4 AMD instructions support, fixed mem access length for Intel scalar FMA instructions 2011-10-07 14:09:35 +00:00
Stanislav Shwartsman
aad57310c2 disasm for FMA4, better dbg print SSE rounding control with MXCSR 2011-10-06 20:33:10 +00:00
Stanislav Shwartsman
8a9b8f4622 MXCSR.FUZ is ignoired for F16 instructions 2011-10-03 15:08:22 +00:00
Stanislav Shwartsman
e282b5e88d Move DAZ handling into softfloat library (for float16, float32 and float64 only) and cleanup SSE and AVX code 
Fix decoding of opcodes with VEX.W=1 in 32-bit mode (AVX2, FMA)
 2011-10-01 15:40:36 +00:00
Stanislav Shwartsman
f425400af5 fixed warnings from compilation with mingw-gcc 4.6.1 2011-09-30 20:38:18 +00:00
Stanislav Shwartsman
e5d0540365 commit new added files 2011-09-29 22:38:38 +00:00
Stanislav Shwartsman
6751af5d8e added AVX FMA extensions support. The implementation is based on QEMU patch by Peter Maydell (fixed) 2011-09-29 22:20:56 +00:00
Stanislav Shwartsman
275194fb32 #GP on reading VMX_EPT_VPID_CAP MSR when EPT and VPID disabled 2011-09-26 20:36:26 +00:00
Stanislav Shwartsman
f0d9f8fab7 added some comments 2011-09-26 20:10:15 +00:00
Stanislav Shwartsman
0547c8823e compilation w/o x86-64 2011-09-26 19:48:58 +00:00
Stanislav Shwartsman
12ad45395b enable Penryn VMX capabilities with VMX=1, VMX=2 is required for EPT and heavier stuff 2011-09-26 19:36:20 +00:00
Stanislav Shwartsman
54d1d8aa55 added new assertion to generic cpuid 2011-09-26 18:47:47 +00:00
Stanislav Shwartsman
aa96ecd98a compilation fix 2011-09-26 18:18:10 +00:00
Stanislav Shwartsman
0aadf88c07 more polishing for vmx configurability 2011-09-26 18:08:31 +00:00
Stanislav Shwartsman
c28c7f6a06 Supply real VMX capabilities together with the CPU MODEL .bochsrc option. 
So now the same single option will choose not only the CPUID flags but also VMX capabilities matching real HW machine.

Removed cpuid of core2_extreme_x9770 from the cpudb. I don't remember its VMX capabilities anyway.
There is another Penryn model in the cpudb - core2_penryn_t9600.
 2011-09-26 12:31:40 +00:00
Stanislav Shwartsman
8d95830562 first step to configuration of VMX through cpuid_t class 2011-09-25 19:04:55 +00:00
Stanislav Shwartsman
b66feecc86 move common instrumentation constants (valid for all stubs) to cpu.h 2011-09-25 17:38:54 +00:00
Stanislav Shwartsman
62d0c8abf7 - Now you could disable x86-64 from .bochsrc so now it is possible to emulate 
32-bit CPU using Bochs binary compiled with x86-64 support.

The commit also fixes some init.cc issues with initialization of SYSCALL/SYSRET MSR in AMD hosts and also includes code reorg.
 2011-09-25 17:36:20 +00:00
Stanislav Shwartsman
2b7894de7b fixed dbg print mentioned in SF bug 3029271 2011-09-22 22:08:18 +00:00
Stanislav Shwartsman
1b9f286945 - New way of CPUs scheduling in SMP mode brings up to 50% speedup to the 
SMP emulation. New implementation uses dynamic CPU quantum value and takes
   full advantage of the trace cache. Each emulated processor will execute
   the whole trace before switching to the next processor.
 * It is also safe to use large (up to 16 instructions) quantum values for
   the SMP emulation now and improve performance even further.

The same merge also completely fixes SF bug :
  [3312237] stepN command might be not working properly

Handlers chaining speedups are also supported with SMP emulation now.
 2011-09-22 19:38:52 +00:00