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106 Commits

Author SHA1 Message Date
Stanislav Shwartsman
9f25df5568 compile fix 2010-03-14 20:14:30 +00:00
Stanislav Shwartsman
36b0b3c682 compilation fixes 2010-03-13 21:06:56 +00:00
Stanislav Shwartsman
93be0a18e9 update Makefile.in 2010-03-12 11:38:12 +00:00
Stanislav Shwartsman
a2a080894b split fetchdecode.h for better readability 2010-02-08 10:39:30 +00:00
Stanislav Shwartsman
bd60e0264c change Copyright to Bochs Project 2009-12-04 16:53:12 +00:00
Stanislav Shwartsman
93f375dc42 regen dependencies 2009-02-26 22:02:00 +00:00
Volker Ruppert
9e3dd83e85 - reduce some more dependencies and related Makefile.in updates 2009-02-23 11:06:53 +00:00
Volker Ruppert
790eec83ca - converted I/O APIC to a device plugin 
- updated dependencies
 2009-02-22 10:44:50 +00:00
Stanislav Shwartsman
f8185a6bc6 Added Intel VMX emulation to Bochs CPU 2009-01-31 10:43:24 +00:00
Stanislav Shwartsman
db098a1205 Fix dependencies of CPU code from disasm library 
Regent Makefile.in for CPU
 2009-01-19 19:01:03 +00:00
Stanislav Shwartsman
9929e6ed78 - updated FSF address 2009-01-16 18:18:59 +00:00
Stanislav Shwartsman
e540ee75ca cleared external debugger configure stuff from configure script and makefile 2009-01-15 21:52:52 +00:00
Stanislav Shwartsman
0836545037 Merge io.cc and io_pro.cc (required for future VMX use) 2009-01-15 16:53:08 +00:00
Volker Ruppert
e12b21e647 - update all dependencies 2009-01-03 09:54:10 +00:00
Stanislav Shwartsman
d56c3a18aa reduce include dependencies in iodev.h 
Makefile.in in iodev folder have to be regerated !
 2008-12-29 20:16:08 +00:00
Stanislav Shwartsman
70e9f4c161 preparing to different way of handling MSR registers 2008-12-05 12:48:36 +00:00
Alexander Krisak
e108fe0d58 Yet another win32 build fix. cpu/resolve.cc renamed to cpu/resolver.cc 
because it conflicts with disasm/resolve.cc.
 2008-10-07 07:47:56 +00:00
Stanislav Shwartsman
c009e87a81 Remove external debugger interface: 
- it is closed source (!!!)
 - we have very nice replacement now
 2008-10-01 09:44:40 +00:00
Stanislav Shwartsman
a9c77eb75d Try to optimize individual instructions after fetchdecode 2008-09-16 19:20:03 +00:00
Stanislav Shwartsman
a8adb36dc2 Implemented MOVBE Intel Atom(R) instruction 2008-08-11 18:53:24 +00:00
Stanislav Shwartsman
0d90ab0478 Completely new way to handle LD+OP cases - allows to significantly reduce number of BX_CPU_C methods 2008-08-09 21:05:07 +00:00
Stanislav Shwartsman
678ac970aa Reorganize ctrl_xfer8.cc code, allows to inline branch32 method 2008-06-22 03:45:55 +00:00
Stanislav Shwartsman
92568f7525 Faster 32-bit emulation wwith 64-bit enabled mode. 
~10% speedup byu optimization of 32-bit mem access
 2008-06-12 19:14:40 +00:00
Stanislav Shwartsman
7494b8823b - Support of AES CPU extensions, to enable configure with 
--enable-aes option
 2008-05-30 20:35:08 +00:00
Stanislav Shwartsman
ec1ff39a5f Splitted memory access methods for 32 and 64-bit code. 
The 64-bit code got >10% speedup, the 32-bit code also got about 2% because laddr cacluation optimization
 2008-05-10 18:10:53 +00:00
Stanislav Shwartsman
5826e2843a Inline pop/push functions 
Store only single byte of opcode in b1() - speedup shift instructions
Code cleanups
 2008-04-05 17:51:55 +00:00
Stanislav Shwartsman
2aaafa76a2 Reorganize fetchdecode tables with another level of redirection - a leap toward future improvements 
Currently no speedup and no slowdown - about the same results on my Bochs benchmarking
A lot of code reorganization in fetchdecode
 2008-04-04 22:39:45 +00:00
Stanislav Shwartsman
62e3728591 preparations for future optimizations - not necessary speedupo now 2008-04-03 17:56:59 +00:00
Stanislav Shwartsman
4180fd9e11 Merge resolve16/32/64.cc to single file 2008-04-03 17:44:33 +00:00
Stanislav Shwartsman
8615022962 Added first stubs for XSAVE/XRESTOR implementation 
Disassemble XSAVE/XRSTOR instructions (4 instructions)
Update CHANGES - a bit speculatively
 2008-02-12 22:41:39 +00:00
Stanislav Shwartsman
37fbb82baa Cleanups. Move bxInstruction_c definition to separate file instr.h 2008-01-29 17:13:10 +00:00
Stanislav Shwartsman
88a4776244 taking all CPU icache/trace cache related stuff into separate source file from cpu.cc 2008-01-17 21:15:23 +00:00
Stanislav Shwartsman
976af56f6d Split bit.cc to 4 files - new files bit16/32/64.cc 2007-12-07 10:59:18 +00:00
Stanislav Shwartsman
7ca78b88e9 configure/compile changes + small optimizations 2007-12-01 16:45:17 +00:00
Stanislav Shwartsman
42fdd8a3a1 During Bochs benchmarking I figured out that hostasm actually slow down the emulation ... so remove this ugly code which also doesn't help :) 
speedup flags update for some instructions - idea was taken from DT patch by h.johansson
 2007-10-21 22:07:33 +00:00
Stanislav Shwartsman
dbb91069f4 Added SSE4_2 instructions emulation 2007-10-01 19:59:37 +00:00
Stanislav Shwartsman
412eeeeb7c Get crregs definition to separate file from cpu.h 2007-09-10 16:00:15 +00:00
Stanislav Shwartsman
b6c8275cfd remove old PIT model and always use Greg Alexander's new one 2007-04-08 21:57:06 +00:00
Stanislav Shwartsman
f8c3968d42 Changes list made after CVS service crash: 
- Fixed critical bug in CPU code added with one of the prev commits
  - Disasm support for SSE4
  - Rename PNI->SSE3 everywhere in the code
  - Correctly decode, disassemble and execute 'XCHG R8, rAX' x86-64 instruction
  - Correctly decode, disassemble and execute multi-byte NOP 0F F1 opcode
  - Fixed ENTER and LEAVE instructions in x86-64 mode
  - Added ability to turn ON instruction trace, only GUI support is missed.
    Instruction trace could be enabled if Bochs was compiled with disasm
  - More changes Bit32u -> bx_phy_address
  - Complete preliminary implementation of SMM in Bochs, SMI is still PANICs but if you press 'continue' everything should work OK
  - Small code cleanup
  - Update CHANGES and user docs
 2006-04-05 17:31:35 +00:00
Stanislav Shwartsman
024ce249bf Define SMM mode for future implementation. 
I would like all next commits be aware of SMM mode.
It can't be implemented right now (too many questions w/o answers) but it will be done till next major release definitelly.
 2006-02-14 19:00:08 +00:00
Stanislav Shwartsman
6a07173b3d Split ctrl_xfer_pro.cc to 4 different files according to the operations 2005-08-01 22:06:19 +00:00
Stanislav Shwartsman
c583a6f9cf move segments and descriptors definitions and macroses for new descriptor.h 2005-02-27 17:41:45 +00:00
Volker Ruppert
02ae558db8 - removed old unused code designed for a save/restore feature 
- fixed pcidev targets in iodev/Makefile.in
- updated all Makefile dependencies using a default setup (.conf.linux).
  TODO: dependencies should be generated at compile time since they depend on
  the config settings
 2004-12-13 19:10:38 +00:00
Stanislav Shwartsman
8f0cf91fff This commit is the first commit in long series of changes the have several purposes: 
1. Review and commit patch

	[ 896733 ] Lazy flags, for more instructions, only 1 src op

   May be partially, but I hope to get all ideas from patch in

2. Get Bochs speedup after lazy flags optimization

3. Most important for me: improve correctness of emulation by handling several
   undocumented EFLAGS modifications. And finally pass

	UFLAGS - Undefined Flags Test v 3.0
	Copyright (C) Potemkin's Hackers Group (PHG) 1989,1995

   The test still fails on > 50% of its checks.
 2004-08-09 21:28:47 +00:00
Stanislav Shwartsman
5873b26a82 Speed up compilation process. 
bochs.h already not include iodev.h which reduces compilation dependences for almost all cpu and fpu files, now cpu files will not be recompiled if iodev includes was changed
 2004-06-19 15:20:15 +00:00
Stanislav Shwartsman
5c5b556f24 Merge softfloat-fpu-implementation_ver4_branch branch 2004-06-18 14:11:11 +00:00
Volker Ruppert
25582ed29d - fixed cpu/Makefile.in after renaming file 
- reg_ld_str.c: fixed regparm argument (bugfix found in SuSE 9.1 sources of Bochs 2.1.1)
 2004-05-17 19:50:43 +00:00
Stanislav Shwartsman
52d75d7aed Fast table-based implementation of reciprocal (RCPSS/RCPPS) 
This implemntation is much more clear than old one.
RSQRTSS/RSQRTPS coming soon.
 2003-12-30 23:06:59 +00:00
Daniel Gimpelevich
fff74a6f83 Fixed incompatibility with gcc3.3, I think. 2003-11-28 15:07:29 +00:00
Stanislav Shwartsman
789db2603e Added P4 support to CPUID instruction 
Extracted CPUIS instructions to separate file
 2003-09-26 15:32:41 +00:00