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63e99da4af
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26 Commits

Author SHA1 Message Date
Stanislav Shwartsman
63e99da4af Implemented VALIGN* AVX-512 instructions 
Now only missed AVX-512 opcodes now are:

512.66.0F38.W0 13 VCVTPH2PS
512.66.0F3A.W0 1D VCVTPS2PH

512.66.0F38.WIG 21 VPMOVSXBD
512.66.0F38.WIG 22 VPMOVSXBQ
512.66.0F38.WIG 23 VPMOVSXWD
512.66.0F38.WIG 24 VPMOVSXWQ
512.66.0F38.W0  25 VPMOVSXDQ

512.66.0F38.WIG 31 VPMOVSZBD
512.66.0F38.WIG 32 VPMOVSZBQ
512.66.0F38.WIG 33 VPMOVSZWD
512.66.0F38.WIG 34 VPMOVSZWQ
512.66.0F38.W0  35 VPMOVSzDQ

512.66.0F38.W0 2C VSCALEFPS
512.66.0F38.W1 2C VSCALEFPD
NDS.LIG.66.0F38.W0 2D VSCALESS
NDS.LIG.66.0F38.W1 2D VSCALESD

512.66.0F38.W0 4C VRCP14PS
512.66.0F38.W1 4C VRCP14PD
NDS.LIG.66.0F38.W0 4D VRCP14SS
NDS.LIG.66.0F38.W1 4D VRCP14SD
512.66.0F38.W0 4E VRSQRT14PS
512.66.0F38.W1 4E VRSQRT14PD
NDS.LIG.66.0F38.W0 4F VRSQRT14SS
NDS.LIG.66.0F38.W1 4F VRSQRT14SD

512.66.0F3A.W0 08 VRNDSCALEPS
512.66.0F3A.W1 09 VRNDSCALEPD
NDS.LIG.66.0F3A.W1 0A VRNDSCALESS
NDS.LIG.66.0F3A.W1 0B VRNDSCALESD

512.66.0F3A.W0 19 VEXTRACTF32x4
512.66.0F3A.W1 1B VEXTRACTF64x4
512.66.0F3A.W0 39 VEXTRACTI32x4
512.66.0F3A.W1 3B VEXTRACTI64x4

512.66.0F3A.W0 26 VGETMANTPS
512.66.0F3A.W1 26 VGETMANTPD
NDS.LIG.66.0F3A.W0 27 VGETMANTSS
NDS.LIG.66.0F3A.W1 27 VGETMANTSD
 2014-01-28 19:36:46 +00:00
Stanislav Shwartsman
4d4d194c16 implemented missed vpmul* avx-512 opcodes 2014-01-24 20:04:36 +00:00
Stanislav Shwartsman
7beb85b850 implemented vperm* avx-512 opcodes 2014-01-24 19:23:19 +00:00
Stanislav Shwartsman
407681c98a implemented some more avx-512 opcodes 2014-01-24 12:02:47 +00:00
Stanislav Shwartsman
33889cd02e implemented avx-512 vpermq opcode 2014-01-22 21:21:32 +00:00
Stanislav Shwartsman
af29c8bd60 infrastructure change for avx-512: before going to more new instructions modelling 2014-01-10 19:40:38 +00:00
Stanislav Shwartsman
58470763fa implement few more avx-512 opcodes 2013-12-31 23:51:25 +00:00
Stanislav Shwartsman
da0cec4300 implemented AVX-512 VINSERTF*/VINSERTI* opcodes 2013-12-17 20:38:19 +00:00
Stanislav Shwartsman
258a60f3fa Implemented AVX512 EXPAND/COMPRESS instructions 
Fixed memory access size for AVX shift instructions with shift count in memory
Do not allow to encode with EVEX.b instructions which do not support implicit broadcast 
softfloat: prepare float32/64 to uint32 conversion functions
 2013-12-10 21:09:46 +00:00
Stanislav Shwartsman
d20c81417c Implemented VSHUFF32x4/64x2, VSHUFI32x4/64x2 AVX512 instructions 
Implemented AVX512 blend instructions
Do not allow setting of EVEX.b in reg form when no floating point exceptions could be generated by instruction
 2013-12-09 19:09:37 +00:00
Stanislav Shwartsman
ca2793ac76 Debugger: fixed param tree access to 64-bit variables (need to use get64() instead of get()) 
Debugger: if AVX-512 if not supported by current configuration do not print high256 of vector registers and zmm15..zmm31 in AVX command
Implement VBROADCASTF64x4, VBROADCASTF32x4, VBROADCASTFI64x4, VBROADCASTI32x4 AVX-512 instructions
Fetchdecode optimizations and bugfixes
 2013-12-05 19:17:16 +00:00
Stanislav Shwartsman
401caf168d Implemented VPERMILPS/PD AVX512 instructions 
Implemented VPTERNLOGD/Q AVX512 instructions
Implemented VPBROADCASTD/Q, VPBROADCASTPS/PD AVX512 instructions
Implemented VTEST* AVX512 instructions
Bugfixes in EVEX decoding tables
 2013-12-04 18:30:44 +00:00
Stanislav Shwartsman
a5153c348f fixed bugs in vcmp* avx512 opcodes 2013-12-03 22:16:22 +00:00
Stanislav Shwartsman
ccdd21a76b small diet to the avx-512 files - remove code duplication 2013-12-03 21:32:04 +00:00
Stanislav Shwartsman
6d9b16e0f7 Implemented VCMPPS/PD/SS/SD AVX512 instructions 
Implemented AVX512 shift/rotate instructions
 2013-12-03 15:44:23 +00:00
Stanislav Shwartsman
0683b00535 implemented more avx-512 opcodes 2013-12-02 19:16:48 +00:00
Stanislav Shwartsman
79456eb7e1 Implemented VPCMP* AVX512 instructions 
Implemented VMOVNTPS/PD/DQ AVX512 instructions
Implemented VMOVNTDQA AVX512 instruction
Bugfixes for AVX-512
 2013-12-02 18:05:18 +00:00
Stanislav Shwartsman
c7b03eb00b implement avx-512 vpabsd/q instructions 2013-12-01 20:10:39 +00:00
Stanislav Shwartsman
11f082af82 Implemented VMOVDQU32/VMOVDQA32/VMOVDQU64/VMOVDQA64 AVX512 instructions 
Implemented VCOMISS/VCOMISD/VUCOMISS/VUCOMISD AVX512 instructions
Fix vector length values for AVX-512 (512-bit vector should have length 4)
support mis-alignment #GP exception for VMOVAPS/PD/DQA32/DQ64 AVX512 instructions
move AVX512 load/store and register move operations into dedicated file avx512_move.cc
 2013-11-29 20:22:31 +00:00
Stanislav Shwartsman
031583dbd9 moved avx masked load/store operations to separate functions 2013-11-29 18:15:48 +00:00
Stanislav Shwartsman
21bb1363ac avx512 move functions introduced 2013-11-29 11:10:34 +00:00
Stanislav Shwartsman
4680c22d0e implemented avx-512 masked register moves 2013-11-28 20:58:31 +00:00
Stanislav Shwartsman
b7f950aa5c more coding for avx512 2013-11-26 19:22:31 +00:00
Stanislav Shwartsman
940c2a1c8e fixes for disasm 2013-10-15 17:19:18 +00:00
Stanislav Shwartsman
0b2e533a55 more avx512 instructions done 2013-10-09 19:45:36 +00:00
Stanislav Shwartsman
d6d1c707df implemented set of integer avx512 instructions 2013-10-08 19:44:52 +00:00