the address offset between two lines on the screen in all VGA modes.
It depends on the CRTC offset register value and the address mode (byte, word,
dword)
- moved screen update code to the end of the write handler. If a register change
should force a redraw of the screen, the variable 'needs_update' must be set
to 1.
- changes to the attribute controller palette index register now force a redraw
of the screen
- modeX: calculation of the tile numbers fixed
* check memory mapping before everything else
* read mode 1 optimized using a part of patch.vga-mode2-speed-dohzono
- function mem_write(): check memory mapping before everything else
- writes to the CRT registers are handled only if the new value differs
- a CRT start address change forces a redraw of the screen
with 100 rows and a char height of 4
- raster operations AND, OR and XOR in write mode 2 implemented (part of patch #707931)
- use the vga_tile_updated array in modeX like other modes do
- small optimizations in the graphics update code
I've got a game that uses OPL2 functions. It's still not
working yet, but this patch brings it closer. Using Jeffrey S.
Lee's "Programming the AdLib/Sound Blaster FM Music Chips (Ver
2.0)"[1] as a reference, I found an inversion of the OPL timer
masks in the sb16 code. Without this patch, the emulator uses
the wrong bits for masking, and completely botches the flags
register (note the bitwise AND vs OR).
double width)
- cleanup in modeX emulation similar to mode 13h
- consider start address in function mem_write for VGA modes
- register 0x03c8 is readable, too
- clear tile array when switching to graphics mode, clear text snapshot when
switching to text mode, do the same when changing the palette or disable video
- simplified the function determine_screen_dimensions()
- fixed the code for the CGA mode 640x200x2 in update() and mem_write()
According to the Intel manuals:
The LOCK prefix can be prepended only to the following instructions
and only to those forms of the instructions where the destination
operand is a memory operand: ADD, ADC, AND, BTC, BTR, BTS, CMPXCHG,
CMPXCH8B, DEC, INC, NEG, NOT, OR, SBB, SUB, XOR, XADD, and XCHG. If
the LOCK prefix is used with one of these instructions and the source
operand is a memory operand, an undefined opcode exception (#UD) will
be generated. An undefined opcode exception will also be generated if
the LOCK prefix is used with any instruction not in the above list.
Checking of the LOCK prefix done in fetchDecode state and not overloads
Bochs's execution.
