Little style changes
Elliminated i387_t alimit field (not used in FPU)
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@ -1,5 +1,5 @@
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/////////////////////////////////////////////////////////////////////////
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// $Id: fetchdecode.cc,v 1.47 2003-04-06 19:08:24 sshwarts Exp $
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// $Id: fetchdecode.cc,v 1.48 2003-04-16 18:38:50 sshwarts Exp $
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/////////////////////////////////////////////////////////////////////////
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//
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// Copyright (C) 2001 MandrakeSoft S.A.
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@ -1713,8 +1713,8 @@ static BxOpcodeInfo_t BxOpcodeInfo[512*2] = {
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/* 0F 7B */ { 0, &BX_CPU_C::BxError },
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/* 0F 7C */ { 0, &BX_CPU_C::BxError },
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/* 0F 7D */ { 0, &BX_CPU_C::BxError },
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/* 0F 7E */ { BxAnother | BxPrefixSSE, NULL, BxOpcodeGroupSSE_0f7e },
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/* 0F 7F */ { BxAnother | BxPrefixSSE, NULL, BxOpcodeGroupSSE_0f7f },
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/* 0F 7E */ { BxAnother | BxPrefixSSE, NULL, BxOpcodeGroupSSE_0f7e },
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/* 0F 7F */ { BxAnother | BxPrefixSSE, NULL, BxOpcodeGroupSSE_0f7f },
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/* 0F 80 */ { BxImmediate_BrOff16, &BX_CPU_C::JCC_Jw },
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/* 0F 81 */ { BxImmediate_BrOff16, &BX_CPU_C::JCC_Jw },
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/* 0F 82 */ { BxImmediate_BrOff16, &BX_CPU_C::JCC_Jw },
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@ -2040,7 +2040,7 @@ static BxOpcodeInfo_t BxOpcodeInfo[512*2] = {
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/* C0 */ { BxAnother | BxGroup2 | BxImmediate_Ib, NULL, BxOpcodeInfoG2Eb },
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/* C1 */ { BxAnother | BxGroup2 | BxImmediate_Ib, NULL, BxOpcodeInfoG2Ed },
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/* C2 */ { BxImmediate_Iw, &BX_CPU_C::RETnear32_Iw },
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/* C3 */ { 0, &BX_CPU_C::RETnear32 },
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/* C3 */ { 0, &BX_CPU_C::RETnear32 },
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/* C4 */ { BxAnother, &BX_CPU_C::LES_GvMp },
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/* C5 */ { BxAnother, &BX_CPU_C::LDS_GvMp },
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/* C6 */ { BxAnother | BxImmediate_Ib, &BX_CPU_C::MOV_EbIb },
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@ -2236,8 +2236,8 @@ static BxOpcodeInfo_t BxOpcodeInfo[512*2] = {
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/* 0F 7B */ { 0, &BX_CPU_C::BxError },
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/* 0F 7C */ { 0, &BX_CPU_C::BxError },
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/* 0F 7D */ { 0, &BX_CPU_C::BxError },
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/* 0F 7E */ { BxAnother | BxPrefixSSE, NULL, BxOpcodeGroupSSE_0f7e },
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/* 0F 7F */ { BxAnother | BxPrefixSSE, NULL, BxOpcodeGroupSSE_0f7f },
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/* 0F 7E */ { BxAnother | BxPrefixSSE, NULL, BxOpcodeGroupSSE_0f7e },
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/* 0F 7F */ { BxAnother | BxPrefixSSE, NULL, BxOpcodeGroupSSE_0f7f },
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/* 0F 80 */ { BxImmediate_BrOff32, &BX_CPU_C::JCC_Jd },
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/* 0F 81 */ { BxImmediate_BrOff32, &BX_CPU_C::JCC_Jd },
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/* 0F 82 */ { BxImmediate_BrOff32, &BX_CPU_C::JCC_Jd },
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@ -1,5 +1,5 @@
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/////////////////////////////////////////////////////////////////////////
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// $Id: fetchdecode64.cc,v 1.45 2003-04-09 19:20:05 sshwarts Exp $
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// $Id: fetchdecode64.cc,v 1.46 2003-04-16 18:38:50 sshwarts Exp $
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/////////////////////////////////////////////////////////////////////////
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//
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// Copyright (C) 2001 MandrakeSoft S.A.
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@ -2645,7 +2645,7 @@ static BxOpcodeInfo_t BxOpcodeInfo64[512*3] = {
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/* C0 */ { BxAnother | BxGroup2 | BxImmediate_Ib, NULL, BxOpcodeInfo64G2Eb },
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/* C1 */ { BxAnother | BxGroup2 | BxImmediate_Ib, NULL, BxOpcodeInfo64G2Eq },
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/* C2 */ { BxImmediate_Iw, &BX_CPU_C::RETnear64_Iw },
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/* C3 */ { 0, &BX_CPU_C::RETnear64 },
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/* C3 */ { 0, &BX_CPU_C::RETnear64 },
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/* C4 */ { 0, &BX_CPU_C::BxError },
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/* C5 */ { 0, &BX_CPU_C::BxError },
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/* C6 */ { BxAnother | BxImmediate_Ib, &BX_CPU_C::MOV_EbIb },
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@ -14,12 +14,12 @@ struct i387_t {
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Bit32s fcs;
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Bit32s foo;
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Bit32s fos;
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Bit32s aligment;
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Bit32s align32;
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Bit64u st_space[16]; // 8*16 bytes per FP-reg (aligned) = 128 bytes
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unsigned char tos;
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unsigned char no_update;
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unsigned char rm;
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unsigned char alimit;
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unsigned align8;
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};
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// Endian Host byte order Guest (x86) byte order
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@ -29,11 +29,11 @@ struct i387_t {
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//
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// Legend: F - fraction/mmx
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// E - exponent
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// A - aligment
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// A - alignment
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#ifdef BX_BIG_ENDIAN
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struct BxFpuRegister {
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Bit16u aligment1, aligment2, aligment3;
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Bit16u alignment1, alignment2, alignment3;
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Bit16s exp; /* Signed quantity used in internal arithmetic. */
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Bit32u sigh;
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Bit32u sigl;
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@ -43,7 +43,7 @@ struct BxFpuRegister {
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Bit32u sigl;
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Bit32u sigh;
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Bit16s exp; /* Signed quantity used in internal arithmetic. */
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Bit16u aligment1, aligment2, aligment3;
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Bit16u alignment1, alignment2, alignment3;
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} GCC_ATTRIBUTE((aligned(16), packed));
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#endif
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@ -148,11 +148,11 @@ typedef union {
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//
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// Legend: F - fraction/mmx
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// E - exponent
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// A - aligment
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// A - alignment
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#ifdef BX_BIG_ENDIAN
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struct bx_mmx_reg_t {
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Bit16u aligment1, aligment2, aligment3;
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Bit16u alignment1, alignment2, alignment3;
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Bit16u exp; /* 2 byte FP-reg exponent */
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BxPackedMmxRegister packed_mmx_register;
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} GCC_ATTRIBUTE((aligned(16), packed));
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@ -160,7 +160,7 @@ struct bx_mmx_reg_t {
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struct bx_mmx_reg_t {
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BxPackedMmxRegister packed_mmx_register;
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Bit16u exp; /* 2 byte FP reg exponent */
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Bit16u aligment1, aligment2, aligment3;
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Bit16u alignment1, alignment2, alignment3;
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} GCC_ATTRIBUTE((aligned(16), packed));
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#endif
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@ -103,12 +103,12 @@ void BX_CPU_C::prepareMMX(void)
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exception(BX_UD_EXCEPTION, 0, 0);
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/* check SW_Summary bit for a pending FPU exceptions */
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if(FPU_PARTIAL_STATUS & 0x0080)
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#define FPU_SW_SUMMARY 0x0080
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if(FPU_PARTIAL_STATUS & FPU_SW_SUMMARY)
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exception(BX_MF_EXCEPTION, 0, 0);
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FPU_TWD = 0;
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FPU_TOS = 0; /* reset FPU Top-Of-Stack */
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//FPU_PARTIAL_STATUS &= 0xc7ff;
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}
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#endif
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@ -853,7 +853,6 @@ void BX_CPU_C::MOVDQ2Q_PqVRq(bxInstruction_c *i)
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FPU_TWD = 0;
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FPU_TOS = 0;
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//FPU_PARTIAL_STATUS &= 0xc7ff;
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BX_WRITE_MMX_REG(i->rm(), mm);
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#else
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@ -875,7 +874,6 @@ void BX_CPU_C::MOVQ2DQ_VdqQq(bxInstruction_c *i)
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FPU_TWD = 0;
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FPU_TOS = 0;
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//FPU_PARTIAL_STATUS &= 0xc7ff;
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BX_WRITE_XMM_REG(i->rm(), op);
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#else
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@ -1,6 +1,6 @@
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/*---------------------------------------------------------------------------+
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| fpu_entry.c |
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| $Id: fpu_entry.c,v 1.6 2003-04-12 21:02:07 sshwarts Exp $
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| $Id: fpu_entry.c,v 1.7 2003-04-16 18:38:52 sshwarts Exp $
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| |
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| The entry functions for wm-FPU-emu |
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@ -197,13 +197,16 @@ do_the_FPU_interrupt:
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/* Stack underflow has priority */
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if ( NOT_EMPTY_ST0 ) {
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#ifndef USE_WITH_CPU_SIM
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/* memory access limits checked in FPU_verify_area */
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if ( addr_modes.default_mode & PROTECTED )
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{
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/* This table works for 16 and 32 bit protected mode */
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if ( access_limit < data_sizes_16[(byte1 >> 1) & 3] )
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math_abort(FPU_info, SIGSEGV);
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}
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#endif
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unmasked = 0; /* Do this here to stop compiler warnings. */
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switch ( (byte1 >> 1) & 3 )
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{
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@ -1,5 +1,5 @@
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/////////////////////////////////////////////////////////////////////////
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// $Id: fpu_proto.h,v 1.5 2003-03-02 23:59:09 cbothamy Exp $
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// $Id: fpu_proto.h,v 1.6 2003-04-16 18:38:52 sshwarts Exp $
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/////////////////////////////////////////////////////////////////////////
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//
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// Copyright (C) 2001 MandrakeSoft S.A.
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@ -110,11 +110,6 @@ extern void FPU_copy_to_reg0(FPU_REG const *r, u_char tag) BX_CPP_AttrRegparmN(2
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/* fpu_trig.c */
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extern void FPU_triga(void);
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extern void FPU_trigb(void);
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/* get_address.c */
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extern void *FPU_get_address(u_char FPU_modrm, u32 *fpu_eip,
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struct address *addr, fpu_addr_modes addr_modes);
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extern void *FPU_get_address_16(u_char FPU_modrm, u32 *fpu_eip,
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struct address *addr, fpu_addr_modes addr_modes);
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/* load_store.c */
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extern int FPU_load_store(u_char type, fpu_addr_modes addr_modes,
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void *data_address);
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/*---------------------------------------------------------------------------+
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| fpu_system.h |
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| $Id: fpu_system.h,v 1.7 2003-04-12 21:02:07 sshwarts Exp $
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| $Id: fpu_system.h,v 1.8 2003-04-16 18:38:52 sshwarts Exp $
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| |
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| Copyright (C) 1992,1994,1997 |
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| W. Metzenthen, 22 Parker St, Ormond, Vic 3163, |
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@ -78,11 +78,6 @@ extern struct i387_t *current_i387;
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#define no_ip_update (*(u_char *)&(i387.no_update))
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#define FPU_rm (*(u_char *)&(i387.rm))
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/* Number of bytes of data which can be legally accessed by the current
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instruction. This only needs to hold a number <= 108, so a byte will do. */
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#define access_limit (*(u_char *)&(i387.alimit))
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#define partial_status (i387.swd)
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#define control_word (i387.cwd)
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#define fpu_tag_word (i387.twd)
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@ -92,7 +87,7 @@ extern struct i387_t *current_i387;
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#define instruction_address (*(struct address *)&i387.fip)
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#define operand_address (*(struct address *)&i387.foo)
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#define FPU_verify_area(x,y,z) fpu_verify_area(x,y,z)
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#define FPU_verify_area(x,y,z) fpu_verify_area((x),(y),(z))
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#define FPU_get_user(x,y) ((x) = fpu_get_user((y), sizeof(*(y))))
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#define FPU_put_user(val,ptr) fpu_put_user((val),(ptr),sizeof(*(ptr)))
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/*---------------------------------------------------------------------------+
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| get_address.c |
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| $Id: get_address.c,v 1.3 2001-10-06 03:53:46 bdenney Exp $
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| $Id: get_address.c,v 1.4 2003-04-16 18:38:53 sshwarts Exp $
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| |
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| Get the effective address from an FPU instruction. |
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@ -18,6 +18,7 @@
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| other processes using the emulator while swapping is in progress. |
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+---------------------------------------------------------------------------*/
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#ifndef USE_WITH_CPU_SIM
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#include <linux/stddef.h>
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@ -444,3 +445,5 @@ void *FPU_get_address_16(u_char FPU_modrm, u32 *fpu_eip,
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return (void *)address ;
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}
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#endif
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@ -1,6 +1,6 @@
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/*---------------------------------------------------------------------------+
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| load_store.c |
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| $Id: load_store.c,v 1.5 2003-04-12 21:02:07 sshwarts Exp $
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| $Id: load_store.c,v 1.6 2003-04-16 18:38:53 sshwarts Exp $
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| |
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| This file contains most of the code to interpret the FPU instructions |
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| which load and store from user memory. |
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@ -67,8 +67,10 @@ int FPU_load_store(u_char type, fpu_addr_modes addr_modes,
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u_char st0_tag = TAG_Empty; /* This is just to stop a gcc warning. */
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u_char loaded_tag;
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st0_ptr = (FPU_REG*) NULL; /* Initialized just to stop compiler warnings. */
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st0_ptr = (FPU_REG*) NULL; /* Initialized just to stop compiler warnings. */
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#ifndef USE_WITH_CPU_SIM
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/* memory access limits checked in FPU_verify_area */
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if ( addr_modes.default_mode & PROTECTED )
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{
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if ( addr_modes.default_mode == SEG32 )
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@ -86,6 +88,7 @@ int FPU_load_store(u_char type, fpu_addr_modes addr_modes,
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EXCEPTION(EX_INTERNAL|0x140);
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#endif /* PARANOID */
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}
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#endif
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switch ( type_table[type] )
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{
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else
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addr_modes.override.operand_size = OP_SIZE_PREFIX;
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// For now set access_limit to max. It seems to be
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// a number from 0..255 denoting how many bytes the
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// current instruction can access according to its
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// memory operand. 255 means >= 255.
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access_limit = 0xff;
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// fill in orig eip here in offset
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// fill in CS in selector
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entry_sel_off.offset = BX_CPU_THIS_PTR prev_eip;
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