diff --git a/bochs/cpu/fetchdecode.cc b/bochs/cpu/fetchdecode.cc
index 09048ad19..2e7b3a772 100644
--- a/bochs/cpu/fetchdecode.cc
+++ b/bochs/cpu/fetchdecode.cc
@@ -1,5 +1,5 @@
 /////////////////////////////////////////////////////////////////////////
-// $Id: fetchdecode.cc,v 1.47 2003-04-06 19:08:24 sshwarts Exp $
+// $Id: fetchdecode.cc,v 1.48 2003-04-16 18:38:50 sshwarts Exp $
 /////////////////////////////////////////////////////////////////////////
 //
 //  Copyright (C) 2001  MandrakeSoft S.A.
@@ -1713,8 +1713,8 @@ static BxOpcodeInfo_t BxOpcodeInfo[512*2] = {
   /* 0F 7B */  { 0, &BX_CPU_C::BxError },
   /* 0F 7C */  { 0, &BX_CPU_C::BxError },
   /* 0F 7D */  { 0, &BX_CPU_C::BxError },
-  /* 0F 7E */  { BxAnother | BxPrefixSSE, NULL,  BxOpcodeGroupSSE_0f7e }, 
-  /* 0F 7F */  { BxAnother | BxPrefixSSE, NULL,  BxOpcodeGroupSSE_0f7f }, 
+  /* 0F 7E */  { BxAnother | BxPrefixSSE, NULL, BxOpcodeGroupSSE_0f7e }, 
+  /* 0F 7F */  { BxAnother | BxPrefixSSE, NULL, BxOpcodeGroupSSE_0f7f }, 
   /* 0F 80 */  { BxImmediate_BrOff16, &BX_CPU_C::JCC_Jw },
   /* 0F 81 */  { BxImmediate_BrOff16, &BX_CPU_C::JCC_Jw },
   /* 0F 82 */  { BxImmediate_BrOff16, &BX_CPU_C::JCC_Jw },
@@ -2040,7 +2040,7 @@ static BxOpcodeInfo_t BxOpcodeInfo[512*2] = {
   /* C0 */  { BxAnother | BxGroup2 | BxImmediate_Ib, NULL, BxOpcodeInfoG2Eb },
   /* C1 */  { BxAnother | BxGroup2 | BxImmediate_Ib, NULL, BxOpcodeInfoG2Ed },
   /* C2 */  { BxImmediate_Iw, &BX_CPU_C::RETnear32_Iw },
-  /* C3 */  { 0,               &BX_CPU_C::RETnear32 },
+  /* C3 */  { 0,              &BX_CPU_C::RETnear32 },
   /* C4 */  { BxAnother, &BX_CPU_C::LES_GvMp },
   /* C5 */  { BxAnother, &BX_CPU_C::LDS_GvMp },
   /* C6 */  { BxAnother | BxImmediate_Ib, &BX_CPU_C::MOV_EbIb },
@@ -2236,8 +2236,8 @@ static BxOpcodeInfo_t BxOpcodeInfo[512*2] = {
   /* 0F 7B */  { 0, &BX_CPU_C::BxError },
   /* 0F 7C */  { 0, &BX_CPU_C::BxError },
   /* 0F 7D */  { 0, &BX_CPU_C::BxError },
-  /* 0F 7E */  { BxAnother | BxPrefixSSE, NULL,  BxOpcodeGroupSSE_0f7e }, 
-  /* 0F 7F */  { BxAnother | BxPrefixSSE, NULL,  BxOpcodeGroupSSE_0f7f }, 
+  /* 0F 7E */  { BxAnother | BxPrefixSSE, NULL, BxOpcodeGroupSSE_0f7e }, 
+  /* 0F 7F */  { BxAnother | BxPrefixSSE, NULL, BxOpcodeGroupSSE_0f7f }, 
   /* 0F 80 */  { BxImmediate_BrOff32, &BX_CPU_C::JCC_Jd },
   /* 0F 81 */  { BxImmediate_BrOff32, &BX_CPU_C::JCC_Jd },
   /* 0F 82 */  { BxImmediate_BrOff32, &BX_CPU_C::JCC_Jd },
diff --git a/bochs/cpu/fetchdecode64.cc b/bochs/cpu/fetchdecode64.cc
index 9cd279065..cc87daa6a 100644
--- a/bochs/cpu/fetchdecode64.cc
+++ b/bochs/cpu/fetchdecode64.cc
@@ -1,5 +1,5 @@
 /////////////////////////////////////////////////////////////////////////
-// $Id: fetchdecode64.cc,v 1.45 2003-04-09 19:20:05 sshwarts Exp $
+// $Id: fetchdecode64.cc,v 1.46 2003-04-16 18:38:50 sshwarts Exp $
 /////////////////////////////////////////////////////////////////////////
 //
 //  Copyright (C) 2001  MandrakeSoft S.A.
@@ -2645,7 +2645,7 @@ static BxOpcodeInfo_t BxOpcodeInfo64[512*3] = {
   /* C0 */  { BxAnother | BxGroup2 | BxImmediate_Ib, NULL, BxOpcodeInfo64G2Eb },
   /* C1 */  { BxAnother | BxGroup2 | BxImmediate_Ib, NULL, BxOpcodeInfo64G2Eq },
   /* C2 */  { BxImmediate_Iw, &BX_CPU_C::RETnear64_Iw },
-  /* C3 */  { 0,             &BX_CPU_C::RETnear64 },
+  /* C3 */  { 0,              &BX_CPU_C::RETnear64 },
   /* C4 */  { 0, &BX_CPU_C::BxError },
   /* C5 */  { 0, &BX_CPU_C::BxError },
   /* C6 */  { BxAnother | BxImmediate_Ib, &BX_CPU_C::MOV_EbIb },
diff --git a/bochs/cpu/i387.h b/bochs/cpu/i387.h
index 1630f63f6..d6bd458d4 100644
--- a/bochs/cpu/i387.h
+++ b/bochs/cpu/i387.h
@@ -14,12 +14,12 @@ struct i387_t {
     Bit32s fcs;
     Bit32s foo;
     Bit32s fos;
-    Bit32s aligment;	 
+    Bit32s align32;
     Bit64u st_space[16]; // 8*16 bytes per FP-reg (aligned) = 128 bytes
     unsigned char tos;
     unsigned char no_update;
     unsigned char rm;
-    unsigned char alimit;
+    unsigned align8;
 };
 
 // Endian  Host byte order         Guest (x86) byte order
@@ -29,11 +29,11 @@ struct i387_t {
 //
 // Legend: F - fraction/mmx
 //         E - exponent
-//         A - aligment
+//         A - alignment
 
 #ifdef BX_BIG_ENDIAN
 struct BxFpuRegister {
-  Bit16u aligment1, aligment2, aligment3;
+  Bit16u alignment1, alignment2, alignment3;
   Bit16s exp;   /* Signed quantity used in internal arithmetic. */
   Bit32u sigh;
   Bit32u sigl;
@@ -43,7 +43,7 @@ struct BxFpuRegister {
   Bit32u sigl;
   Bit32u sigh;
   Bit16s exp;   /* Signed quantity used in internal arithmetic. */
-  Bit16u aligment1, aligment2, aligment3;
+  Bit16u alignment1, alignment2, alignment3;
 } GCC_ATTRIBUTE((aligned(16), packed));
 #endif
 
@@ -148,11 +148,11 @@ typedef union {
 //
 // Legend: F - fraction/mmx
 //         E - exponent
-//         A - aligment
+//         A - alignment
 
 #ifdef BX_BIG_ENDIAN
 struct bx_mmx_reg_t {
-   Bit16u aligment1, aligment2, aligment3; 
+   Bit16u alignment1, alignment2, alignment3; 
    Bit16u exp; /* 2 byte FP-reg exponent */
    BxPackedMmxRegister packed_mmx_register;
 } GCC_ATTRIBUTE((aligned(16), packed));
@@ -160,7 +160,7 @@ struct bx_mmx_reg_t {
 struct bx_mmx_reg_t {
    BxPackedMmxRegister packed_mmx_register;
    Bit16u exp; /* 2 byte FP reg exponent */
-   Bit16u aligment1, aligment2, aligment3; 
+   Bit16u alignment1, alignment2, alignment3; 
 } GCC_ATTRIBUTE((aligned(16), packed));
 #endif
 
diff --git a/bochs/cpu/mmx.cc b/bochs/cpu/mmx.cc
index fe3ebb1c4..48a029e76 100644
--- a/bochs/cpu/mmx.cc
+++ b/bochs/cpu/mmx.cc
@@ -103,12 +103,12 @@ void BX_CPU_C::prepareMMX(void)
     exception(BX_UD_EXCEPTION, 0, 0);
 
   /* check SW_Summary bit for a pending FPU exceptions */
-  if(FPU_PARTIAL_STATUS & 0x0080)
+#define FPU_SW_SUMMARY 0x0080
+  if(FPU_PARTIAL_STATUS & FPU_SW_SUMMARY)
     exception(BX_MF_EXCEPTION, 0, 0);
 
   FPU_TWD = 0;
   FPU_TOS = 0;        /* reset FPU Top-Of-Stack */
-//FPU_PARTIAL_STATUS &= 0xc7ff; 
 }
 
 #endif
diff --git a/bochs/cpu/sse_move.cc b/bochs/cpu/sse_move.cc
index dd654e68f..b5378c2c9 100644
--- a/bochs/cpu/sse_move.cc
+++ b/bochs/cpu/sse_move.cc
@@ -853,7 +853,6 @@ void BX_CPU_C::MOVDQ2Q_PqVRq(bxInstruction_c *i)
 
   FPU_TWD  = 0;
   FPU_TOS  = 0;       
-//FPU_PARTIAL_STATUS &= 0xc7ff;
 
   BX_WRITE_MMX_REG(i->rm(), mm);
 #else
@@ -875,7 +874,6 @@ void BX_CPU_C::MOVQ2DQ_VdqQq(bxInstruction_c *i)
 
   FPU_TWD  = 0;
   FPU_TOS  = 0;
-//FPU_PARTIAL_STATUS &= 0xc7ff;
 
   BX_WRITE_XMM_REG(i->rm(), op);
 #else
diff --git a/bochs/fpu/fpu_entry.c b/bochs/fpu/fpu_entry.c
index bd389a483..1a8965a3c 100644
--- a/bochs/fpu/fpu_entry.c
+++ b/bochs/fpu/fpu_entry.c
@@ -1,6 +1,6 @@
 /*---------------------------------------------------------------------------+
  |  fpu_entry.c                                                              |
- |  $Id: fpu_entry.c,v 1.6 2003-04-12 21:02:07 sshwarts Exp $
+ |  $Id: fpu_entry.c,v 1.7 2003-04-16 18:38:52 sshwarts Exp $
  |                                                                           |
  | The entry functions for wm-FPU-emu                                        |
  |                                                                           |
@@ -197,13 +197,16 @@ do_the_FPU_interrupt:
 
           /* Stack underflow has priority */
           if ( NOT_EMPTY_ST0 ) {
+
+#ifndef USE_WITH_CPU_SIM
+              /* memory access limits checked in FPU_verify_area */
               if ( addr_modes.default_mode & PROTECTED )
                 {
                   /* This table works for 16 and 32 bit protected mode */
                   if ( access_limit < data_sizes_16[(byte1 >> 1) & 3] )
                     math_abort(FPU_info, SIGSEGV);
                 }
-
+#endif
               unmasked = 0;  /* Do this here to stop compiler warnings. */
               switch ( (byte1 >> 1) & 3 )
                 {
diff --git a/bochs/fpu/fpu_proto.h b/bochs/fpu/fpu_proto.h
index fc79bdcf6..54295a7f4 100644
--- a/bochs/fpu/fpu_proto.h
+++ b/bochs/fpu/fpu_proto.h
@@ -1,5 +1,5 @@
 /////////////////////////////////////////////////////////////////////////
-// $Id: fpu_proto.h,v 1.5 2003-03-02 23:59:09 cbothamy Exp $
+// $Id: fpu_proto.h,v 1.6 2003-04-16 18:38:52 sshwarts Exp $
 /////////////////////////////////////////////////////////////////////////
 //
 //  Copyright (C) 2001  MandrakeSoft S.A.
@@ -110,11 +110,6 @@ extern void FPU_copy_to_reg0(FPU_REG const *r, u_char tag) BX_CPP_AttrRegparmN(2
 /* fpu_trig.c */
 extern void FPU_triga(void);
 extern void FPU_trigb(void);
-/* get_address.c */
-extern void *FPU_get_address(u_char FPU_modrm, u32 *fpu_eip,
-			 struct address *addr, fpu_addr_modes addr_modes);
-extern void *FPU_get_address_16(u_char FPU_modrm, u32 *fpu_eip,
-			    struct address *addr, fpu_addr_modes addr_modes);
 /* load_store.c */
 extern int FPU_load_store(u_char type, fpu_addr_modes addr_modes,
 			    void *data_address);
diff --git a/bochs/fpu/fpu_system.h b/bochs/fpu/fpu_system.h
index a743797a9..ad6479c12 100644
--- a/bochs/fpu/fpu_system.h
+++ b/bochs/fpu/fpu_system.h
@@ -1,6 +1,6 @@
 /*---------------------------------------------------------------------------+
  |  fpu_system.h                                                             |
- |  $Id: fpu_system.h,v 1.7 2003-04-12 21:02:07 sshwarts Exp $
+ |  $Id: fpu_system.h,v 1.8 2003-04-16 18:38:52 sshwarts Exp $
  |                                                                           |
  | Copyright (C) 1992,1994,1997                                              |
  |                       W. Metzenthen, 22 Parker St, Ormond, Vic 3163,      |
@@ -78,11 +78,6 @@ extern struct i387_t *current_i387;
 #define no_ip_update            (*(u_char *)&(i387.no_update))
 #define FPU_rm                  (*(u_char *)&(i387.rm))
 
-
-/* Number of bytes of data which can be legally accessed by the current
-   instruction. This only needs to hold a number <= 108, so a byte will do. */
-#define access_limit            (*(u_char *)&(i387.alimit))
-
 #define partial_status          (i387.swd)
 #define control_word            (i387.cwd)
 #define fpu_tag_word            (i387.twd)
@@ -92,7 +87,7 @@ extern struct i387_t *current_i387;
 #define instruction_address     (*(struct address *)&i387.fip)
 #define operand_address         (*(struct address *)&i387.foo)
 
-#define FPU_verify_area(x,y,z)	fpu_verify_area(x,y,z)
+#define FPU_verify_area(x,y,z)	fpu_verify_area((x),(y),(z))
 #define FPU_get_user(x,y)       ((x) = fpu_get_user((y), sizeof(*(y))))
 #define FPU_put_user(val,ptr)   fpu_put_user((val),(ptr),sizeof(*(ptr)))
 
diff --git a/bochs/fpu/get_address.c b/bochs/fpu/get_address.c
index 9beb7e859..78b532123 100644
--- a/bochs/fpu/get_address.c
+++ b/bochs/fpu/get_address.c
@@ -1,6 +1,6 @@
 /*---------------------------------------------------------------------------+
  |  get_address.c                                                            |
- |  $Id: get_address.c,v 1.3 2001-10-06 03:53:46 bdenney Exp $
+ |  $Id: get_address.c,v 1.4 2003-04-16 18:38:53 sshwarts Exp $
  |                                                                           |
  | Get the effective address from an FPU instruction.                        |
  |                                                                           |
@@ -18,6 +18,7 @@
  |    other processes using the emulator while swapping is in progress.      |
  +---------------------------------------------------------------------------*/
 
+#ifndef USE_WITH_CPU_SIM
 
 #include <linux/stddef.h>
 
@@ -444,3 +445,5 @@ void *FPU_get_address_16(u_char FPU_modrm, u32 *fpu_eip,
 
   return (void *)address ;
 }
+
+#endif
diff --git a/bochs/fpu/load_store.c b/bochs/fpu/load_store.c
index 4737bf214..a8bfd67f9 100644
--- a/bochs/fpu/load_store.c
+++ b/bochs/fpu/load_store.c
@@ -1,6 +1,6 @@
 /*---------------------------------------------------------------------------+
  |  load_store.c                                                             |
- |  $Id: load_store.c,v 1.5 2003-04-12 21:02:07 sshwarts Exp $
+ |  $Id: load_store.c,v 1.6 2003-04-16 18:38:53 sshwarts Exp $
  |                                                                           |
  | This file contains most of the code to interpret the FPU instructions     |
  | which load and store from user memory.                                    |
@@ -67,8 +67,10 @@ int FPU_load_store(u_char type, fpu_addr_modes addr_modes,
   u_char st0_tag = TAG_Empty;  /* This is just to stop a gcc warning. */
   u_char loaded_tag;
 
-  st0_ptr = (FPU_REG*) NULL;    /* Initialized just to stop compiler warnings. */
+  st0_ptr = (FPU_REG*) NULL;   /* Initialized just to stop compiler warnings. */
 
+#ifndef USE_WITH_CPU_SIM
+  /* memory access limits checked in FPU_verify_area */
   if ( addr_modes.default_mode & PROTECTED )
     {
       if ( addr_modes.default_mode == SEG32 )
@@ -86,6 +88,7 @@ int FPU_load_store(u_char type, fpu_addr_modes addr_modes,
 	EXCEPTION(EX_INTERNAL|0x140);
 #endif /* PARANOID */
     }
+#endif
 
   switch ( type_table[type] )
     {
diff --git a/bochs/fpu/wmFPUemu_glue.cc b/bochs/fpu/wmFPUemu_glue.cc
index dd0ad0688..b024752c8 100644
--- a/bochs/fpu/wmFPUemu_glue.cc
+++ b/bochs/fpu/wmFPUemu_glue.cc
@@ -119,12 +119,6 @@ BX_CPU_C::fpu_execute(bxInstruction_c *i)
   else
     addr_modes.override.operand_size = OP_SIZE_PREFIX;
 
-  // For now set access_limit to max.  It seems to be
-  // a number from 0..255 denoting how many bytes the
-  // current instruction can access according to its
-  // memory operand.  255 means >= 255.
-access_limit = 0xff;
-
   // fill in orig eip here in offset
   // fill in CS in selector
   entry_sel_off.offset = BX_CPU_THIS_PTR prev_eip;