Stanislav Shwartsman
cceb0a5a17
invept/invvpid disasm
2010-03-26 10:39:40 +00:00
Stanislav Shwartsman
9147ac4b63
MOVMSKPD/PS fix
2010-03-19 14:43:13 +00:00
Stanislav Shwartsman
0ead9fe8ae
new opcode grp
2010-03-07 08:08:40 +00:00
Stanislav Shwartsman
c841eaa953
fixes and cleanups in disasm and decoder
2010-02-09 19:44:25 +00:00
Stanislav Shwartsman
8330354f67
split disasm to more files
2010-02-08 15:11:58 +00:00
Stanislav Shwartsman
17e513fa8a
disasm fix
2010-01-31 10:17:42 +00:00
Stanislav Shwartsman
eae084920a
optimized decode tables
2010-01-31 09:45:27 +00:00
Stanislav Shwartsman
7254ea36a1
copyright fixes + small optimization
2009-10-14 20:45:29 +00:00
Stanislav Shwartsman
8a4ac11700
more verbose maskmov disasm
2009-08-21 13:45:38 +00:00
Stanislav Shwartsman
db098a1205
Fix dependencies of CPU code from disasm library
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Regent Makefile.in for CPU
2009-01-19 19:01:03 +00:00
Stanislav Shwartsman
405fcfd75d
Reorganize 3-byte opcode tables - bigger tables but easier to maintain them
2008-02-29 03:02:03 +00:00
Stanislav Shwartsman
8615022962
Added first stubs for XSAVE/XRESTOR implementation
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Disassemble XSAVE/XRSTOR instructions (4 instructions)
Update CHANGES - a bit speculatively
2008-02-12 22:41:39 +00:00
Stanislav Shwartsman
0dc4badfbb
Added SSE4A and SSE4_2 to disassembler
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Implemented POPCNT instruction
2007-09-19 19:38:10 +00:00
Stanislav Shwartsman
016660698e
just code cleanup, preparation for future
2007-08-31 18:09:34 +00:00
Stanislav Shwartsman
5189cfbf10
SSE4 support
2007-04-19 16:12:21 +00:00
Stanislav Shwartsman
003c2f59e6
Added missed CVS header to several files
2006-04-27 15:11:45 +00:00
Stanislav Shwartsman
f8c3968d42
Changes list made after CVS service crash:
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- Fixed critical bug in CPU code added with one of the prev commits
- Disasm support for SSE4
- Rename PNI->SSE3 everywhere in the code
- Correctly decode, disassemble and execute 'XCHG R8, rAX' x86-64 instruction
- Correctly decode, disassemble and execute multi-byte NOP 0F F1 opcode
- Fixed ENTER and LEAVE instructions in x86-64 mode
- Added ability to turn ON instruction trace, only GUI support is missed.
Instruction trace could be enabled if Bochs was compiled with disasm
- More changes Bit32u -> bx_phy_address
- Complete preliminary implementation of SMM in Bochs, SMI is still PANICs but if you press 'continue' everything should work OK
- Small code cleanup
- Update CHANGES and user docs
2006-04-05 17:31:35 +00:00
Stanislav Shwartsman
bc4ca51055
Fixed disasm of 'enter' instruction in AT&T mode
2006-03-23 17:43:39 +00:00
Stanislav Shwartsman
2dc81b172a
Fixed several disasm bugs
2006-02-17 13:33:05 +00:00
Stanislav Shwartsman
276c006129
Merge new disasm module with x96-64 support
2005-12-23 14:15:13 +00:00
Stanislav Shwartsman
40d8016e90
Fix disasm for FCOMI instructions
2005-11-17 17:42:15 +00:00
Stanislav Shwartsman
5af5d80602
Small disasm fixes
2005-10-23 20:43:32 +00:00
Stanislav Shwartsman
d1c722211e
Fix duplicate opcodes, fix opcode names and disasm bugs
2005-09-23 16:45:41 +00:00
Stanislav Shwartsman
6244d43607
Fixed disasm bugs
2005-09-22 21:49:16 +00:00
Stanislav Shwartsman
7a6931159f
Pre-support 64 bit disasm. For noew just cleanup to minimize diff
2005-09-12 16:46:54 +00:00
Stanislav Shwartsman
59f9763f5b
Fix typo
2005-08-21 18:24:45 +00:00
Stanislav Shwartsman
9306266580
Add missed "duplicated opcode group" to dis_tables.h
2004-12-12 22:17:13 +00:00
Stanislav Shwartsman
b009c2d1d7
disasm for instructions IRETD, PUSHFD, POPFD, PUSHAD, POPAD
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cVS: ----------------------------------------------------------------------
2004-12-11 21:28:00 +00:00
Stanislav Shwartsman
8ac3790ab3
Added experimental support of AT&T syntax to disasm
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Fixed operand for CMPXCHG8B instruction
Feature request to somebidy who understand Bochs debugger code
- to add Bochs debugger command which will switch between
Intel and AT&T style for disassembler.
2004-12-10 14:04:57 +00:00
Stanislav Shwartsman
a0efe5e577
small cleanup disasm code
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implement branch taken/not taken indication for conditional Jcc insructions
2004-12-09 23:19:48 +00:00
Stanislav Shwartsman
139baaebf5
Fix OP_X and OP_Y methods for disasm
2004-12-09 20:01:00 +00:00
Stanislav Shwartsman
9d1b401512
Fixed several disassembler bugs
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Prepared for AT&T style support in Bochs disassembler
- it already supports all AT&T style except opcode name suffixes
- AT&T support in future will be possible to enable from bx_debugger
2004-12-08 18:54:15 +00:00
Stanislav Shwartsman
69c0b06955
fixes in disassembler
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split REPEAT instructions according to opsize to speedup execution
now each REPEATABLE instruction splitted to 3 different instructions, one for 16-bit operand size, one for 32-bit and one for 64-bit. Choosing of correct instruction occure in fetchdecode step.
2004-11-20 23:26:32 +00:00
Stanislav Shwartsman
31f5ceb522
everal fixes in disasm
2004-10-22 22:56:59 +00:00
Stanislav Shwartsman
21f43f42fa
Some preparations and cleanups for future x86-64
2004-10-17 22:05:17 +00:00
Stanislav Shwartsman
b37ae8a969
added new option --enable-show-ips to configure -> allow to enable BX_SHOW_IPS through configure script
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fixed print prefixes in disasm -> only LOCK, REP and REPNE prefixes printed
update changes
2004-10-16 21:17:44 +00:00
Stanislav Shwartsman
158ba92f2e
Fixed MOV opcode 0xA3, had wrong operand size (h.johansson) - disasm
2004-07-28 19:02:40 +00:00
Stanislav Shwartsman
35741f5cbd
Fix configure script for Peter Tattam
2004-07-15 19:57:31 +00:00
Stanislav Shwartsman
50aaf8ec6f
Implemented FFREEP 287+ compatability instruction
2004-07-15 19:45:33 +00:00
Stanislav Shwartsman
3274e0dd12
Commit patch
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[ 950905 ] Do not PANIC on rare, bad input from user-mode
by h.johansson
with little changes and fixes
2004-05-10 21:05:51 +00:00
Stanislav Shwartsman
7b35ac3575
Added two missed diassembler table entries
2004-01-02 11:56:59 +00:00
Stanislav Shwartsman
fd60a984a0
Instructions that should not check pending FPU exceptions
2003-12-28 18:58:15 +00:00
Stanislav Shwartsman
0eb71999db
Added missed 287 opcodes which should be executed as NOP in 387+
2003-12-28 18:19:41 +00:00
Stanislav Shwartsman
dacdaadf3d
I forgot to add thos file last time
2003-12-27 09:27:26 +00:00