Stanislav Shwartsman
c8cd1f805a
Enabled LAHF/SAHF for x86-64 mode
2006-01-17 19:50:42 +00:00
Stanislav Shwartsman
8c91790680
Redefine registers accessors in cpu.h
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Change BxSupportPAE and BxSupportGlobalPages macros to Bochs style names
Set bx_cpu_id in BX_CPU_C constructor (safe way)
Backup cpu-level check for paging features at compile time (already checked in configure)
Some warnings and indent fixes
speed up get_segment_base method for x86-64 case
2005-11-26 21:36:51 +00:00
Stanislav Shwartsman
e83c77db49
Preparing to VME implementation
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DO NOT ENABLE VME option until the implementation will be completed !
2005-10-16 23:13:19 +00:00
Stanislav Shwartsman
8be190d848
Implemented RDTSCP instruction
2005-08-05 12:47:33 +00:00
Stanislav Shwartsman
663f7d5ef3
CMPXCHG16B instruction implemented
2005-05-19 20:25:16 +00:00
Stanislav Shwartsman
77e398b47b
Added comments for cpuid flags
2005-04-20 18:12:54 +00:00
Stanislav Shwartsman
3074078297
Added CVS version header to all the files.
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One more small change in APIC
2005-03-19 20:44:01 +00:00
Stanislav Shwartsman
76e0f2cc95
Fixed AMD cpuid
2005-02-20 20:02:54 +00:00
Stanislav Shwartsman
3351723e70
Fixed P4 extended CPUID
2005-02-17 06:07:58 +00:00
Stanislav Shwartsman
91526a90b3
Merged patch
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[1123895] x86-64 gdb/debugger fixes by Avi Kivity
2005-02-16 18:58:48 +00:00
Stanislav Shwartsman
a01347f17d
Extended information for AMD and Intel processors (CPUID)
2005-02-14 21:17:20 +00:00
Stanislav Shwartsman
b69345225b
Correct model_id for Pentium MMX in CPUID
2005-02-13 21:20:48 +00:00
Stanislav Shwartsman
68714924b0
Return local APIC id in CPUID 00000001h function in EBX register
2005-01-29 15:24:57 +00:00
Stanislav Shwartsman
57fcc89274
Non-Execution support impelemented and enabled in CPUID when in x86-64 configuration
2005-01-20 19:37:43 +00:00
Stanislav Shwartsman
8fe15b0ddc
Fixed compilation error
2004-12-17 10:50:49 +00:00
Stanislav Shwartsman
5955549a8d
Fixed bug report [ #879050 ]
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Bochs reports enabled APIC without support
2004-12-14 20:41:55 +00:00
Stanislav Shwartsman
7b62a6e206
Fix reset registers in CPU for #RESET signal
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Extract ICACHE from cpu.h to separate icache.h
2004-11-14 19:29:34 +00:00
Stanislav Shwartsman
5e23909c7c
prepations for NX bit implementation
2004-10-21 18:20:40 +00:00
Stanislav Shwartsman
a28a2c6ce1
Added comments
2004-10-03 20:25:19 +00:00
Stanislav Shwartsman
c9bc4eaf02
1. add comments to CPUID instruction
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2. small cleanup
2004-09-26 20:29:04 +00:00
Stanislav Shwartsman
b6657b1322
NX feature still not implemented in Bochs.
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The change forces CPUID do not report bit 20 (NX bit support)
May be some OS that really checks it will boot better now
2004-09-17 21:01:50 +00:00
Stanislav Shwartsman
016207b222
Commented problematic check in misc_mem.cc
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Implemnted lazy-flags and undocumented flags handling for IMUL instructions
2004-08-30 21:47:24 +00:00
Stanislav Shwartsman
27897c925e
Fix undocumented flags handling for SHL instruction
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remove invalidate_prefetch_q from CPUID
2004-08-27 18:43:23 +00:00
Stanislav Shwartsman
f3730cd784
Implemented two last SSE instructions RSQRTSS and RSQRTPS
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MSDEV workspaces updated with new file
CPUID will detect and CPU will execute FXSAVE/FXRSTOR instructions when cpu-level-hacked=6 and not only when cpu-level=6
2003-12-31 17:35:43 +00:00
Christophe Bothamy
e3bec02532
- fix bug preventing x86-64 detection
2003-12-30 14:14:28 +00:00
Stanislav Shwartsman
ac20b6405a
- FXSAVE/FXRSTOR instructions should be available in P6 mode
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- Added second UD2 opcode to fetchdecode
- Added RDPMC instruction to fetchdecode
- 'changes' updated
2003-10-24 18:34:16 +00:00
Stanislav Shwartsman
9690ed763b
// is not allowed in pure-C
2003-10-05 12:14:02 +00:00
Stanislav Shwartsman
b50fb9e76e
code simplification before FPU development
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print if Bochs supports 3DNOW to log file
2003-09-27 20:58:46 +00:00
Stanislav Shwartsman
15e84d0f5d
dos2unix fixes
2003-09-26 16:07:38 +00:00
Stanislav Shwartsman
789db2603e
Added P4 support to CPUID instruction
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Extracted CPUIS instructions to separate file
2003-09-26 15:32:41 +00:00
