Stanislav Shwartsman
12ad45395b
enable Penryn VMX capabilities with VMX=1, VMX=2 is required for EPT and heavier stuff
2011-09-26 19:36:20 +00:00
Stanislav Shwartsman
0aadf88c07
more polishing for vmx configurability
2011-09-26 18:08:31 +00:00
Stanislav Shwartsman
ea54f40361
keep global pages when needed in INVPCID/INVVPID
2011-09-16 20:52:38 +00:00
Stanislav Shwartsman
88a58b3781
fixed compilation with x86-64=0
2011-09-16 20:12:36 +00:00
Stanislav Shwartsman
330bf62f61
added INVPCID instruction support
2011-09-16 20:06:23 +00:00
Stanislav Shwartsman
d5fcfabb38
bugfix + update changes
2011-09-13 19:38:09 +00:00
Stanislav Shwartsman
02e1a0f23c
Merge lazy flags optimization by Darek Mihocka.
...
I measure slight but consistent speedup of ~1-3% for all guests.
Tested: Windows XP/7 boot 32/64 bit, various Linux live CD
2011-09-12 19:36:53 +00:00
Stanislav Shwartsman
f15bc6cf75
support for NX outside of x86-64.
...
required for Intel Yonah processor which is another interesting CPUID to be added
also found Via C7 CPUID, looking for the way to add it too
2011-08-10 22:04:33 +00:00
Stanislav Shwartsman
1b27438146
cleanups + small code reorg
2011-08-10 20:31:29 +00:00
Stanislav Shwartsman
2ee0029749
extract ffxsr support to separate CPU feature
2011-08-04 19:02:49 +00:00
Stanislav Shwartsman
7a157cf88d
fixed vmexit for xsetbv and getsec
2011-07-30 13:21:31 +00:00
Stanislav Shwartsman
e48765a511
VMX fixed, cleanups
2011-07-29 20:22:35 +00:00
Stanislav Shwartsman
1e2c7de064
register state for pause-loop exiting
2011-07-22 09:28:31 +00:00
Stanislav Shwartsman
9c3a4b8dab
impemented pause-loop exiting VMX2 control
2011-07-22 09:19:35 +00:00
Stanislav Shwartsman
d1780b66de
typofix
2011-07-21 21:34:56 +00:00
Stanislav Shwartsman
b4118fcbfe
correct natural width VMX field read/write len
2011-07-21 20:58:54 +00:00
Stanislav Shwartsman
002c86660a
reword all the CPU code in preparation for future CPU speedup implementation.
...
Bochs emulation can be another 10-15% faster using technique described in paper
"Fast Microcode Interpretation with Transactional Commit/Abort"
http://amas-bt.cs.virginia.edu/2011proceedings/amasbt2011-p3.pdf
2011-07-06 20:01:18 +00:00
Stanislav Shwartsman
909e750549
Implemented VMX preemption timer VMEXIT control (patch by Jianan Hao)
2011-07-03 15:59:48 +00:00
Stanislav Shwartsman
08ba847ce4
fix bug inserted with prev commit + cleanup
2011-06-28 16:04:40 +00:00
Stanislav Shwartsman
2f582db722
compile less stuff for cpu-level=5
2011-06-26 19:15:30 +00:00
Stanislav Shwartsman
beafa7c88b
improved x86 hw code bp handling
2011-06-24 13:38:34 +00:00
Stanislav Shwartsman
92bb77ef1d
Merge patch from SF tracker:
...
[3298173] Breakpoint on VMEXIT event by Jianan Hao
Patch description:
The patch provides a new command "vmexitbp" to set breakpoint when VM guest exit. The simulation will be stopped before first HOST mode instruction is executed.
Usage:
Type "vmexitbp" in debugger command window to switch it on/off (similar to modebp).
Currently, the patch has no corresponding interface on GUI debugger. Someone may add it if interested.
2011-05-06 08:19:03 +00:00
Stanislav Shwartsman
024a1ace38
move X2APIC to be .bochsrc option, rework of the cpuid code
2011-04-21 13:27:42 +00:00
Volker Ruppert
c78026a9a2
- deleted executable properties from source files
2011-04-03 10:29:19 +00:00
Stanislav Shwartsman
2b596e1bc4
warning fix
2011-03-27 15:17:38 +00:00
Stanislav Shwartsman
0a88065722
updated instrumentation callbacks
2011-03-22 22:18:40 +00:00
Stanislav Shwartsman
7ced718040
implemented AVX instructions support
...
many changes - some cleanup will follow
please report ay found bugs !
2011-03-19 20:09:34 +00:00
Stanislav Shwartsman
63fe52f601
accessors for DR6 and DR7 fields
2011-03-15 20:20:15 +00:00
Stanislav Shwartsman
7d80a6ebe0
Adding Id and Rev property to all files
2011-02-24 21:54:04 +00:00
Stanislav Shwartsman
fe0685c7f9
fine granular SMC detection (128b granularity used)
...
significant reduction (>80%) of false SMC flushes
2011-01-04 16:17:20 +00:00
Stanislav Shwartsman
c005444d5b
split more SSE opcodes
2010-12-25 07:59:15 +00:00
Stanislav Shwartsman
4a85a8680e
SSE optimization
2010-12-19 07:06:40 +00:00
Stanislav Shwartsman
36291b0b1d
accessor to upper part of 64-bit reg
2010-11-12 20:46:59 +00:00
Stanislav Shwartsman
c676875421
vmcs read/write check
2010-11-12 20:26:01 +00:00
Stanislav Shwartsman
e6981218dc
next step for fully configurable CPU + more optimal VMX execution
...
- check at startup time which VMX fields are accessible
- next step: simplify VMREAD and VMWRITE instructions - eliminate switch statements
2010-11-11 21:41:03 +00:00
Stanislav Shwartsman
93cc615a40
moved vmcs stuff to separate file
2010-11-11 16:25:45 +00:00
Stanislav Shwartsman
8308a47168
trying to get rid of b1() in instruction class
2010-09-24 21:15:16 +00:00
Stanislav Shwartsman
f5a2ca3b48
optimize for x86-64 OFF
2010-04-29 20:03:03 +00:00
Stanislav Shwartsman
ca95477b7f
Implement x86-64 PCID extension
2010-04-29 19:34:32 +00:00
Stanislav Shwartsman
b9be4fcd3e
fix
2010-04-19 11:09:35 +00:00
Stanislav Shwartsman
df07dab80f
verbose phy mem access tracing
2010-04-13 17:56:50 +00:00
Stanislav Shwartsman
6dbafd6f60
bugfix
2010-04-09 15:19:14 +00:00
Stanislav Shwartsman
51b6180b28
don't use magic constant
2010-04-09 11:34:52 +00:00
Stanislav Shwartsman
955e237e46
unrestricted guests support (VMXx2)
2010-04-09 11:31:55 +00:00
Stanislav Shwartsman
546d974248
If CR0.PE = 0, the following instructions cause invalid-opcode exceptions and
...
do not cause VM exits: INVEPT, INVVPID, LLDT, LTR, SLDT, STR, VMCLEAR,
VMLAUNCH, VMPTRLD, VMPTRST, VMREAD, VMRESUME, VMWRITE, VMXOFF,
and VMXON.
2010-04-08 17:00:55 +00:00
Stanislav Shwartsman
6e1204cb84
Merged X2APIC + X2APIC virtualization
2010-04-08 15:50:39 +00:00
Stanislav Shwartsman
df7db31fb4
EPT + VPID - VMXx2 support
2010-04-07 17:12:17 +00:00
Stanislav Shwartsman
21de4f8b8b
remove cr3_masked
2010-04-04 09:04:12 +00:00
Stanislav Shwartsman
25d3d950b2
vmx fix
2010-04-03 19:18:38 +00:00
Stanislav Shwartsman
eab8826173
restore back some code - optimization conflicting with EPT implementation
2010-04-03 18:00:30 +00:00
