2003-05-15 20:41:17 +04:00
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/////////////////////////////////////////////////////////////////////////
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2011-02-25 00:54:04 +03:00
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// $Id$
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2005-03-19 23:44:01 +03:00
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/////////////////////////////////////////////////////////////////////////
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2003-05-15 20:41:17 +04:00
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//
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2015-02-25 22:43:47 +03:00
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// Copyright (c) 2004-2015 Stanislav Shwartsman
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2007-03-24 00:27:13 +03:00
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// Written by Stanislav Shwartsman [sshwarts at sourceforge net]
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2003-05-15 20:41:17 +04:00
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//
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// This library is free software; you can redistribute it and/or
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// modify it under the terms of the GNU Lesser General Public
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// License as published by the Free Software Foundation; either
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// version 2 of the License, or (at your option) any later version.
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//
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// This library is distributed in the hope that it will be useful,
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// but WITHOUT ANY WARRANTY; without even the implied warranty of
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// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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// Lesser General Public License for more details.
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//
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// You should have received a copy of the GNU Lesser General Public
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// License along with this library; if not, write to the Free Software
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2009-01-16 21:18:59 +03:00
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// Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA B 02110-1301 USA
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2003-05-15 20:41:17 +04:00
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//
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2008-01-29 20:13:10 +03:00
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/////////////////////////////////////////////////////////////////////////
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2003-05-15 20:41:17 +04:00
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2004-06-18 18:11:11 +04:00
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#ifndef _BX_I387_RELATED_EXTENSIONS_H_
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#define _BX_I387_RELATED_EXTENSIONS_H_
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2002-09-09 20:11:25 +04:00
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2003-04-13 01:02:08 +04:00
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#if BX_SUPPORT_FPU
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2004-06-18 18:11:11 +04:00
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#include "fpu/softfloat.h"
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#define BX_FPU_REG(index) \
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2010-11-23 18:42:26 +03:00
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(BX_CPU_THIS_PTR the_i387.st_space[index & 0x7])
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2004-06-18 18:11:11 +04:00
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#if defined(NEED_CPU_REG_SHORTCUTS)
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#define FPU_PARTIAL_STATUS (BX_CPU_THIS_PTR the_i387.swd)
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#define FPU_CONTROL_WORD (BX_CPU_THIS_PTR the_i387.cwd)
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#define FPU_TAG_WORD (BX_CPU_THIS_PTR the_i387.twd)
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#define FPU_TOS (BX_CPU_THIS_PTR the_i387.tos)
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#endif
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#include "fpu/tag_w.h"
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#include "fpu/status_w.h"
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#include "fpu/control_w.h"
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extern int FPU_tagof(const floatx80 ®);
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2003-04-13 01:02:08 +04:00
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//
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// Minimal i387 structure
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//
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2008-02-03 00:46:54 +03:00
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struct BOCHSAPI_MSVCONLY i387_t
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2003-10-04 15:04:10 +04:00
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{
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2004-06-18 18:11:11 +04:00
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i387_t() {}
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2003-10-04 15:04:10 +04:00
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2004-06-18 18:11:11 +04:00
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public:
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void init(); // used by FINIT/FNINIT instructions
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void reset(); // called on CPU reset
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int is_IA_masked() const { return (cwd & FPU_CW_Invalid); }
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Bit16u get_control_word() const { return cwd; }
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Bit16u get_tag_word() const { return twd; }
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Bit16u get_status_word() const { return (swd & ~FPU_SW_Top & 0xFFFF) | ((tos << 11) & FPU_SW_Top); }
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Bit16u get_partial_status() const { return swd; }
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void FPU_pop ();
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void FPU_push();
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2004-06-19 23:16:02 +04:00
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void FPU_settagi(int tag, int stnr);
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2008-05-10 17:34:47 +04:00
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void FPU_settagi_valid(int stnr);
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2004-06-19 23:16:02 +04:00
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int FPU_gettagi(int stnr);
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2004-06-18 18:11:11 +04:00
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2004-06-24 01:59:24 +04:00
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floatx80 FPU_read_regi(int stnr) { return st_space[(tos+stnr) & 7]; }
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2008-05-10 17:34:47 +04:00
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void FPU_save_regi(floatx80 reg, int stnr);
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2004-06-19 23:16:02 +04:00
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void FPU_save_regi(floatx80 reg, int tag, int stnr);
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2004-06-18 18:11:11 +04:00
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public:
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Bit16u cwd; // control word
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Bit16u swd; // status word
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Bit16u twd; // tag word
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Bit16u foo; // last instruction opcode
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bx_address fip;
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bx_address fdp;
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Bit16u fcs;
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Bit16u fds;
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floatx80 st_space[8];
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unsigned char tos;
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unsigned char align1;
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unsigned char align2;
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unsigned char align3;
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2003-04-13 01:02:08 +04:00
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};
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2004-06-19 23:16:02 +04:00
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#define IS_TAG_EMPTY(i) \
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2004-06-18 18:11:11 +04:00
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((BX_CPU_THIS_PTR the_i387.FPU_gettagi(i)) == FPU_Tag_Empty)
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2002-09-09 20:11:25 +04:00
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2004-06-19 23:16:02 +04:00
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#define BX_READ_FPU_REG(i) \
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2004-06-18 18:11:11 +04:00
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(BX_CPU_THIS_PTR the_i387.FPU_read_regi(i))
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2003-10-25 14:32:54 +04:00
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2004-06-19 23:16:02 +04:00
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#define BX_WRITE_FPU_REG(value, i) \
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BX_CPU_THIS_PTR the_i387.FPU_save_regi((value), (i));
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2003-04-13 01:02:08 +04:00
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2008-05-10 17:34:47 +04:00
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#define BX_WRITE_FPU_REGISTER_AND_TAG(value, tag, i) \
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BX_CPU_THIS_PTR the_i387.FPU_save_regi((value), (tag), (i));
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2004-06-19 23:16:02 +04:00
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BX_CPP_INLINE int i387_t::FPU_gettagi(int stnr)
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2004-06-18 18:11:11 +04:00
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{
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2004-06-19 23:16:02 +04:00
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return (twd >> (((stnr+tos) & 7)*2)) & 3;
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2004-06-18 18:11:11 +04:00
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}
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2003-08-01 13:32:33 +04:00
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2008-05-10 17:34:47 +04:00
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BX_CPP_INLINE void i387_t::FPU_settagi_valid(int stnr)
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{
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int regnr = (stnr + tos) & 7;
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twd &= ~(3 << (regnr*2)); // FPU_Tag_Valid == '00
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}
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2004-06-19 23:16:02 +04:00
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BX_CPP_INLINE void i387_t::FPU_settagi(int tag, int stnr)
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2003-10-25 14:32:54 +04:00
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{
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2004-06-19 23:16:02 +04:00
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int regnr = (stnr + tos) & 7;
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2004-06-18 18:11:11 +04:00
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twd &= ~(3 << (regnr*2));
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twd |= (tag & 3) << (regnr*2);
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2003-10-25 14:32:54 +04:00
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}
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2004-06-18 18:11:11 +04:00
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BX_CPP_INLINE void i387_t::FPU_push(void)
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{
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2006-06-08 23:56:30 +04:00
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tos = (tos - 1) & 7;
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2004-06-18 18:11:11 +04:00
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}
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BX_CPP_INLINE void i387_t::FPU_pop(void)
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{
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2006-06-08 23:56:30 +04:00
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twd |= 3 << (tos*2);
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tos = (tos + 1) & 7;
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2004-06-18 18:11:11 +04:00
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}
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2008-05-10 17:34:47 +04:00
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// it is only possisble to read FPU tag word through certain
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// instructions like FNSAVE, and they update tag word to its
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// real value anyway
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BX_CPP_INLINE void i387_t::FPU_save_regi(floatx80 reg, int stnr)
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{
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st_space[(stnr+tos) & 7] = reg;
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FPU_settagi_valid(stnr);
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}
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2004-06-19 23:16:02 +04:00
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BX_CPP_INLINE void i387_t::FPU_save_regi(floatx80 reg, int tag, int stnr)
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2004-06-18 18:11:11 +04:00
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{
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2004-06-19 23:16:02 +04:00
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st_space[(stnr+tos) & 7] = reg;
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2008-05-10 17:34:47 +04:00
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FPU_settagi(tag, stnr);
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2004-06-18 18:11:11 +04:00
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}
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#include <string.h>
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BX_CPP_INLINE void i387_t::init()
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{
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cwd = 0x037F;
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swd = 0;
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tos = 0;
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twd = 0xFFFF;
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foo = 0;
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fip = 0;
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fcs = 0;
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fds = 0;
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fdp = 0;
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}
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BX_CPP_INLINE void i387_t::reset()
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{
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cwd = 0x0040;
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swd = 0;
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tos = 0;
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twd = 0x5555;
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foo = 0;
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fip = 0;
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fcs = 0;
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fds = 0;
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fdp = 0;
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memset(st_space, 0, sizeof(floatx80)*8);
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}
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2015-02-24 00:17:33 +03:00
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typedef union bx_packed_reg_t {
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Bit8s _sbyte[8];
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Bit16s _s16[4];
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Bit32s _s32[2];
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Bit64s _s64;
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Bit8u _ubyte[8];
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Bit16u _u16[4];
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Bit32u _u32[2];
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Bit64u _u64;
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public:
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bx_packed_reg_t() {}
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bx_packed_reg_t(Bit64u val): _u64(val) {}
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bx_packed_reg_t(Bit64s val): _s64(val) {}
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} BxPackedRegister;
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typedef BxPackedRegister BxPackedMmxRegister;
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2002-09-09 20:11:25 +04:00
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#ifdef BX_BIG_ENDIAN
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2015-02-24 00:17:33 +03:00
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#define s64 _s64
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#define s32(i) _s32[1 - (i)]
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#define s16(i) _s16[3 - (i)]
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#define sbyte(i) _sbyte[7 - (i)]
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#define ubyte(i) _ubyte[7 - (i)]
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#define u16(i) _u16[3 - (i)]
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#define u32(i) _u32[1 - (i)]
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#define u64 _u64
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2002-09-09 20:11:25 +04:00
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#else
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2015-02-24 00:17:33 +03:00
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#define s64 _s64
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#define s32(i) _s32[(i)]
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#define s16(i) _s16[(i)]
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#define sbyte(i) _sbyte[(i)]
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#define ubyte(i) _ubyte[(i)]
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#define u16(i) _u16[(i)]
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#define u32(i) _u32[(i)]
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#define u64 _u64
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2002-09-09 20:11:25 +04:00
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#endif
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2004-03-04 00:09:08 +03:00
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/* for compatability with already written code */
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2015-02-24 00:17:33 +03:00
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#define MMXSB0(reg) (reg.sbyte(0))
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#define MMXSB1(reg) (reg.sbyte(1))
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#define MMXSB2(reg) (reg.sbyte(2))
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#define MMXSB3(reg) (reg.sbyte(3))
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#define MMXSB4(reg) (reg.sbyte(4))
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#define MMXSB5(reg) (reg.sbyte(5))
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#define MMXSB6(reg) (reg.sbyte(6))
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#define MMXSB7(reg) (reg.sbyte(7))
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#define MMXSW0(reg) (reg.s16(0))
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#define MMXSW1(reg) (reg.s16(1))
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#define MMXSW2(reg) (reg.s16(2))
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#define MMXSW3(reg) (reg.s16(3))
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#define MMXSD0(reg) (reg.s32(0))
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#define MMXSD1(reg) (reg.s32(1))
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#define MMXSQ(reg) (reg.s64)
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#define MMXUQ(reg) (reg.u64)
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#define MMXUD0(reg) (reg.u32(0))
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#define MMXUD1(reg) (reg.u32(1))
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#define MMXUW0(reg) (reg.u16(0))
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#define MMXUW1(reg) (reg.u16(1))
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#define MMXUW2(reg) (reg.u16(2))
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#define MMXUW3(reg) (reg.u16(3))
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#define MMXUB0(reg) (reg.ubyte(0))
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#define MMXUB1(reg) (reg.ubyte(1))
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#define MMXUB2(reg) (reg.ubyte(2))
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#define MMXUB3(reg) (reg.ubyte(3))
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#define MMXUB4(reg) (reg.ubyte(4))
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#define MMXUB5(reg) (reg.ubyte(5))
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#define MMXUB6(reg) (reg.ubyte(6))
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#define MMXUB7(reg) (reg.ubyte(7))
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2002-09-09 20:11:25 +04:00
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2004-06-24 01:59:24 +04:00
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#define BX_MMX_REG(index) (BX_FPU_REG(index).fraction)
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2002-11-30 17:42:41 +03:00
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2003-04-13 01:02:08 +04:00
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#define BX_READ_MMX_REG(index) \
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2004-06-24 01:59:24 +04:00
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(*((const BxPackedMmxRegister*)(&(BX_MMX_REG(index)))))
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2002-11-30 17:42:41 +03:00
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2018-11-17 15:45:44 +03:00
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#define BX_WRITE_MMX_REG(index, value) \
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2003-04-13 01:02:08 +04:00
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{ \
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2018-11-17 15:45:44 +03:00
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(BX_FPU_REG(index)).fraction = MMXUQ(value); \
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(BX_FPU_REG(index)).exp = 0xffff; \
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2008-02-03 00:46:54 +03:00
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}
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2002-11-30 17:42:41 +03:00
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2003-04-13 01:02:08 +04:00
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#endif /* BX_SUPPORT_FPU */
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2002-11-30 17:42:41 +03:00
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2002-09-09 20:11:25 +04:00
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#endif
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