2005-07-20 05:26:47 +04:00
|
|
|
////////////////////////////////////////////////////////////////////////
|
2007-03-15 00:15:15 +03:00
|
|
|
// $Id: ctrl_xfer_pro.cc,v 1.56 2007-03-14 21:15:15 sshwarts Exp $
|
2001-10-03 17:10:38 +04:00
|
|
|
/////////////////////////////////////////////////////////////////////////
|
|
|
|
//
|
2001-04-10 06:20:02 +04:00
|
|
|
// Copyright (C) 2001 MandrakeSoft S.A.
|
2001-04-10 05:04:59 +04:00
|
|
|
//
|
|
|
|
// MandrakeSoft S.A.
|
|
|
|
// 43, rue d'Aboukir
|
|
|
|
// 75002 Paris - France
|
|
|
|
// http://www.linux-mandrake.com/
|
|
|
|
// http://www.mandrakesoft.com/
|
|
|
|
//
|
|
|
|
// This library is free software; you can redistribute it and/or
|
|
|
|
// modify it under the terms of the GNU Lesser General Public
|
|
|
|
// License as published by the Free Software Foundation; either
|
|
|
|
// version 2 of the License, or (at your option) any later version.
|
|
|
|
//
|
|
|
|
// This library is distributed in the hope that it will be useful,
|
|
|
|
// but WITHOUT ANY WARRANTY; without even the implied warranty of
|
|
|
|
// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
|
|
|
|
// Lesser General Public License for more details.
|
|
|
|
//
|
|
|
|
// You should have received a copy of the GNU Lesser General Public
|
|
|
|
// License along with this library; if not, write to the Free Software
|
|
|
|
// Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
|
|
|
|
|
|
|
|
|
2001-05-24 22:46:34 +04:00
|
|
|
#define NEED_CPU_REG_SHORTCUTS 1
|
2001-04-10 05:04:59 +04:00
|
|
|
#include "bochs.h"
|
2006-03-07 01:03:16 +03:00
|
|
|
#include "cpu.h"
|
merge in BRANCH-io-cleanup.
To see the commit logs for this use either cvsweb or
cvs update -r BRANCH-io-cleanup and then 'cvs log' the various files.
In general this provides a generic interface for logging.
logfunctions:: is a class that is inherited by some classes, and also
. allocated as a standalone global called 'genlog'. All logging uses
. one of the ::info(), ::error(), ::ldebug(), ::panic() methods of this
. class through 'BX_INFO(), BX_ERROR(), BX_DEBUG(), BX_PANIC()' macros
. respectively.
.
. An example usage:
. BX_INFO(("Hello, World!\n"));
iofunctions:: is a class that is allocated once by default, and assigned
as the iofunction of each logfunctions instance. It is this class that
maintains the file descriptor and other output related code, at this
point using vfprintf(). At some future point, someone may choose to
write a gui 'console' for bochs to which messages would be redirected
simply by assigning a different iofunction class to the various logfunctions
objects.
More cleanup is coming, but this works for now. If you want to see alot
of debugging output, in main.cc, change onoff[LOGLEV_DEBUG]=0 to =1.
Comments, bugs, flames, to me: todd@fries.net
2001-05-15 18:49:57 +04:00
|
|
|
#define LOG_THIS BX_CPU_THIS_PTR
|
2001-04-10 05:04:59 +04:00
|
|
|
|
2002-09-15 06:23:12 +04:00
|
|
|
#if BX_SUPPORT_X86_64==0
|
|
|
|
// Make life easier merging cpu64 & cpu code.
|
|
|
|
#define RIP EIP
|
|
|
|
#endif
|
2001-04-10 05:04:59 +04:00
|
|
|
|
|
|
|
|
2005-08-02 02:06:19 +04:00
|
|
|
/* pass zero in check_rpl if no needed selector RPL checking for
|
|
|
|
non-conforming segments */
|
2005-08-02 22:44:20 +04:00
|
|
|
void BX_CPU_C::check_cs(bx_descriptor_t *descriptor, Bit16u cs_raw, Bit8u check_rpl, Bit8u check_cpl)
|
2001-04-10 05:04:59 +04:00
|
|
|
{
|
2005-08-02 22:44:20 +04:00
|
|
|
// descriptor AR byte must indicate code segment else #GP(selector)
|
2006-06-12 20:58:27 +04:00
|
|
|
if (descriptor->valid==0 || descriptor->segment==0 ||
|
|
|
|
IS_DATA_SEGMENT(descriptor->type))
|
2005-08-02 22:44:20 +04:00
|
|
|
{
|
|
|
|
BX_ERROR(("check_cs: not a valid code segment !"));
|
|
|
|
exception(BX_GP_EXCEPTION, cs_raw & 0xfffc, 0);
|
|
|
|
}
|
|
|
|
|
2005-05-19 22:13:08 +04:00
|
|
|
#if BX_SUPPORT_X86_64
|
2005-08-02 02:06:19 +04:00
|
|
|
if (descriptor->u.segment.l)
|
|
|
|
{
|
|
|
|
if (! BX_CPU_THIS_PTR msr.lma) {
|
|
|
|
BX_PANIC(("check_cs: attempt to jump to long mode without enabling EFER.LMA !"));
|
2005-05-19 22:13:08 +04:00
|
|
|
}
|
|
|
|
|
2005-08-02 02:06:19 +04:00
|
|
|
if (descriptor->u.segment.d_b) {
|
|
|
|
BX_ERROR(("check_cs: Both L and D bits enabled for segment descriptor !"));
|
2005-05-19 22:13:08 +04:00
|
|
|
exception(BX_GP_EXCEPTION, cs_raw & 0xfffc, 0);
|
|
|
|
}
|
2005-03-05 00:03:22 +03:00
|
|
|
}
|
2005-08-02 01:40:17 +04:00
|
|
|
#endif
|
2005-07-21 05:59:05 +04:00
|
|
|
|
2005-08-02 02:06:19 +04:00
|
|
|
// if non-conforming, code segment descriptor DPL must = CPL else #GP(selector)
|
2006-06-12 20:58:27 +04:00
|
|
|
if (IS_CODE_SEGMENT_NON_CONFORMING(descriptor->type)) {
|
2005-08-02 22:44:20 +04:00
|
|
|
if (descriptor->dpl != check_cpl) {
|
|
|
|
BX_ERROR(("check_cs: non-conforming code seg descriptor dpl != cpl"));
|
2005-05-19 22:13:08 +04:00
|
|
|
exception(BX_GP_EXCEPTION, cs_raw & 0xfffc, 0);
|
|
|
|
}
|
|
|
|
|
2005-08-02 02:06:19 +04:00
|
|
|
/* RPL of destination selector must be <= CPL else #GP(selector) */
|
2005-08-02 22:44:20 +04:00
|
|
|
if (check_rpl > check_cpl) {
|
|
|
|
BX_ERROR(("check_cs: non-conforming code seg selector rpl > cpl"));
|
2005-05-19 22:13:08 +04:00
|
|
|
exception(BX_GP_EXCEPTION, cs_raw & 0xfffc, 0);
|
|
|
|
}
|
2004-11-02 19:10:02 +03:00
|
|
|
}
|
2005-08-02 02:06:19 +04:00
|
|
|
// if conforming, then code segment descriptor DPL must <= CPL else #GP(selector)
|
2005-03-12 19:40:14 +03:00
|
|
|
else {
|
2005-08-02 22:44:20 +04:00
|
|
|
if (descriptor->dpl > check_cpl) {
|
|
|
|
BX_ERROR(("check_cs: conforming code seg descriptor dpl > cpl"));
|
2005-08-02 02:06:19 +04:00
|
|
|
exception(BX_GP_EXCEPTION, cs_raw & 0xfffc, 0);
|
2005-07-20 05:26:47 +04:00
|
|
|
}
|
2005-03-05 00:03:22 +03:00
|
|
|
}
|
2001-04-10 05:04:59 +04:00
|
|
|
|
2005-08-02 02:06:19 +04:00
|
|
|
// code segment must be present else #NP(selector)
|
|
|
|
if (! descriptor->p) {
|
|
|
|
BX_ERROR(("check_cs: code segment not present !"));
|
|
|
|
exception(BX_NP_EXCEPTION, cs_raw & 0xfffc, 0);
|
2005-03-05 00:03:22 +03:00
|
|
|
}
|
2001-04-10 05:04:59 +04:00
|
|
|
}
|
|
|
|
|
2005-08-02 02:06:19 +04:00
|
|
|
void BX_CPP_AttrRegparmN(3)
|
|
|
|
BX_CPU_C::load_cs(bx_selector_t *selector, bx_descriptor_t *descriptor, Bit8u cpl)
|
2001-04-10 05:04:59 +04:00
|
|
|
{
|
2005-08-02 02:06:19 +04:00
|
|
|
BX_CPU_THIS_PTR sregs[BX_SEG_REG_CS].selector = *selector;
|
|
|
|
BX_CPU_THIS_PTR sregs[BX_SEG_REG_CS].cache = *descriptor;
|
2001-04-10 05:04:59 +04:00
|
|
|
|
2005-08-02 02:06:19 +04:00
|
|
|
/* caller may request different CPL then in selector */
|
|
|
|
BX_CPU_THIS_PTR sregs[BX_SEG_REG_CS].selector.rpl = cpl;
|
|
|
|
BX_CPU_THIS_PTR sregs[BX_SEG_REG_CS].cache.valid = 1;
|
|
|
|
// Added cpl to the selector value.
|
|
|
|
BX_CPU_THIS_PTR sregs[BX_SEG_REG_CS].selector.value =
|
|
|
|
(0xfffc & BX_CPU_THIS_PTR sregs[BX_SEG_REG_CS].selector.value) | cpl;
|
2001-04-10 05:04:59 +04:00
|
|
|
|
2002-09-15 06:23:12 +04:00
|
|
|
#if BX_SUPPORT_X86_64
|
2005-08-02 02:06:19 +04:00
|
|
|
if (BX_CPU_THIS_PTR msr.lma) {
|
|
|
|
if (descriptor->u.segment.l) {
|
|
|
|
BX_CPU_THIS_PTR cpu_mode = BX_MODE_LONG_64;
|
|
|
|
BX_DEBUG(("Long Mode Activated"));
|
2007-03-15 00:15:15 +03:00
|
|
|
loadSRegLMNominal(BX_SEG_REG_CS, selector->value, cpl);
|
2005-03-05 00:03:22 +03:00
|
|
|
}
|
2005-03-20 21:08:46 +03:00
|
|
|
else {
|
2005-08-02 02:06:19 +04:00
|
|
|
BX_DEBUG(("Compatibility Mode Activated"));
|
|
|
|
BX_CPU_THIS_PTR cpu_mode = BX_MODE_LONG_COMPAT;
|
2002-09-15 06:23:12 +04:00
|
|
|
}
|
2005-03-05 00:03:22 +03:00
|
|
|
}
|
2005-08-02 02:06:19 +04:00
|
|
|
#endif
|
2001-04-10 05:04:59 +04:00
|
|
|
|
2005-08-02 02:06:19 +04:00
|
|
|
#if BX_SUPPORT_ICACHE
|
2006-03-27 22:02:07 +04:00
|
|
|
BX_CPU_THIS_PTR updateFetchModeMask();
|
2005-08-02 02:06:19 +04:00
|
|
|
#endif
|
2005-03-05 00:03:22 +03:00
|
|
|
|
2005-08-02 02:06:19 +04:00
|
|
|
// Loading CS will invalidate the EIP fetch window.
|
|
|
|
invalidate_prefetch_q();
|
2001-04-10 05:04:59 +04:00
|
|
|
}
|
|
|
|
|
2005-08-02 02:06:19 +04:00
|
|
|
void BX_CPP_AttrRegparmN(1)
|
|
|
|
BX_CPU_C::branch_near32(Bit32u new_EIP)
|
2004-11-02 20:31:14 +03:00
|
|
|
{
|
2005-03-05 00:03:22 +03:00
|
|
|
// check always, not only in protected mode
|
|
|
|
if (new_EIP > BX_CPU_THIS_PTR sregs[BX_SEG_REG_CS].cache.u.segment.limit_scaled)
|
|
|
|
{
|
|
|
|
BX_ERROR(("branch_near: offset outside of CS limits"));
|
|
|
|
exception(BX_GP_EXCEPTION, 0, 0);
|
|
|
|
}
|
|
|
|
EIP = new_EIP;
|
2004-11-02 20:31:14 +03:00
|
|
|
}
|
|
|
|
|
2005-08-02 22:44:20 +04:00
|
|
|
void BX_CPU_C::branch_far32(bx_selector_t *selector,
|
|
|
|
bx_descriptor_t *descriptor, Bit32u eip, Bit8u cpl)
|
|
|
|
{
|
|
|
|
/* instruction pointer must be in code segment limit else #GP(0) */
|
|
|
|
if (eip > descriptor->u.segment.limit_scaled) {
|
|
|
|
BX_ERROR(("branch_far: EIP > limit"));
|
|
|
|
exception(BX_GP_EXCEPTION, 0, 0);
|
|
|
|
}
|
|
|
|
|
|
|
|
/* Load CS:IP from destination pointer */
|
|
|
|
/* Load CS-cache with new segment descriptor */
|
|
|
|
load_cs(selector, descriptor, cpl);
|
|
|
|
|
|
|
|
/* Change the EIP value */
|
|
|
|
EIP = eip;
|
|
|
|
}
|
|
|
|
|
2005-07-31 21:57:27 +04:00
|
|
|
#if BX_SUPPORT_X86_64
|
2005-08-02 02:06:19 +04:00
|
|
|
void BX_CPP_AttrRegparmN(1)
|
|
|
|
BX_CPU_C::branch_near64(bxInstruction_c *i)
|
2005-07-31 21:57:27 +04:00
|
|
|
{
|
|
|
|
Bit64u new_RIP = RIP + (Bit32s) i->Id();
|
|
|
|
|
|
|
|
if (! i->os32L()) {
|
|
|
|
new_RIP &= 0xffff; // For 16-bit opSize, upper 48 bits of RIP are cleared.
|
|
|
|
}
|
|
|
|
else {
|
|
|
|
if (! IsCanonical(new_RIP)) {
|
|
|
|
BX_ERROR(("branch_near64: canonical RIP violation"));
|
|
|
|
exception(BX_GP_EXCEPTION, 0, 0);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
RIP = new_RIP;
|
|
|
|
}
|
|
|
|
#endif
|
|
|
|
|
|
|
|
void BX_CPU_C::branch_far64(bx_selector_t *selector,
|
2005-07-29 10:29:57 +04:00
|
|
|
bx_descriptor_t *descriptor, bx_address rip, Bit8u cpl)
|
|
|
|
{
|
|
|
|
#if BX_SUPPORT_X86_64
|
|
|
|
if (descriptor->u.segment.l)
|
|
|
|
{
|
|
|
|
if (! IsCanonical(rip)) {
|
|
|
|
BX_ERROR(("branch_far: canonical RIP violation"));
|
|
|
|
exception(BX_GP_EXCEPTION, 0, 0);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
else
|
|
|
|
#endif
|
|
|
|
{
|
|
|
|
/* instruction pointer must be in code segment limit else #GP(0) */
|
|
|
|
if (rip > descriptor->u.segment.limit_scaled) {
|
2005-07-31 21:57:27 +04:00
|
|
|
BX_ERROR(("branch_far: RIP > limit"));
|
2005-07-29 10:29:57 +04:00
|
|
|
exception(BX_GP_EXCEPTION, 0, 0);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
/* Load CS:IP from destination pointer */
|
|
|
|
/* Load CS-cache with new segment descriptor */
|
|
|
|
load_cs(selector, descriptor, cpl);
|
|
|
|
|
|
|
|
/* Change the RIP value */
|
|
|
|
RIP = rip;
|
|
|
|
}
|