* Point AtomBIOS to PCI rom mapped in memory
* Things no longer crash, but we get an Invalid BIOS Magic error
in the logs.
git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@42543 a95241bf-73f2-0310-859d-f6bbb57e9c96
* Pull pci_rom base address from pci subsystem
* Point AtomBIOS parser to pci rom address
to set up and malloc atom_context
* This is untested! Don't run on an
expensive card until I test it on a cheaper
one!
git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@42541 a95241bf-73f2-0310-859d-f6bbb57e9c96
* Add missing Idle call for connectors
* Reformulate blanking.. this should match what the
register is after the GTF vesa call
* Set FrameBuffer to card internal address
git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@42509 a95241bf-73f2-0310-859d-f6bbb57e9c96
* Add crtControl global register
* Add grphUpdate storage
* Do some logical reordering of register writes
* Correct crt final power-on checks
* Enhance tracing
* Disable PLL, it is needed but seems to completely break
the modesetting resulting in black-screen-of-doom.
(fixing PLL set/calibration is now priority one)
git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@42380 a95241bf-73f2-0310-859d-f6bbb57e9c96
* pass mapped frame buffer area id to accelerant
* remove my temporary hacked together frame buffer memory mapping
* completely rely on PCI BAR for now for aperture size / location instead of
R6XX_CONFIG_FB_BASE reg.
* Remove my temporary AllocateFB function.
* set grphPrimarySurfaceAddr to physical memory frame buffer location (offset 0)
* fix P/N sync setting.
git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@41722 a95241bf-73f2-0310-859d-f6bbb57e9c96
* make shared memory info naming clearer.
* move frame buffer internal offset read to driver
* remove check of > 512MB as we really should always use frame_buffer_size
git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@41569 a95241bf-73f2-0310-859d-f6bbb57e9c96
* remove device_type and replace with device_chipset
* change MEMSIZE to >> 10 as r600-r700 store this in bytes (r800 uses MB and will be fixed soon)
* add if statement to select what register locations to use based on chipset
** Maybe use a struct or something to store these in a standardized way?
git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@41525 a95241bf-73f2-0310-859d-f6bbb57e9c96
* add boot item support to radeon hd driver
* add edid storage to shared info
* add pull of active monitor VESA EDID to radeon hd driver (until AtomBios complete)
* EDID pulled in driver now passed to create_display_modes
* move registers to external stock xorg radeon hd register headers (lic. allows it)
git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@41411 a95241bf-73f2-0310-859d-f6bbb57e9c96
map_physical_memory()'s physicalAddress parameter type from void* to
phys_addr_t. This breaks source compatibility, but -- as long as
phys_{addr,size}_t remain 32 bit wide -- keeps binary compatibility with
BeOS.
* Adjusted all code using the affected interfaces (Oh what fun!). Added a few
TODOs in places where the wrong types (e.g. void* for physical addresses
are used). Looks like quite a few drivers aren't 64 bit safe and others
will break with PAE.
git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@36960 a95241bf-73f2-0310-859d-f6bbb57e9c96
