Commit Graph

533 Commits

Author SHA1 Message Date
François Revol
d4eea7d43c Merge branch 'master' into sam460ex 2013-03-28 09:47:50 +01:00
Alex Smith
5e0c3db286 Account for the physical map area in the kernel VM space. Fixes #9547.
The physical memory map area was not included in the kernel virtual
address space range (it was below KERNEL_BASE). This caused problems
if an I/O operation took place on physical memory mapped there (the
bad address error seen in #9547 was occurring in lock_memory_etc()).
Changed KERNEL_BASE and KERNEL_SIZE to cover the area and add a null
area that covers all of it. Also changed X86VMTranslationMap64Bit to
handle large pages in Query(), as the physical map area uses large
pages.
2013-03-22 18:30:01 +00:00
François Revol
0acc7a44b6 PPC: Work-in-progress MMU definitions for AMCC440/460.
Unfinished. the TLB entries require setting 3 registers plus another
field for the PID.
Didn't yet decide how to store this in the page tables.
2013-03-09 03:26:53 +01:00
François Revol
97b9539c65 Merge branch 'master' into sam460ex 2012-12-06 00:12:40 +01:00
Michael Lotz
fd6e3a11e2 Use the existing ARM MMU definitions and remove duplicates. 2012-12-04 23:38:06 +01:00
Michael Lotz
50c463f4f1 Header cleanup, rename macros for more consistency. 2012-12-04 23:38:03 +01:00
François Revol
c435277d49 Merge branch 'master' into sam460ex 2012-11-29 16:06:28 +01:00
Michael Lotz
4818400fcf Add BCM2708 mailbox definitions and implementation.
The mailbox is used to communicate with the VideoCore on the rPi for
various tasks. First it will be used to configure the framebuffer.
2012-11-27 20:58:30 +01:00
André Hentschel
a8fe6dad7e Fix header protection for the beagle board 2012-11-26 17:59:53 +01:00
François Revol
77d95e1d47 Merge branch 'master' into sam460ex
Conflicts:
	src/system/boot/platform/u-boot/arch/ppc/Jamfile
2012-11-18 23:10:49 +01:00
Alex Smith
11c9f9a1d6 Merge branch 'master' into x86_64
Conflicts:
	build/jam/FloppyBootImage
	build/jam/OptionalBuildFeatures
	build/jam/OptionalPackages
	headers/private/shared/cpu_type.h
	src/bin/ps.c
	src/bin/sysinfo.cpp
	src/kits/tracker/PoseView.cpp
	src/preferences/appearance/DecorSettingsView.cpp
	src/preferences/virtualmemory/Settings.cpp
	src/servers/input/AddOnManager.cpp
	src/servers/input/InputServer.cpp
	src/servers/input/InputServerMethod.cpp
	src/system/boot/Jamfile
	src/system/boot/platform/raspberrypi_arm/mmu.cpp
	src/system/boot/platform/u-boot/arch/arm/Jamfile
	src/system/kernel/arch/x86/arch_cpu.cpp
	src/system/kernel/arch/x86/arch_thread.cpp
	src/system/kernel/cache/block_cache.cpp
	src/system/kernel/vm/VMAnonymousCache.cpp
2012-11-18 14:02:07 +00:00
François Revol
dd686298c5 Merge branch 'master' into sam460ex 2012-11-13 12:51:50 +01:00
Ithamar R. Adema
1df5784a22 ARM: Add ARM architecture detection to generic bootloader ARM code.
This detects everything up to ARMv6 right now. Need to check more
recent ARM ARMs for ARMv7 detection.

The detected details get passed on to the kernel, which can use
the pre-detected info for selecting right pagetable format and such.

Copyright removal of Axel done after agreement with Axel @ BeGeistert
that for files that were copy/pasted from x86 arch and then fully
replaced the implementation, removal of original copyright holder is
allowed, since their actual code is gone ;)
2012-11-13 12:04:35 +01:00
François Revol
13abd68fc3 Merge branch 'master' into sam460ex 2012-11-10 20:36:35 +01:00
Ithamar R. Adema
36b41db7aa Merge common ARM CPU/MMU code
This is to make sure all ARM platforms will benefit from planned work on this
MMU/CPU code. The less code duplicated, the better.

Compile-tested for all supported ARM platforms
2012-11-10 03:03:24 +01:00
François Revol
17c270bd4f Merge branch 'master' into sam460ex 2012-11-08 10:25:41 +01:00
Ithamar R. Adema
f86b582848 ARM: Cleanup of port support code.
This also implements the fault handler correctly now, and cleans up the
exception handling. Seems a lot more stable now, no unexpected panics or
faults happening anymore.
2012-11-07 16:24:22 +01:00
François Revol
f812331857 PPC: Add a platform field to the arch_kernel_args
* We need to know which platform we are booted from
2012-09-22 22:10:02 +02:00
François Revol
daf2a95ef7 PPC: Add a PPC_PLATFORM_U_BOOT platform type
* the PPC kernel will have to support both OF and U-Boot soon.
2012-09-22 19:55:02 +02:00
Yongcong Du
19187c464b x86: Initialize IA32_MSR_ENERGY_PERF_BIAS
The lowest 4 bits of the MSR serves as a hint to the hardware to
favor performance or energy saving. 0 means a hint preference for
highest performance while 15 corresponds to the maximum energy
savings. A value of 7 translates into a hint to balance performance
with energy savings.

The default reset value of the MSR is 0. If BIOS doesn't intialize
the MSR, the hardware will run in performance state. This patch
initialize the MSR with value of 7 for balance between performance
and energy savings

Signed-off-by: Fredrik Holmqvist <fredrik.holmqvist@gmail.com>
2012-08-29 22:11:56 +02:00
Alex Smith
d2a1be1c4e Cleaner separation of 32-/64-bit specific CPU/interrupt code.
Renamed {32,64}/int.cpp to {32,64}/descriptors.cpp, which now contain
functions for GDT and TSS setup that were previously in arch_cpu.cpp,
as well as the IDT setup code. These get called from the init functions
in arch_cpu.cpp, rather than having a bunch of ifdef'd chunks of code
for 32/64.
2012-08-18 17:43:40 +01:00
Alex Smith
9f629ef38e Rename KERNEL_LOAD_BASE_64BIT to KERNEL_LOAD_BASE_64_BIT for consistency. 2012-08-17 15:16:25 +01:00
Alex Smith
8a1903353e Implemented user debugging support for x86_64.
Reused x86 arch_user_debugger.cpp, with a few minor changes to make
the code work for both 32 and 64 bit. Something isn't quite working
right, if a breakpoint is hit the kernel will hang. Other than that
everything appears to work correctly.
2012-08-07 20:20:42 +01:00
Alex Smith
cc30eec43d System call restart support. 2012-08-05 14:20:37 +01:00
Alex Smith
74bda98cb2 Killed off vm86 code, no longer being used. 2012-08-03 16:49:15 +01:00
Alex Smith
d93ed09564 Improved safety for user memory accesses.
* Changed IS_USER_ADDRESS to check an address using USER_BASE and
  USER_SIZE, rather than just !IS_KERNEL_ADDRESS. The old check would
  allow user buffers to point into the physical memory map area.
* Added an unmapped hole at the end of the bottom half of the address
  space which catches buffers that cross into the uncanonical address
  region. This also removes the need to check for uncanonical return
  addresses in the syscall handler, it is no longer possible for the
  return address to be uncanonical under normal circumstances. All
  cases in which the return address might be changed by the kernel
  are still handled via the IRET path.
2012-08-02 09:32:33 +01:00
Alex Smith
c0d28c0199 Implemented signals for x86_64. 2012-07-30 13:52:51 +01:00
Alex Smith
370ab57d49 Initial userland support for x86_64.
Userland switch is implemented, as is basic system call support (using
SYSCALL/SYSRET). The system call handler is not yet complete: it doesn't
handle more than 6 arguments, and does not perform all the necessary kernel
entry/exit work (neither does the interrupt handler). However, this is
sufficient for runtime_loader to start and print some debug output.
2012-07-23 17:12:12 +01:00
Alex Smith
6497f6b1ec Moved the exception handling functions to arch_int.cpp, shared between x86 and x86_64. 2012-07-21 09:11:09 +01:00
Alex Smith
bcb07a319b Implemented the rest of the kernel debugger functions for x86_64.
Merged with the x86 implementations, mostly the same except for a
few differences. GDB stub is currently broken, will investigate
later.
2012-07-13 14:09:09 +01:00
Alex Smith
4ebc6dfa68 Moved some 32-bit specific stuff to the 32 subdirectory. 2012-07-12 14:23:55 +01:00
Alex Smith
d38f1301d1 Cleaned up 32-bit descriptors.h. 2012-07-12 13:55:03 +01:00
Alex Smith
76a1175dbe Support for SMP on x86_64.
No major changes to the kernel: just compiled in arch_smp.cpp and fixed the
IDT load in arch_cpu_init_percpu to use the correct limit for x86_64 (uses
sizeof(interrupt_descriptor)). In the boot loader, changed smp_boot_other_cpus
to construct a temporary GDT and get the page directory address from CR3, as
what's in kernel_args will be 64-bit stuff and will not work to switch the
CPUs into 32-bit mode in the trampoline code. Refactored 64-bit kernel entry
code to not use the stack after disabling paging, as the secondary CPUs are
given a 32-bit virtual stack address by the SMP trampoline code which will
no longer work.
2012-07-11 18:29:15 +01:00
Alex Smith
5670b0a8e4 Moved the 32-bit page fault handler to arch_int.cpp, use it for x86_64.
A proper page fault handler was required for areas that were not locked
into the kernel address space. This enables the boot process to get
up to the point of trying to find the boot volume.
2012-07-09 19:18:09 +01:00
Alex Smith
b5c9d24abc Implemented threading for x86_64.
* Thread creation and switching is working fine, however threads do not yet
  get interrupted because I've not implemented hardware interrupt handling
  yet (I'll do that next).
* I've made some changes to struct iframe: I've removed the e/r prefixes
  from the member names for both 32/64, so now they're just named ip, ax,
  bp, etc. This makes it easier to write code that works with both 32/64
  without having to deal with different iframe member names.
2012-07-09 16:43:01 +01:00
Alex Smith
5e9bb17da7 Renamed remaining i386_* functions to x86_* for consistency. 2012-07-09 12:14:18 +01:00
Alex Smith
3b802628b8 Support ELF64 in the kernel.
This has been done by adding typedefs in elf_common.h to the correct ELF
structures for the architecture, and changing all Elf32_* uses to those
types. I don't know whether image loading works as I cannot test it yet,
there may be some 64-bit safety issues around. However, symbol lookup for
the kernel is working correctly.
2012-07-09 11:11:38 +01:00
Alex Smith
5c7d52183c Implemented system_time() for x86_64.
* Uses 64-bit multiplication, special handling for CPUs clocked < 1 GHz
  in system_time_nsecs() not required like on x86.
* Tested against a straight conversion of the x86 version, noticably
  faster with a large number of system_time() calls.
2012-07-08 10:16:44 +01:00
Alex Smith
15feb60325 A few improvements suggested by Ingo. 2012-07-06 14:34:50 +01:00
Alex Smith
84bf29f97b Compile in arch_platform.cpp for x86_64. The apm_init call is disabled for x86_64, APM is 32-bit only. 2012-07-06 14:17:48 +01:00
Alex Smith
950b24e32d Begun work on VMTranslationMap implementation for x86_64.
* Added empty source files for all the 64-bit paging method code, and a
  stub implementation of X86PagingMethod64Bit.
* arch_vm_translation_map.cpp has been modified to use X86PagingMethod64Bit
  on x86_64.
2012-07-04 17:08:44 +01:00
Alex Smith
4304bb9894 Added arch_cpu.cpp to the x86_64 build.
* Some things are currently ifndef'd out completely for x86_64 because
  they aren't implemented, there's a few other ifdef's to handle x86_64
  differences but most of the code works unchanged.
* Renamed some i386_* functions to x86_*.
* Added a temporary method for setting the current thread on x86_64
  (a global variable, not SMP safe). This will be changed to be done
  via the GS segment but I've not implemented that yet.
2012-07-04 14:06:46 +01:00
Alex Smith
4e8fbfb2d1 x86_{read,write}_cr{0,4} can just be implemented as macros, put an x86_ prefix on the other read/write macros for consistency. 2012-07-03 20:55:36 +01:00
Alex Smith
cbfe5fcd17 Removed redundant x86 sources/headers. 2012-07-03 17:38:18 +01:00
Alex Smith
c005e747ef Removed the x86_64 headers/source directories, now all merged with x86. 2012-07-03 11:17:56 +01:00
Alex Smith
020a25ce46 Fixed x86_64 kernel compilation.
For now I've just put all the stub functions that are needed to link the
kernel into a file called stubs.cpp. I've not yet moved across the interrupt
handling code or the ELF64 relocation code to the x86 directory. Once those
have been moved I can get rid of the x86_64 headers/source directories.
2012-07-02 20:56:27 +01:00
Alex Smith
0897e314b7 Merged x86_64 headers into x86 headers.
Not many changes seeing as there's not much x86_64 stuff done yet. Small
differences are handled with ifdefs, large differences (descriptors.h,
struct iframe) have separate headers under arch/x86/32 and arch/x86/64.
2012-07-02 18:47:06 +01:00
Alex Smith
0705884ac4 Style fixes. 2012-06-27 15:48:39 +01:00
Alex Smith
c9f6d2271f x86_64: Implemented exception handling. 2012-06-27 15:18:10 +01:00
Alex Smith
3403f23e81 Moved the common parts of arch_cpu.h between x86 and x86_64 to arch/common_x86/cpu.h. 2012-06-27 11:23:54 +01:00
Alex Smith
e5fc2bfcab Implemented long mode setup/switch code, the bootloader can now start the 64-bit kernel!
The setup procedure is fairly simple: create a 64-bit GDT and 64-bit page
tables that include all kernel mappings from the 32-bit address space, but at
the correct 64-bit address, then go through kernel_args and changes all virtual
addresses to 64-bit addresses, and finally switch to long mode and jump to the
kernel.
2012-06-26 11:08:21 +01:00
Alex Smith
f69dd487b1 Fixed x86 GCC2 build. 2012-06-25 13:28:28 +01:00
Alex Smith
6f6d78e877 Cleaned up ELF64 address handling.
* platform_allocate_elf_region() is removed, it is implemented in platform-
  independent code now (ELF*Class::AllocateRegion). For ELF64 it is now
  assumed that 64-bit addresses are mapped in the loader's 32-bit address space
  as (address - KERNEL_BASE_64BIT + KERNEL_BASE).
* mapped_delta field from preloaded_*_image removed, now handled compile-time
  using the ELF*Class::Map method.
* Also link the kernel with -z max-page-size=0x1000, removes the need for
  2MB alignment on the data segment (not going to map the kernel with large
  pages for the time being).
2012-06-25 13:00:50 +01:00
Alex Smith
17e407e945 Proper implementation of arch_kernel.h for x86_64. 2012-06-22 10:53:08 +01:00
Alex Smith
d8efc6caf6 Changes to kernel_args to make it identical for x86 and x86_64.
* Added a FixedWidthPointer template class which uses 64-bit storage to hold
  a pointer. This is used in place of raw pointers in kernel_args.
* Added __attribute__((packed)) to kernel_args and all structures contained
  within it. This is necessary due to different alignment behaviour for
  32-bit and 64-bit compilation with GCC.
* With these changes, kernel_args will now come out the same size for both
  the x86_64 kernel and the loader, excluding the preloaded_image structure
  which has not yet been changed.
* Tested both an x86 GCC2 and GCC4 build, no problems caused by these changes.
2012-06-21 18:02:23 +01:00
Alex Smith
e114f50ddd Fixed bootloader build under x86_64. 2012-06-19 20:38:53 +01:00
Alex Smith
043c61dde5 Added stub versions of everything needed to build the kernel.
The whole kernel now builds and there are no undefined references when
linking, I just need to fix some strange relocation errors I'm getting
(probably a problem with the linker script) and then I'll have a kernel
image.
2012-06-15 22:50:59 +01:00
Alex Smith
f76bc433e1 Added some x86_64 system/kernel headers and kernel Jamfiles.
* Not all of these headers are correct yet, just adding what's necessary
  to get things to compile for the time being.
2012-06-13 17:45:22 +01:00
Alex Smith
07b33113a3 Merge branch 'master' into x86_64 2012-06-11 12:01:35 +01:00
François Revol
b837149e73 Sam460ex: Add cpu type and model defines to board_config.h
* we need this in arch_cpu.cpp in the bootloader.
2012-06-02 01:25:53 +02:00
François Revol
9c02217342 PPC: Add PVR identifiers for 440 and 460 cpus
* from QEMU, 440EP is 0x4222.
* from the datasheet, 460EX is 0x1302.
2012-05-29 18:50:32 +02:00
Alex Smith
65ad1ba320 Made it possible to build the bootloader when targetting x86_64.
* x86_64 is using the existing *_ia32 boot platforms.
* Special flags are required when compiling the loader to get GCC to compile
  32-bit code. This adds a new set of rules for compiling boot code rather
  than using the kernel rules, which compile using the necessary flags.
* Some x86_64 private headers have been stubbed by #include'ing the x86
  versions. These will be replaced later.
2012-05-26 21:47:27 +01:00
Alexander von Gluck IV
361ec26f10 rPi MMU: Cleanup, add gPeripheralBase
* gPeripheralBase keeps track of the device
  peripherals before and after mmu_init
* Add ability to disable mmu for troubleshooting
* Remove static FB_BASE, we actually don't know
  where the FB is yet. (depends on firmware used)
2012-05-24 06:39:43 -05:00
Alexander von Gluck IV
f0ba7f9400 MMU: Clean up arm L1 MMU types
* Include map for each page table type
* Reduce MMU_TYPE define name length
2012-05-22 08:30:52 -05:00
Alexander von Gluck IV
9c5e60f656 rPi MMU: Fixes to hrev44189
* I had the wrong addresses, 0x20 was the physical
  address not a mapped one.
* Attempt to map uart in mmu post mmu_init.
2012-05-22 08:30:52 -05:00
Alexander von Gluck IV
b8733e36c7 rPi MMU: Working towards mapped memory
* BCM2708 defines no longer assume 0x20 address
  We will be throwing away the blob memory mapping
  and using our own.
* Use existing blob mapping to turn GPIO led on pre mmu_init
* Remap MMU hardware addresses from 0x7E. We could map each device,
  however the kernel will throw away the mappings again anyway. For
  now we just map the whole range and use offsets.
* Serial uart no longer works, however at least
  we know why now :). Serial driver now needs to
  use mapped address.
2012-05-18 10:16:30 -05:00
Alexander von Gluck IV
77591e9657 rPi: MMU Work
* Use U-Boot mmu code as base
* This will be factored out someday into common arch mmu
  code when we can read Flattened Device Trees
* Move mmu_init after serial_init.
  Temporary change as we will want serial_init to use
  memory mapped addresses... for debugging.
2012-05-18 06:36:53 -05:00
Alexander von Gluck IV
1f675a7fcb uart: Fix arm kernel build
* Make kernel use mmu_man's new UART code
* Remove no longer used uart.cpp / uart.h
2012-05-17 05:32:29 -05:00
Alexander von Gluck IV
eb93f2661d uart: Style Cleanup, no functional change 2012-05-17 03:31:02 -05:00
Alexander von Gluck IV
182643f763 uart: Remove due to mmu's new (better) UART code 2012-05-17 03:15:56 -05:00
François Revol
e9ec7a55dd Attempt to factor out serial stuff
* introduce a DebugUART baseclass,
* rework 8250 and PL011 implementations from kallisti5 to inherit DebutUART,
* each arch should override the IO methods to access registers.
* on ARM registers are 32bit-aligned.
* U-Boot still works for the verdex target.
* rPi still compiles, needs testing.
* Still some more consolidation needed to allow runtime choice of the UART type (as read from FDT blobs for ex.).
* serial.cpp should probably mostly be made generic as well.
* didn't touch x86 or ppc yet.
2012-05-17 04:09:05 +02:00
Alexander von Gluck IV
85c4ab42a1 rpi cpu: Add documentation on PDF locations of registers
* Assist future developers with the location of this data
* No functional change
2012-05-15 08:34:27 -05:00
Alexander von Gluck IV
125c31a827 pl011: Make memory reads and writes 32-bits 2012-05-14 20:47:55 -05:00
François Revol
0fa5c3d115 Add board config header for ACube Sam460ex
* the UART is hardcoded for now, ideally it should be set up from the address found in the FDT blob.
2012-05-11 02:31:57 +02:00
Alexander von Gluck IV
f78cbe4710 pl011 uart: Work on uart startup code
* Add missing PL011 register locations
* Move startup code to class init and ensure port is
  started up more like Linux PL011 Amba driver.
2012-05-10 12:38:52 -05:00
Alexander von Gluck IV
57a2ea0d54 uart: Replace Init calls with Enable/Disable
* Enable/Disable makes more sense and matches
  platform loader serial functions.
* Rework PL011 code after finding a PDF covering
  the details of it.
* Rename UART global defines in loader to be more
  exact about location
2012-05-09 12:46:35 -05:00
Alexander von Gluck IV
78004f1677 arm uart: Convert new uart code to classes
* This makes things a little more flexible and
  the interface to use the uarts cleaner.
* May want to make a generic Uart wrapper
  class in uart.h / uart.cpp and call drivers
  as needed from there.
2012-05-08 22:17:03 -05:00
Alexander von Gluck IV
b74906293b pl011 uart: Add port_init code
* Add code to initilize the uart port
* Fix uart clock
2012-05-06 22:53:56 -05:00
Alexander von Gluck IV
c76127fade arm uart: First work towards Amba serial driver
* Move Raspberry Pi board over to Amba driver
* Add initial set of registers and values
* Few small style cleanups
2012-05-06 19:30:43 -05:00
Alexander von Gluck IV
aa7d070732 arm uart: Rename getc/putc to getchar/getchar
* Avoid name collisions
* This uart stuff may work better as a class at
  some point, however I didn't want to rock the
  u-boot boat *too* much as I don't have the
  hardware to test.
2012-05-06 17:03:34 -05:00
Alexander von Gluck IV
917e9be1a6 arm uart: Complete redesign of ARM uart code
* Add nested function wrappers to allow usage of other
  uart drivers depending on board. We may want to use this
  on other platforms at some point (haha, maybe)
2012-05-06 17:03:33 -05:00
Alexander von Gluck IV
52119b503d Pi uart: Begin first attempts at UART communication on Pi.
* Make Kernel ARM UART slightly more generic
  through (BOARD_UART_CLOCK) configured per board
* Add initial Raspberry Pi serial code
* Still rough and non-working
2012-05-04 22:00:23 -05:00
Alexander von Gluck IV
2ec676a4e8 rpi: Add missing uart defines
* The uart defines need validated.
* Verified vector base and size defines
2012-04-22 22:17:24 -05:00
Yongcong Du
45cf3294b2 x86: add cpuid feature 6 flags
Signed-off-by: Fredrik Holmqvist <fredrik.holmqvist@gmail.com>
2012-04-22 21:03:57 +02:00
Alexander von Gluck IV
71d4eb5739 kernel: Initial platform memory defines for Raspberry Pi 2012-04-19 18:44:38 -05:00
Yongcong Du
cc586f1655 x86: AMD C1E with no ARAT(Always Running APIC Timer) idle support
AMD C1E is a BIOS controlled C3 state. Certain processors families
may cut off TSC and the lapic timer when it is in a deep C state,
including C1E state, thus the cpu can't be waken up and system will hang.

This patch firstly adds the support of idle selection during boot. Then
it implements amdc1e_noarat_idle() routine which checks the MSR which
contains the C1eOnCmpHalt (bit 28) and SmiOnCmpHalt (bit 27)  before
executing the halt instruction, then clear them once set.

However intel C1E doesn't has such problem. AMD C1E is a BIOS controlled
C3 state. The difference between C1E and C3 is that transition into C1E
is not initiated by the operating system. System will enter C1E state
automatically when both cores enters C1 state. As for intel C1E, it
means "reduce CPU voltage before entering corresponding Cx-state".

This patch may fix #8111, #3999, #7562, #7940 and #8060

Copied from the description of #3999:
>but for some reason I hit the power button instead of the reset one. And
>the boot continued!!
The reason is CPUs are waken up once power button is hit.

Signed-off-by: Fredrik Holmqvist <fredrik.holmqvist@gmail.com>
2012-04-14 18:18:29 +02:00
François Revol
599f30f93d Fix building the m68k kernel
* Restructured the vm support code to align with the changes done to other archs.
* Not completely finished, but the kernel loads and panics. I had this sitting on the disk anyway.
* Only support 040 for now, 030 will need to be added back.
* This commit is dedicated to Jack Tramiel who passed away away last sunday:
http://www.forbes.com/sites/davidthier/2012/04/09/computer-legend-and-gaming-pioneer-jack-tramiel-dies-at-age-83/
2012-04-13 00:53:09 +02:00
Alexander von Gluck IV
d387f54a23 x86: Change cpu feature flags to shifts
* No functional change
* Added missing ia64 emulation flag
* More closely matches AMD_EXT defines
* Easier to read compared to CPU documentation
2012-04-09 08:19:10 -05:00
Alexander von Gluck IV
3f1eed704a kernel: x86 SSE improvements
* Prepend x86_ to non-static x86 code
* Add x86_init_fpu function to kernel header
* Don't init fpu multiple times on smp systems
* Verified fpu is still started on smp and non-smp
* SSE code still generates general protection faults
  on smp systems though
2012-02-15 12:33:45 -06:00
Alexander von Gluck IV
8dd1e875c1 kernel: Fix FPU SSE + MMX instruction usage.
* Rename init_sse to init_fpu and handle FPU setup.
* Stop trying to set up FPU before VM init.
  We tried to set up the FPU before VM init, then
  set it up again after VM init with SSE extensions,
  this caused SSE and MMX applications to crash.
* Be more logical in FPU setup by detecting CPU flag prior
  to enabling FPU. (it's unlikely Haiku will run on
  a processor without a fpu... but lets be consistant)
* SSE2 gcc code now runs (faster even) without GPF
* tqh confirms his previously crashing mmx code now works
* The non-SSE FPU enable after VM init needs tested!
2012-01-20 15:06:01 -06:00
Michael Lotz
79f0056002 Fix virtual 8086 mode to properly account for TLS.
* The vm86 code or the code running in virtual 8086 mode may clobber the
  %fs register that we use for the CPU dependent thread local storage
  (TLS). Previously the vm86 code would simply restore %fs on exit, but
  this doesn't always work. If the thread got unscheduled while running
  in virtual 8086 mode and was then rescheduled on a different CPU, the
  vm86 exit code would restore the %fs register with the TLS value of
  the old CPU, causing anything using TLS in userland to crash later on.
  Instead we skip the %fs register restore on exit (as do the other
  interrupt return functions) and explicitly update the potentially
  clobbered %fs by calling x86_set_tls_context(). This will repopulate
  the %fs register with the TLS value for the right CPU. Fixes #8068.

* Made the static set_tls_context() into x86_set_tls_context() and made
  it available to others to faciliate the above.

* Sync the vm86 specific interrupt code with the changes from hrev23370,
  using the iframe pop macro to properly return. Previously what was
  pushed in int_bottom wasn't poped on return.

* Account for the time update macro resetting the in_kernel flag and
  reset it to 1, as we aren't actually returning to userland. This
  didn't cause any harm though as only the time tracking is using that
  flag so far.

* Some minor cleanup.
2011-11-25 16:10:19 +01:00
François Revol
f239fdf6b8 Some more 68k mmu definitions I forgot to commit.
git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@43145 a95241bf-73f2-0310-859d-f6bbb57e9c96
2011-11-03 01:05:54 +00:00
François Revol
afa453ee2a Make the page table types scalar, to make them simpler to use with atomic ops, and define the corresponding bitmasks.
While structs looked cleaner at first sight, it didn't really was any simpler.


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@43140 a95241bf-73f2-0310-859d-f6bbb57e9c96
2011-11-02 22:56:20 +00:00
Jérôme Duval
11977ba83b added more cpu feature flags for x86
git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@42263 a95241bf-73f2-0310-859d-f6bbb57e9c96
2011-06-20 17:00:50 +00:00
Rene Gollent
73df2f2086 * Add validation of the RSDP checksums.
* If we detect ACPI 2.0 or higher, the spec says we should use the XSDT rather
  than the RSDT. Attempt to do so, falling back to the RSDT if the former fails
  to be mapped/validated.
* Refactored acpi_find_table into a templated version to account for the fact
  that the XSDT exports different pointer widths for its links to other tables
  than the RSDT.



git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@42133 a95241bf-73f2-0310-859d-f6bbb57e9c96
2011-06-12 22:01:43 +00:00
Ingo Weinhold
8bcc50c336 * Added arch_debug_blue_screen_try_getchar() and arch_debug_serial_try_getchar()
which don't wait for a character, but return -1 when no character is
  available ATM. Implemented correctly for x86 only.
* Changed the semantics of the debugger_module_info::debugger_getchar() hook.
  It is supposed to return immediately now.
* Adjusted usb_keyboard accordingly. Hacked UHCI's debug_process_transfer() to
  achieve that. It does now start, check, or cancel a transfer. Split
  UHCI::ProcessDebugTransfer() into StartDebugTransfer(), and
  CheckDebugTransfer() accordingly, and also added a CancelDebugTransfer().
  The latter seems to have issues. Michael, please have a look. I have no clue
  what I'm doing. :-)
* Adjusted kgetc() to poll all possible inputs using the new
  functions/semantics. This allows to use any input (USB, PS/2, serial) in KDL.
* Removed the no longer needed "serial_input" command.
* read_line(): Also support 0x7f as backspace code. That's what xterm sends.


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@42126 a95241bf-73f2-0310-859d-f6bbb57e9c96
2011-06-12 17:15:42 +00:00
Rene Gollent
6b0007fb77 Rename rsdt_length to xsdt_length to avoid future confusion.
git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@42119 a95241bf-73f2-0310-859d-f6bbb57e9c96
2011-06-12 02:12:07 +00:00
Ingo Weinhold
24df65921b Merged signals-merge branch into trunk with the following changes:
* Reorganized the kernel locking related to threads and teams.
* We now discriminate correctly between process and thread signals. Signal
  handlers have been moved to teams. Fixes #5679.
* Implemented real-time signal support, including signal queuing, SA_SIGINFO
  support, sigqueue(), sigwaitinfo(), sigtimedwait(), waitid(), and the addition
  of the real-time signal range. Closes #1935 and #2695.
* Gave SIGBUS a separate signal number. Fixes #6704.
* Implemented <time.h> clock and timer support, and fixed/completed alarm() and
  [set]itimer(). Closes #5682.
* Implemented support for thread cancellation. Closes #5686.
* Moved send_signal() from <signal.h> to <OS.h>. Fixes #7554.
* Lots over smaller more or less related changes.


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@42116 a95241bf-73f2-0310-859d-f6bbb57e9c96
2011-06-12 00:00:23 +00:00
Ingo Weinhold
9536ec0297 Reimplemented the gdb stub support for the 'g' command (read registers):
* Added an arch_debug_gdb_get_registers() interface that is supposed to provide
  the register values in the format expected by gdb and implemented it for x86.
* Reimplemented gdb_regreply() to use that. Also made it buffer overflow safe.


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@41880 a95241bf-73f2-0310-859d-f6bbb57e9c96
2011-06-03 15:35:10 +00:00
Jérôme Duval
6ec9dff3f3 ppc build fix
git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@41834 a95241bf-73f2-0310-859d-f6bbb57e9c96
2011-05-30 19:51:45 +00:00
Michael Lotz
fb5a1727f4 * Implement interrupt source overrides. We install a relay interrupt handler
at the override entry to trigger the overriden vector so that we don't need
  to configure any additional redirections.
* Also configures the polarity and trigger modes found in the override entry.
* When disabling the legacy PIC, retrieve the enabled interrupts and re-enable
  then in the IO-APIC. This will for example make the ACPI SCI work that is
  installed prior to switching interrupt models. Through the transparent support
  for interrupt source overrides it'll also automatically relay from the old to
  the new vector.

This should make ACPI interrupts work and should support relocating the ISA PIT
from irq 0 to a different global system interrupt (usually 2) so that it can
still work when IO-APICs are in use.


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@41528 a95241bf-73f2-0310-859d-f6bbb57e9c96
2011-05-16 12:57:40 +00:00
Michael Lotz
8908aef9c2 * Don't map the IO-APIC within the bootloader. We don't need it to set up SMP
at all and, since there can be multiple IO-APICs, we need to do the
  enumeration again in the kernel anyway. Also only set ioapic_phys the first
  time we encounter an IO-APIC object as it looks cleaner when we arrive at the
  first IO-APIC default address.
* Therefore we don't have to worry about already mapped IO-APICs when
  enumerating them in the kernel.
* Also remove the mapping function that is now not used anymore.
* We still use the ioapic_phys field of the kernel args to determine whether
  there is an IO-APIC at all to avoid needlessly doing the enumeration again.

This fixes multi IO-APIC configurations, because before we would indeed map
the last IO-APIC listed in the MADT, but then in the kernel assumed we mapped
the first one. We'd end up with mapping the last listed IO-APIC twice and the
first IO-APIC never, always programming the last one when we actually targetted
the first one.


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@41476 a95241bf-73f2-0310-859d-f6bbb57e9c96
2011-05-13 16:31:31 +00:00
Michael Lotz
a56cbb2afb * When initializing MSI support, don't assume a single 24 entry IO-APIC. Instead
mark the ISA interrupts as unusable and then use ioapic_is_interrupt_available
  to determine if that vector is possibly taken by an IO-APIC. If IO-APICs are
  not used, this will simply always return false, leaving all vectors free for
  MSI use.
* The msi_init() now has to be done after a potential IO-APIC init, so it is now
  done after ioapic_init() instead of inside apic_init().
* Add apic_disable_local_ints() to clear the local ints on the local APIC once
  we are in APIC mode (i.e. the IO-APIC is set up and we don't need the external
  routing anymore).


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@41445 a95241bf-73f2-0310-859d-f6bbb57e9c96
2011-05-11 18:05:05 +00:00
Michael Lotz
20537052a2 Quick build fix for the FreeBSD compatibility layer. Maybe the definition should
be moved to a (even) more private header?


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@41427 a95241bf-73f2-0310-859d-f6bbb57e9c96
2011-05-11 01:30:55 +00:00
Michael Lotz
dc14d97b7f * Move the legacy PIC and the IO-APIC code into their own source file. No
functional change intended.
* Use an appropriately sized sLevelTriggeredInterrupts for each controller type.
  This also fixes an out of bound access for IO-APICs with more than 32 entries
  and also returns the right mode in such cases.


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@41426 a95241bf-73f2-0310-859d-f6bbb57e9c96
2011-05-11 00:53:03 +00:00
Ithamar R. Adema
e59aab0981 ARM: Some header cleanup in preperation of more CPU support code...
git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@40948 a95241bf-73f2-0310-859d-f6bbb57e9c96
2011-03-14 13:48:21 +00:00
François Revol
8dfd99a91c Build fix for r40196. Should now be back to previous state (breaks at vm stuff).
git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@40229 a95241bf-73f2-0310-859d-f6bbb57e9c96
2011-01-13 12:29:15 +00:00
Ingo Weinhold
4535495d80 Merged the signals branch into trunk, with these changes:
* The team and thread kernel structures have been renamed to Team and Thread
  respectively and moved into the new BKernel namespace.
* Several (kernel add-on) sources have been converted from C to C++ since
  private kernel headers are included that are no longer C compatible.

Changes after merging:
* Fixed gcc 2 build (warnings mainly in the scary firewire bus manager).


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@40196 a95241bf-73f2-0310-859d-f6bbb57e9c96
2011-01-10 21:54:38 +00:00
Ithamar R. Adema
c917cd6261 * ARM: Major VM work
- This is mostly a copy of the x86 32bit paging method and infrastructure, this was copied for two reasons:
		1) It is the most complete VM arch
		2) The first ARM PAE patches have landed on alkml, so we will have to deal with it in the future as well,
		   and this infrastructure has proven to be ready ;)
	- No protection features, or dirty/accessed tracking yet
	- Lots of #if 0

	but....

	It boots all the way up to init_modules() now, and then dies because of a lack of (ARM) ELF relocation implementation!

	Since at this point the VM can be fully initialised, I'm going to focus on CPU exceptions next, so we can get KDL to trigger
	when it happens, and I can actually debug from there ;)


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@39206 a95241bf-73f2-0310-859d-f6bbb57e9c96
2010-10-30 14:10:30 +00:00
Ithamar R. Adema
107ce9b0fb * ARM: Remove fields that were no longer used since r39168...
git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@39205 a95241bf-73f2-0310-859d-f6bbb57e9c96
2010-10-30 13:57:32 +00:00
François Revol
c489b073c8 Partial build fix. Still a lot to do to catch up with Ingo...
git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@39189 a95241bf-73f2-0310-859d-f6bbb57e9c96
2010-10-30 01:33:50 +00:00
Ithamar R. Adema
d38153721e * Add page directory/table helper macros.
git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@39137 a95241bf-73f2-0310-859d-f6bbb57e9c96
2010-10-25 11:16:21 +00:00
Ithamar R. Adema
2609a6bc98 * Fix header guard.
git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@39133 a95241bf-73f2-0310-859d-f6bbb57e9c96
2010-10-24 22:06:22 +00:00
Fredrik Holmqvist
f55ffb1a8e Completed structures for MADT APIC structures. I may now have a Frankenheimer.
git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@39073 a95241bf-73f2-0310-859d-f6bbb57e9c96
2010-10-23 15:49:17 +00:00
Fredrik Holmqvist
868d2a2ed5 Compile first, commit after. Not the other way around.
git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@39061 a95241bf-73f2-0310-859d-f6bbb57e9c96
2010-10-23 09:49:55 +00:00
Fredrik Holmqvist
a808dd7283 Adding more structures for MADT APIC structures. Correct some missed documentation.
git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@39060 a95241bf-73f2-0310-859d-f6bbb57e9c96
2010-10-23 09:48:17 +00:00
Fredrik Holmqvist
d7a03e967e Started adding structures for MADT APIC structures.
git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@39059 a95241bf-73f2-0310-859d-f6bbb57e9c96
2010-10-23 09:01:24 +00:00
Fredrik Holmqvist
228b810454 Add the different APIC type ids for MADT APIC structures.
git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@39057 a95241bf-73f2-0310-859d-f6bbb57e9c96
2010-10-23 07:44:39 +00:00
Ithamar R. Adema
150820bc87 * Remove PXA270 code from Freerunner header file
git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@39048 a95241bf-73f2-0310-859d-f6bbb57e9c96
2010-10-22 17:31:04 +00:00
François Revol
dae84707ac Patch by "notzed" (Ticket #5380): Add support for setting video mode for OMAP3.
git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@37321 a95241bf-73f2-0310-859d-f6bbb57e9c96
2010-06-30 17:39:36 +00:00
François Revol
6c6d79f7fa Add some defines for memory ranges. Missed in r37319.
git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@37320 a95241bf-73f2-0310-859d-f6bbb57e9c96
2010-06-30 17:25:08 +00:00
François Revol
9020ce87e6 Patch by "notzed" (ticket #5368) (modified): Add bootloader support for BeagleBoard.
git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@37319 a95241bf-73f2-0310-859d-f6bbb57e9c96
2010-06-30 17:24:11 +00:00
François Revol
2e749db8bf Debug console on FreeRunner is on UART3, though you need a debug board.
git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@37306 a95241bf-73f2-0310-859d-f6bbb57e9c96
2010-06-30 00:05:30 +00:00
Andreas Färber
d46ce4d62a kernel_ppc: Save caller's stack pointer in arch_debug_save_registers
Suggested by Ingo in ticket #6139. Code is adapted from x86.
Note that on ppc64 GPR1 needs to be 64-bit, thus the choice of addr_t.

Resolves part of ticket #6160.


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@37281 a95241bf-73f2-0310-859d-f6bbb57e9c96
2010-06-27 20:16:59 +00:00
Ingo Weinhold
45bd7bb3db Removed unnecessary inclusions of <boot/kernel_args.h> in private kernel
headers and respectively added includes in source files.


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@37259 a95241bf-73f2-0310-859d-f6bbb57e9c96
2010-06-25 22:16:10 +00:00
Travis Geiselbrecht
9623c48284 SMP: remove the tracking of apic id -> cpu id. Don't pass between bootloader and kernel.
Kernel doesn't use it, and it could be regenerated in the kernel if it did need it.

This also unlocks the apic range the bios can use. Previously the apic ids would have
to fit within 0..MAX_CPUS or it'd reject the cpu. Some boxes (mine in particular)
seem to sparsely populate the apic id so that the range is pretty large.

git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@37108 a95241bf-73f2-0310-859d-f6bbb57e9c96
2010-06-12 01:01:54 +00:00
Ingo Weinhold
9e101ddfcc Definition for CR4 PAE bit.
git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@37073 a95241bf-73f2-0310-859d-f6bbb57e9c96
2010-06-09 21:21:48 +00:00
Ingo Weinhold
5aa0503c7c * Removed i386_translation_map_get_pgdir() and adjusted the one place where it
was used.
* Renamed X86VMTranslationMap to X86VMTranslationMap32Bit and pulled the paging
  method agnostic part into new base class X86VMTranslationMap.
* Moved X86PagingStructures into its own header/source pair.
* Moved pgdir_virt from X86PagingStructures to X86PagingStructures32Bit where
  it is actually used.


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@37055 a95241bf-73f2-0310-859d-f6bbb57e9c96
2010-06-08 00:20:34 +00:00
Ingo Weinhold
c3e021e862 x86:
* Renamed i386_context_switch() to x86_context_switch().
* x86_context_switch() no longer sets the page directory.
  arch_thread_context_switch() does that explicitly, now. This allows to solve
  the TODO by reordering releasing the previous paging structures reference and
  setting the new page directory.


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@37024 a95241bf-73f2-0310-859d-f6bbb57e9c96
2010-06-05 22:09:24 +00:00
Ingo Weinhold
fabdf00e6a Renamed i386_swap_pgdir() to x86_swap_pgdir.
git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@37023 a95241bf-73f2-0310-859d-f6bbb57e9c96
2010-06-05 21:53:32 +00:00
Ingo Weinhold
8421714089 x86:
* Renamed vm_translation_map_arch_info to X86PagingStructures, and all
  members and local variables of that type accordingly.
* arch_thread_context_switch(): Added TODO: The still active paging structures
  can indeed be deleted before we stop using them.


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@37022 a95241bf-73f2-0310-859d-f6bbb57e9c96
2010-06-05 21:51:05 +00:00
Ingo Weinhold
78dde7abd7 Consequently use uint32 for the physical page directory address.
git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@37011 a95241bf-73f2-0310-859d-f6bbb57e9c96
2010-06-04 22:23:22 +00:00
Ingo Weinhold
147133b76c * First run through the kernel's private parts to use phys_{addr,size}_t
where appropriate.
* Typedef'ed page_num_t to phys_addr_t and used it in more places in
  vm_page.{h,cpp}.


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@36937 a95241bf-73f2-0310-859d-f6bbb57e9c96
2010-05-25 21:34:08 +00:00
Axel Dörfler
9de17be600 * Moved I/O APIC initialization to a later point, now the APCI and DPC modules
can safely be used.
* Since using the I/O APIC is disabled by default, I've removed the "return"
  that prevented its use when enabled. Let's see if it already does anything.
* Adapted other arch_int.cpp with a bit of cleanup.


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@36290 a95241bf-73f2-0310-859d-f6bbb57e9c96
2010-04-15 12:42:10 +00:00
Michael Lotz
33fbe25496 * Add code to allocate and free interrupt vectors for message signaled
interrupts (MSI).
* Add the remaining IDT entries and redirection functions in the interrupt code.
* Make the PIC end_of_interrupt() return a result to indicate whether the vector
  was handled by this PIC. If it isn't we now issue a apic_end_of_interrupt()
  in the assumption of apic local interrupt, MSI or IPI. This also removes
  the need for the gUsingIOAPIC global and doing manual apic_end_of_interrupt()
  calls in the SMP and timer code.


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@36221 a95241bf-73f2-0310-859d-f6bbb57e9c96
2010-04-13 14:46:09 +00:00
Michael Lotz
3d310bd5f4 * Fix build, the APIC definitions are used in the bootloader too.
* Automatic whitespace cleanup.


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@36189 a95241bf-73f2-0310-859d-f6bbb57e9c96
2010-04-12 15:59:40 +00:00
Michael Lotz
5819c3f9ff Forgot to remove these in the previous commit.
git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@36183 a95241bf-73f2-0310-859d-f6bbb57e9c96
2010-04-12 13:07:21 +00:00
Michael Lotz
655f3b4161 Seperate the generic (local) APIC stuff into it's own file and use it from the
other places where previously the same functionality was duplicated. Also
seperated the header which was originally arch_smp.h into apic.h and arch_smp.h
again as some of it is MP and not actually APIC.


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@36182 a95241bf-73f2-0310-859d-f6bbb57e9c96
2010-04-12 12:56:13 +00:00
Ingo Weinhold
feddedab0c x86:
Added fields for temporary storage of the debug registers dr6 and dr7 to the
arch_cpu_info structure. The actual registers are stored at the beginning of
x86_exit_user_debug_at_kernel_entry() and read in
x86_handle_debug_exception().
The problem was that x86_exit_user_debug_at_kernel_entry() itself overwrote
dr7 and, if kernel breakpoints were enabled, dr6 could be overwritten anytime
after. So x86_handle_debug_exception() would find incorrect values in the
registers (definitely in dr7) and thus interpret the detected debug condition
incorrectly. Usually watchpoints were recognized as breakpoints.


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@35951 a95241bf-73f2-0310-859d-f6bbb57e9c96
2010-03-26 00:03:53 +00:00
Ingo Weinhold
cfefeee3f8 * Changed arch_debug_save_registers() to take an arch-specific structure
arch_debug_registers instead.
* Call arch_debug_save_registers() on all CPUs when entering the kernel
  debugger.
* Added debug_get_debug_registers() to return a specified CPU's saved
  registers.
* x86:
  - Replaced the previous arch_debug_save_registers() implementation. Disabled
    getting the registers via the gdb interface for the time being.
  - Fixed the "sc", "call", and "calling" commands to also work for threads
    running on another CPU.


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@35907 a95241bf-73f2-0310-859d-f6bbb57e9c96
2010-03-18 17:20:06 +00:00
Ingo Weinhold
d40a935560 Boot loader (x86 mmu.cpp):
* Made the page table allocation more flexible. Got rid of sMaxVirtualAddress
  and added new virtual_end address to the architecture specific kernel args.
* Increased the virtual space we reserve for the kernel to 16 MB. That
  should suffice for quite a while. The previous 2 MB were too tight when
  building the kernel with debug info.
* mmu_init(): The way we were translating the BIOS' extended memory map to
  our physical ranges arrays was broken. Small gaps between usable memory
  ranges would be ignored and instead marked allocated. This worked fine for
  the boot loader and during the early kernel initialization, but after the
  VM has been fully set up it frees all physical ranges that have not been
  claimed otherwise. So those ranges could be entered into the free pages
  list and would be used later. This could possibly cause all kinds of weird
  problems, probably including ACPI issues. Now we add only the actually
  usable ranges to our list.

Kernel:
* vm_page_init(): The pages of the ranges between the usable physical memory
  ranges are now marked PAGE_STATE_UNUSED, the allocated ranges
  PAGE_STATE_WIRED.
* unmap_and_free_physical_pages(): Don't free pages marked as unused.


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@35726 a95241bf-73f2-0310-859d-f6bbb57e9c96
2010-03-02 18:13:06 +00:00
Ingo Weinhold
dac21d8bfe * map_physical_memory() does now always set a memory type. If none is given (it
needs to be or'ed to the address specification), "uncached" is assumed.
* Set the memory type for the "BIOS" and "DMA" areas to write-back. Not sure, if
  that's correct, but that's what was effectively used on my machines before.
* Changed x86_set_mtrrs() and the CPU module hook to also set the default memory
  type.
* Rewrote the MTRR computation once more:
  - Now we know all used memory ranges, so we are free to extend used ranges
    into unused ones in order to simplify them for MTRR setup.
  - Leverage the subtractive properties of uncached and write-through ranges to
    simplify ranges of any other respectively write-back type.
  - Set the default memory type to write-back, so we don't need MTRRs for the
    RAM ranges.
  - If a new range intersects with an existing one, we no longer just fail.
    Instead we use the strictest requirements implied by the ranges. This fixes
    #5383.

Overall the new algorithm should be sufficient with far less MTRRs than before
(on my desktop machine 4 are used at maximum, while 8 didn't quite suffice
before). A drawback of the current implementation is that it doesn't deal with
the case of running out of MTRRs at all, which might result in some ranges
having weaker caching/memory ordering properties than requested.


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@35515 a95241bf-73f2-0310-859d-f6bbb57e9c96
2010-02-18 13:52:43 +00:00
Ingo Weinhold
2735cad982 Added missing include.
git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@35392 a95241bf-73f2-0310-859d-f6bbb57e9c96
2010-02-03 18:47:07 +00:00
Ingo Weinhold
c2629ccc6a Patch by "Grey": Small optimization of arch_int_disable_interrupts_inline()
and arch_int_restore_interrupts_inline().


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@35377 a95241bf-73f2-0310-859d-f6bbb57e9c96
2010-02-01 08:55:44 +00:00
Ingo Weinhold
bcc2c157a1 Refactored vm_translation_map:
* Pulled the physical page mapping functions out of vm_translation_map into
  a new interface VMPhysicalPageMapper.
* Renamed vm_translation_map to VMTranslationMap and made it a proper C++
  class. The functions in the operations vector have become methods.
* Added class GenericVMPhysicalPageMapper implementing VMPhysicalPageMapper
  as far as possible (without actually writing new code).
* Adjusted the x86 and the PPC specifics accordingly (untested for the
  latter). For the other architectures the build is, I'm afraid, seriously
  broken.

The next steps will modify and extend the VMTranslationMap interface, so that
it will be possible to fix the bugs in vm_unmap_page[s]() and employ
architecture specific optimizations.


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@35066 a95241bf-73f2-0310-859d-f6bbb57e9c96
2010-01-14 03:26:12 +00:00
Ingo Weinhold
924a3e5f9b Removed unused <arch>_switch_stack_and_call() and
arch_thread_switch_kstack_and_call().


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@34971 a95241bf-73f2-0310-859d-f6bbb57e9c96
2010-01-09 15:09:02 +00:00
Ingo Weinhold
a38f850360 * arch_debug_get_stack_trace():
- Replaced the "userOnly" parameter by a "flags" parameter, that allows to
    specify kernel and userland stack traces individually.
  - x86, m68k: Don't always skip the first frame as that prevents the caller
    from being able to record its own address.
* capture_tracing_stack_trace(): Replaced the "userOnly" parameter by
  "kernelOnly", since one is probably always interested in the kernel stack
  trace, but might not want the userland stack trace.
* Added stack trace support for VM cache kernel tracing.


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@34742 a95241bf-73f2-0310-859d-f6bbb57e9c96
2009-12-22 15:15:07 +00:00
Ingo Weinhold
34a48c70ef Added type nanotime_t (an int64 storing a nanoseconds value) and function
system_time_nsecs(), returning the system time in nanoseconds. The function
is only really implemented for x86. For the other architectures
system_time() * 1000 is returned.


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@34543 a95241bf-73f2-0310-859d-f6bbb57e9c96
2009-12-07 21:43:19 +00:00
Ingo Weinhold
e50cf8765b * Moved the VM headers into subdirectory vm/.
* Renamed vm_cache.h/vm_address_space.h to VMCache.h/VMAddressSpace.


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@34449 a95241bf-73f2-0310-859d-f6bbb57e9c96
2009-12-02 18:05:10 +00:00
Ingo Weinhold
a99eb6b56f vm_area -> VMArea
git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@34423 a95241bf-73f2-0310-859d-f6bbb57e9c96
2009-12-01 17:40:04 +00:00