Make the page table types scalar, to make them simpler to use with atomic ops, and define the corresponding bitmasks.
While structs looked cleaner at first sight, it didn't really was any simpler. git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@43140 a95241bf-73f2-0310-859d-f6bbb57e9c96
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@ -65,22 +65,55 @@ struct short_indirect_entry {
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- the 3rd level is a "page table" as on x86. (pgtbl)
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*/
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typedef struct short_page_directory_entry page_root_entry;
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typedef struct short_page_directory_entry page_directory_entry;
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typedef struct short_page_table_entry page_table_entry;
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typedef struct short_indirect_entry page_indirect_entry;
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/* struct types suffixed with _s */
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typedef struct short_page_directory_entry page_root_entry_s;
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typedef struct short_page_directory_entry page_directory_entry_s;
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typedef struct short_page_table_entry page_table_entry_s;
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typedef struct short_indirect_entry page_indirect_entry_s;
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/* scalar storage type that maps them */
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typedef uint32 page_root_entry_scalar;
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typedef uint32 page_directory_entry_scalar;
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typedef uint32 page_table_entry_scalar;
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typedef uint32 page_indirect_entry_scalar;
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typedef uint32 page_root_entry;
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typedef uint32 page_directory_entry;
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typedef uint32 page_table_entry;
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typedef uint32 page_indirect_entry;
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#define DT_ROOT DT_VALID_4
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#define DT_DIR DT_VALID_4
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//#define DT_PAGE DT_PAGE :)
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#define DT_INDIRECT DT_VALID_4
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/* bitmask access */
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/* those are valid for all entries */
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#define M68K_PE_READONLY 0x00000004
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#define M68K_PE_ACCESSED 0x00000008
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#define M68K_PRE_READONLY T M68K_PE_READONLY
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#define M68K_PRE_ACCESSED M68K_PE_ACCESSED
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#define M68K_PRE_ADDRESS_MASK 0xfffffff0
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#define M68K_PDE_READONLY M68K_PE_READONLY
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#define M68K_PDE_ACCESSED M68K_PE_ACCESSED
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#define M68K_PDE_ADDRESS_MASK 0xfffffff0
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#define M68K_PTE_READONLY M68K_PE_READONLY
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#define M68K_PTE_ACCESSED M68K_PE_ACCESSED
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#define M68K_PTE_DIRTY 0x00000010
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#define M68K_PTE_CACHE_MODE_MASK 0x00000060
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#define M68K_PTE_CACHE_MODE_SHIFT 5
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#define M68K_PTE_SUPERVISOR 0x00000080
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#define M68K_PTE_UPA1 0x00000100
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#define M68K_PTE_UPA0 0x00000200
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#define M68K_PTE_GLOBAL 0x00000400
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#define M68K_PTE_USER_RESERVED 0x00000800
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#define M68K_PTE_ADDRESS_MASK 0xfffff000
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#define M68K_PIE_ADDRESS_MASK 0xfffffffc
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/* default scalar values for entries */
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#define DFL_ROOTENT_VAL 0x00000000
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#define DFL_DIRENT_VAL 0x00000000
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@ -114,34 +147,41 @@ typedef uint32 page_indirect_entry_scalar;
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// PI: page index (index of table relative to page start)
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// from a root entry
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#define PRE_TO_TA(a) ((*(uint32 *)(&(a))) & ~((1<<9)-1))
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#define PRE_TO_PN(e) ((*(uint32 *)(&(e))) >> 12)
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#define PRE_TO_PA(e) ((*(uint32 *)(&(e))) & ~((1<<12)-1))
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//#define PRE_TO_PO(e) ((*(uint32 *)(&(e))) & ((1<<12)-1))
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//#define PRE_TO_PI(e) (((*(uint32 *)(&(e))) & ((1<<12)-1)) / SIZ_DIRTBL)
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#define TA_TO_PREA(a) ((a) >> 4)
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#define PRE_TYPE(e) ((e) & M68K_PE_DT_MASK)
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#define PRE_TO_TA(e) (((uint32)(e)) & ~((1<<9)-1))
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#define PRE_TO_PN(e) (((uint32)(e)) >> 12)
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#define PRE_TO_PA(e) (((uint32)(e)) & ~((1<<12)-1))
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//#define PRE_TO_PO(e) (((uint32)(e)) & ((1<<12)-1))
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//#define PRE_TO_PI(e) ((((uint32)(e)) & ((1<<12)-1)) / SIZ_DIRTBL)
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#define TA_TO_PREA(a) ((a) & M68K_PRE_ADDRESS_MASK)
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// from a directory entry
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#define PDE_TO_TA(a) ((*(uint32 *)(&(a))) & ~((1<<8)-1))
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#define PDE_TO_PN(e) ((*(uint32 *)(&(e))) >> 12)
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#define PDE_TO_PA(e) ((*(uint32 *)(&(e))) & ~((1<<12)-1))
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//#define PDE_TO_PO(e) ((*(uint32 *)(&(e))) & ((1<<12)-1))
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//#define PDE_TO_PI(e) (((*(uint32 *)(&(e))) & ((1<<12)-1)) / SIZ_PAGETBL)
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#define TA_TO_PDEA(a) ((a) >> 4)
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#define PDE_TYPE(e) ((e) & M68K_PE_DT_MASK)
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#define PDE_TO_TA(e) (((uint32)(e)) & ~((1<<8)-1))
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#define PDE_TO_PN(e) (((uint32)(e)) >> 12)
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#define PDE_TO_PA(e) (((uint32)(e)) & ~((1<<12)-1))
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//#define PDE_TO_PO(e) (((uint32)(e)) & ((1<<12)-1))
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//#define PDE_TO_PI(e) ((((uint32)(e)) & ((1<<12)-1)) / SIZ_PAGETBL)
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#define TA_TO_PDEA(a) ((a) & M68K_PDE_ADDRESS_MASK)
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// from a table entry
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#define PTE_TO_TA(a) ((*((uint32 *)(&(a)))) & ~((1<<12)-1))
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#define PTE_TO_PN(e) ((*((uint32 *)(&(e)))) >> 12)
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#define PTE_TO_PA(e) ((*((uint32 *)(&(e)))) & ~((1<<12)-1))
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#define TA_TO_PTEA(a) ((a) >> 12)
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#define PTE_TYPE(e) ((e) & M68K_PE_DT_MASK)
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#define PTE_TO_TA(e) (((uint32)(e)) & ~((1<<12)-1))
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#define PTE_TO_PN(e) (((uint32)(e)) >> 12)
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#define PTE_TO_PA(e) (((uint32)(e)) & ~((1<<12)-1))
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#define TA_TO_PTEA(a) ((a) & M68K_PTE_ADDRESS_MASK)
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// from an indirect entry
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#define PIE_TO_TA(a) ((*((uint32 *)(&(a)))) & ~((1<<2)-1))
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#define PIE_TO_PN(e) ((*((uint32 *)(&(e)))) >> 12)
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#define PIE_TO_PA(e) ((*((uint32 *)(&(e)))) & ~((1<<12)-1))
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#define PIE_TO_PO(e) ((*((uint32 *)(&(e)))) & ((1<<12)-(1<<2)))
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#define TA_TO_PIEA(a) ((a) >> 2)
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#define PIE_TYPE(e) ((e) & M68K_PE_DT_MASK)
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#define PIE_TO_TA(e) (((uint32)(e)) & ~((1<<2)-1))
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#define PIE_TO_PN(e) (((uint32)(e)) >> 12)
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#define PIE_TO_PA(e) (((uint32)(e)) & ~((1<<12)-1))
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#define PIE_TO_PO(e) (((uint32)(e)) & ((1<<12)-(1<<2)))
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#define TA_TO_PIEA(a) ((a) & M68K_PIE_ADDRESS_MASK)
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/* 7/7/6 split */
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#define VADDR_TO_PRENT(va) (((va) / B_PAGE_SIZE) / (64*128))
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#define VADDR_TO_PDENT(va) ((((va) / B_PAGE_SIZE) / 64) % 128)
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#define VADDR_TO_PTENT(va) (((va) / B_PAGE_SIZE) % 64)
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#define VADDR_TO_PRENT(va) (((va) / B_PAGE_SIZE) / (64*128))
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#define VADDR_TO_PDENT(va) ((((va) / B_PAGE_SIZE) / 64) % 128)
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#define VADDR_TO_PTENT(va) (((va) / B_PAGE_SIZE) % 64)
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#endif /* _KERNEL_ARCH_M68K_040_MMU_H */
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