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363 Commits

Author SHA1 Message Date
thorpej
a13469e728 Revert my previous GCC 3.3-related changes; GCC 3.3 has been fixed 
to handle our stdarg/varargs ABI for PowerPC.
 2002-12-04 17:42:51 +00:00
manu
dfa96ff4b3 Add signal delivery for the PowerPC. Everything is implemented except siginfo. 
The stack layout is observed from stack dumps on Darwin, so it should be
very accurate.
 2002-11-26 23:54:09 +00:00
lukem
0635de35a3 Remove KDIR=, since SYS_INCLUDE=symlinks and KDIR are not supported any more. 2002-11-26 23:30:07 +00:00
thorpej
3911a545e1 No newlines in string constants. 2002-11-25 01:36:35 +00:00
thorpej
11707809eb No newlines in string constants. 2002-11-25 01:31:12 +00:00
jdolecek
2ba45545df back previous off; don't install macho_machdep.h 2002-11-04 15:27:15 +00:00
matt
6d54e503b3 LP64 changes (copied from mips and changed CHAR_MIN/MAX to 0/0xffU). 2002-11-03 22:55:24 +00:00
matt
c89494d09b Change _MACHINE_foo_H_ to _POWERPC_foo_H_ 2002-11-03 22:36:22 +00:00
matt
6dc0eb390f Add LP64 bits (copied from MIPS). 2002-11-03 22:35:33 +00:00
matt
0d380378cf Add LP64 limits. 2002-11-03 22:23:59 +00:00
manu
fddf44c0bf Add COMPAT_MACH and EXEC_MACHO support on the PowerPC 2002-10-30 06:41:45 +00:00
manu
f9cac3b168 Changed the ifndef guard of this header file from _MACH_EXEC_H_ to 
_POWERPC_AOUT_EXEC_H_. The former was conflicting with
<compat/mach/mach_exec.h>.
 2002-10-28 18:00:40 +00:00
thorpej
4b68c83f09 Make these work with GCC 3.x. 2002-10-25 20:46:44 +00:00
matt
8c472e414b Move pte_spill calls from trap_subr to trap(). Count the number of 
"evictions" and avoide calling pmap_pte_spill if there are no evictions
for the current pmap.  Make the ISI execption use the default exception
code.  Remove lots of dead stuff from trap_subr.

Make olink use TAILQ instead of LIST and be sorted with evicted entries
first and resident entries last.  Make use of this knowledge to make
pmap_pte_spill do a fast exit.
 2002-10-10 22:37:50 +00:00
matt
b6b04cb00c In mftb(), make sure we say we are clobbering cr0. 2002-09-26 01:13:32 +00:00
simonb
63096043b3 Use "#define\t" instead of "#define ". 2002-09-22 08:30:56 +00:00
chs
c081614ea2 it really helps to get the stub right before cutting + pasting it 27 times. 
alas, I did not.  doh.
 2002-09-22 07:53:39 +00:00
chs
55e1f79335 add pmap_remove_all() hook (empty on most platforms so far). 2002-09-22 07:17:08 +00:00
gmcgarry
dca80f08fd Add __HAVE_MD_RUNQUEUE flag for MD code to override MI run queue primitives. 2002-09-22 04:11:32 +00:00
matt
45e5f68016 Allow MAXPHYS to be overriden. Increase the default MSGBUFSIZE to 2 pages. 2002-09-06 19:26:26 +00:00
matt
d2965f3ad3 Prepare for PPC64. Use register_t for mtmsr/mfmsr since the msr on PPC64 
is 64bits wide.  Define proper types for PPC64 if _LP64 is defined.
 2002-08-14 15:41:57 +00:00
matt
571dd402e2 Add a bunch of mpc8xx SPR definitions. 2002-08-14 15:38:40 +00:00
simonb
f0302072f1 Use "ibm4xx" instead of "galaxy"; galaxy was an early code name for the 
405GP.
 2002-08-13 05:43:24 +00:00
simonb
497d6762cf Split out device register definitions to their own files as the are 
common across many of the 4xx parts.  Leaves ibm405gp.h with device
address information specific to the 405GP CPU.  Now allows opb.c to
support multiple 4xx CPU types.
 2002-08-13 04:57:48 +00:00
simonb
95319edf4a Add some IBM 4xx CPU PVR values; sort PVRs numerically. 
White space nits.
 2002-08-11 13:33:00 +00:00
simonb
ef1df3654e Define the 4xx PVR values in one place only. 2002-08-11 13:32:20 +00:00
matt
549ac19770 Add IBM Power3 CPUID. 2002-08-10 21:38:06 +00:00
matt
0fb9cba190 Add SPR_ASR from OEA-64. Change mfspr to use register_t. 2002-08-08 22:49:09 +00:00
chs
0a97a311e2 it's PPC_HAVE_FPU, not PPC_HAS_FPU. 
also, include the headers that turn on FPU and AltiVec features
in case no one else does.
 2002-08-08 01:27:35 +00:00
tsubai
e373d8b520 Re-correct previous. It's intentional. 2002-08-07 08:01:57 +00:00
briggs
0b956d0b8b Implement pmc(9) -- An interface to hardware performance monitoring 
counters.  These counters do not exist on all CPUs, but where they
do exist, can be used for counting events such as dcache misses that
would otherwise be difficult or impossible to instrument by code
inspection or hardware simulation.

pmc(9) is meant to be a general interface.  Initially, the Intel XScale
counters are the only ones supported.
 2002-08-07 05:14:47 +00:00
matt
a2e9fe106d Correct __va_list typedef for GCC 3.* to match the GCC 3.* definition. 2002-08-07 00:11:59 +00:00
chs
2928d8ba05 actually we shouldn't hold kernel_lock while calling postsig(). 2002-08-06 06:18:24 +00:00
chs
0924752f24 add the MSSCR0 register and some more L2CR fields. 2002-08-06 06:17:50 +00:00
chs
461184c6b6 fix the calculation of the address of the IPI dispatch register. 2002-08-06 06:16:42 +00:00
chs
301f1ebf31 move more inlines to cpu.h: mftb(), mftbl() and mfpvr(). 
(the mftb() in pmap.c only wanted the lower 32 bits, so that's now mftbl()).
 2002-08-06 06:14:33 +00:00
chs
810cde53cc use a completely separate trap handler for syscall traps. 
this reduces syscall overhead by 10% to 20% depending on cpu type.
 2002-08-02 03:46:42 +00:00
matt
3e158de7c1 Don't define register references if not KERNEL or STANDALONE. 2002-07-30 06:09:10 +00:00
chs
03315186b6 install atomic.h. 2002-07-28 07:11:25 +00:00
chs
a7171ee431 add some atomic operations. 2002-07-28 07:09:28 +00:00
chs
fccc379b30 restructure the FPU and AltiVEC code so that it works for MP. 2002-07-28 07:07:44 +00:00
chs
84b41b2adb rearrange the PCB structure a bit so it's easier to look at in ddb. 2002-07-28 07:02:54 +00:00
chs
4b5a2a3f79 define CPU_INFO iterators so that the CPU-states sysctl works for MP. 2002-07-28 07:02:29 +00:00
matt
a660a9325f Set normal memory PTEs with PTE_M (memory coherent). Change how we 
remember the "exec"ness of a page.  If a managed page is pmap_enter'ed
with VM_PROT_EXECUTE, remember that it's an "exec"page.  Such that when
additional mapping are performed, no synch'ing of the I-cache is needed.
Revoke "exec"ness when the page is mapped into the kernel with VM_PROT_WRITE
or the pmap_page_protect is called with VM_PROT_NONE.
 2002-07-25 23:33:04 +00:00
chs
185a5bbcf0 rename the intr_depth field of struct intrframe to avoid a name conflict 
in MULTIPROCESSOR builds.
 2002-07-24 05:44:37 +00:00
matt
cde20d8743 Make sure that pmap_zero_page and pmap_copy_page don't make calls or 
reference while relocation is disabled since the stack will be inaccessible.
Add support for using AltiVec in pmap_zero_page and pmap_copy_page on
AltiVec capable processors.
 2002-07-18 22:51:57 +00:00
matt
436f257283 Add a common file to do pmap_zero_page/pmap_copy_page/pmap_pageidlezero and 
pmap_syncicache.  This file uses a ppc feature in a sick and twisted way
to avoid mapping the physical pages used by those routines.  It performs
the operations with the MMU disabled but PPC exception save and retstore
the machine state and are invoked with the MMU disabled, this doesn't have
an adverse effect on the system.

Currently only enable for MPC6xx and !OLDPMAP.
 2002-07-17 03:11:07 +00:00
matt
ece8b74130 Add machdep.powerpc sysctl. Change the default value of powersave to -1 
(< 0 mean no powersave available).  Enable powersave by default for
750/7400/7410 but leave if off for 7450/7455.
 2002-07-16 23:04:20 +00:00
matt
6e81c6293f Bump VM kernel buffer space from 128MB to 192MB now that we have 512MB of 
KVA space.
 2002-07-10 05:25:12 +00:00
matt
e64bc5acc1 Allow USER_SR to be overriden on a per-port basis 2002-07-07 19:29:18 +00:00
matt
51f2834470 Bump max user address to 0xfffff000 (XXX maybe it should be -NBPG?). 2002-07-06 17:15:57 +00:00
matt
685778b53b Peform a rototill over the powerpc-based ports. 
Move the trap/vector initialization for MPC6xx ports to mpc6xx_machdep.c
Also move softnet, install_extintr, mapiodev, kvtop.  Add common BAT
initialization code.

Add user Altivec support.

Fix calls to OF_call_method in macppc/macppc/machdep.c.

Use ci_fpuproc in cpu_info instead of separate fpuproc.

Add separate syscall.c and defined __HAVE_SYSCALL_INTERN.
 2002-07-05 18:45:15 +00:00
thorpej
00e59f25b7 Eliminate two unused sigframe members. 2002-07-04 21:33:43 +00:00
matt
708f4c7b9b Add VRSAVE. 2002-07-01 20:11:05 +00:00
matt
1a5c0cf685 When not using the OLD pmap, bump kernel KVA space to 512MB (OLD pmap stays 
at 256MB).
 2002-06-26 01:16:22 +00:00
thorpej
aaf6e7902d Add ENTRY_NOPROFILE(). 2002-06-23 17:26:58 +00:00
matt
da483421e8 Add IBM750FX (0x7000) 2002-06-20 23:51:22 +00:00
briggs
d6cfd2cc8c Include the Processor ID for the MPC8245. 2002-06-19 17:39:26 +00:00
tsubai
5fcd112b3a Add gcc 3.x version. 2002-06-01 09:22:44 +00:00
augustss
e916f073c3 Add bus_space_vaddr(). 2002-05-31 11:31:30 +00:00
jdolecek
2fc860bc0d make usable in LKM context (use #if defined(_KERNEL_OPT)) 2002-05-19 16:55:43 +00:00
augustss
aaf6178285 Handle the "aligment" fault generated by DCBZ when the cache is off. 
That way you can run the processor with caches off.
 2002-05-19 06:35:45 +00:00
matt
f62dc5c664 Remove redundant declarations. 2002-05-13 07:04:24 +00:00
matt
d210f0530b Eliminate commons. 2002-05-13 06:05:32 +00:00
kleink
3a03930d13 Add a third argument to pmap_bootstrap() which platform-specific 
initialization can use to specify additional segment registers to be set
up in the kernel pmap.
 2002-04-23 12:41:04 +00:00
kleink
884898e332 Convert the spill stack frame to use symbolic offset names; inspired by 
a conversation with Matt Thomas.
 2002-04-21 22:05:45 +00:00
matt
66c475ca19 Use a common genassym.cf for all the PPC_MPC6XX ports. Add a makeoptions to 
std.foo to indicate the directory to get genassym.cf from.  Add an intrframe
to <powerpc/frame.h> and make trap_subr.S use symbolic offsets into it.
 2002-04-18 20:08:05 +00:00
briggs
4fb4a95b7e Install cpu.h. Noted in PR port-powerpc/16285 from smi@sm.sony.co.jp. 2002-04-10 15:36:42 +00:00
matt
f8b9dbe468 Add some MPC745x L3CR cache definitions. 2002-04-03 00:12:41 +00:00
matt
830666e31e Clean the icache for pages when they are entered as executable and before 
they were either not mapped at all or mapped as non-executable.  Round
memory regions in pmap_bootstrap.
 2002-04-03 00:12:07 +00:00
kleink
032762e1e9 On the 601, construct the CPU counter value from the RTC[UL] registers. 2002-03-26 21:50:39 +00:00
matt
12810ed37d Use size_t in prototype (so this will be LP64 clean for PPC64 someday). 
Calculate len separately for icache & dcache in case each has different
cacheline widths.  Make the code for both loops the same except for the
dcbst/icbi.  Deal with sizes >=2GB properly (like that'll happen but ...)
 2002-03-26 21:20:24 +00:00
kleink
7e9d845469 * Add MPC601 versions of BAT_VA_MATCH_P() and BAT_VALID_P(). 
* Make the extern declaration of the battable array incomplete;
  a given port might want to use a differently-sized definition to
  support the 601 BAT implementation, where blocks map up to 8M only.
 2002-03-25 21:35:45 +00:00
eeh
de5252061e Use properties to pass around board-specific information rather than a 
structure.
 2002-03-15 20:59:23 +00:00
eeh
a3833eb1c6 Add this file. 2002-03-13 23:59:58 +00:00
eeh
2277f9518e Delete this file. It's only relevent to 405gp. 2002-03-13 23:09:52 +00:00
eeh
2b55b12b59 405gp-specific DCRs. 2002-03-13 23:09:11 +00:00
eeh
ba8ac60043 pmap improvements: 
Remove the cache flush routines that have been moved to cpu.c

Make sure we clear out the unused PA bits in the TTE which causes breakage
on some MMU models.
 2002-03-13 00:47:58 +00:00
eeh
4b971968ac Add cache_info to cpu_info which provides details about D$ and I$ 
sizes and line sizes.  This is needed for cache flusing, clearing
memory, and several other operations.  This information is accessible
from userland through a new CPU_CACHEINFO sysctl.
 2002-03-13 00:38:13 +00:00
chs
bd2a5f591d switch all mpc6xx powerpc ports to NEWPMAP by default. 
the old pmap is still available with the OLDPMAP option.
 2002-03-09 23:35:56 +00:00
nathanw
3be9fbe42e Move #include <dev/sysmon/sysmonvar.h> inside #ifdef _KERNEL. 2002-03-06 06:37:17 +00:00
kleink
8a79f029ad VRSAVE is SPR 256, not 238. 2002-03-04 13:37:42 +00:00
nathanw
1eeb28024d Add sysmon data structures to struct cpu_info. 2002-03-03 07:09:09 +00:00
matt
997374a8dd Add MPC7455 2002-03-03 06:47:25 +00:00
nathanw
5d5aeaa547 Add bit definitions for the MMCR's, and event numbers for the events 
that are common to the G3 and G4.
 2002-03-03 06:38:31 +00:00
nathanw
7a92615001 Correct the SPR numbers of PMC3 and PMC4. 
SIA wasn't retconned, but the SPR number was wrong. Re-add it, and add
USIA.
 2002-03-03 05:32:37 +00:00
nathanw
c2b8ec655a Delete the retconned SIAR SPR. 2002-03-03 05:17:48 +00:00
nathanw
ee2cbbfe4a Add MPC7xx/7xxx performance monitor control registers (MMCR0-2, UMMCR0-2). 2002-03-03 05:15:44 +00:00
nathanw
28b2a20fb9 Add bit definitions for the MPC750 thermal management registers. 2002-03-03 04:31:53 +00:00
kleink
4a513728e8 Add end-of-comment missing in previous. 2002-03-02 21:36:27 +00:00
kleink
dc0a08feaa Note that Guarded bit is not implemented on the 601. 2002-03-02 15:07:35 +00:00
simonb
4324f37586 Use "#define<tab>". 2002-02-28 03:17:23 +00:00
kleink
543f1e7a2d Handle the 601's Run Mode/Trace Exception as well. 2002-02-22 13:51:40 +00:00
simonb
2d8577fb83 Clean up some rampant code duplication wrt ieee number handling: 
- Add alignment-safe double and float unions.
 - Use the above for the __infinity and __nan constants on all
   architectures that use the standard ieee754 representation of
   those constants.
 - Add a single copy of various ieee754 math functions (frexp, isinf,
   isnan, ldexp and modf) that had numerous duplicates among the
   arch-specific directories.
 - Use the above functions on all architectures where the generic C
   versions where used.  Architectures that had local assembly
   routines are untouched (for those functions only).
 2002-02-19 13:08:12 +00:00
kleink
11402be7a5 Header for the 601's I/O Controller Interface Address Translation 
segment register format.
 2002-02-09 17:44:40 +00:00
briggs
9827f27b9f Update from thorpej: 
* Define type and size of _mcount stub to make PIC code happy.
* Rename mcount to __mcount to get it out of the user namespace.
 2002-02-07 05:13:35 +00:00
kleink
69e30815cf Add a printf bitmask for HID0. 2002-02-06 19:59:30 +00:00
kleink
cd6a8bc27c Add MPC601 MQ and RTCU/RTCL SPRs. 2002-02-05 19:49:17 +00:00
dbj
0ac4681659 add support for kgdb over zs 2002-01-06 00:35:10 +00:00
dbj
1b65d8fd30 fix single stepping and continuing from breakpoints in ddb 2001-12-27 10:32:23 +00:00