to remove. The address of the pointer rather than the address of what
is pointed to was use to track the previous handler resulting in problems
when releasing a chained irq. (from John Ballance)
- New versions of the drivers for the devices that really are IOMD
specific. The old arm32/mainbus drivers have either been rewritten
and are now child devices of the IOMD or they have been restructured
and split into generic drivers will IOMD specific attachments.
- IOMD specific clock support. This used to the the generic ARM clock
support but is now specific to the IOMD device.
- Updated to support new IOMD device etc.
- IOMD specific interrupt handling. These files are mainly the old
arch/arm32/irq* files moved here and updated for new iomd device etc.
(revision history maintained).
- Create an independ IOMD device that can be utilised by all ARM
architectures that use an IOMD.
- Configure all IOMD child devices based on the IOMD type and features.
Eliminate obsolete global kernel variable "struct timezone tz"
Add RTC_OFFSET option
Add global kernel variable rtc_offset, which is initialized by
RTC_OFFSET at kernel compile time.
on i386, x68k, mac68k, pc532 and arm32, RTC_OFFSET indicates how many
minutes west (east) of GMT the hardware RTC runs. Defaults to 0.
Places where tz variable was used to indicate this in the past have
been replaced with rtc_offset.
Add sysctl interface to rtc_offset.
Kill obsolete DST_* macros in sys/time.h
gettimeofday now always returns zeroed timezone if zone is requested.
settimeofday now ignores and logs attempts to set non-existant kernel
timezone.
ends for irq_claim() and irq_release() that will allocate and free
memory for the irqhandler structure.
Added an irqblock array that provides a quick reference to all the
interrupts that should be blocked when a particular interrupt is
received. The irq_claim() and irq_release() functions now update the
irqblock array.
These alternative macros have a workaround for the STM^ bug in revision < 3
StrongARM CPU's that causes incorrect register saving if a cache line fill
is in progress during the STM.
The irq delivery code has been rewritten. On entry to the irq vector the
processor is switched to SVC32 mode so all interrupt routines now run
in SVC32 mode rather than IRQ32 mode. This fixes lots of irq re-enabling
problems.
Interrupt latency times are now vastly improved for high priority interrupts.
Cleaned up calling ast() before returning to USR32 mode (don't need to
mess about with trapframe copying.
Cleaned up all the comments and sorted out their indentation.
Rewritten the soft interrupt delivery code.
Added generic ARM7500 support rather than just RC7500 support.
Fixed the handling of IPL_NONE.
Debugged support for interrupt chaining.
Fill out the intrnames array with the name of the interrupt handler
currently at the head of the chain.
Guarded several sanity checks with #ifdef DIAGNOSTIC.
Added interrupt chaining.
Removed some dead debugging code.
Guarded several sanity checks with #ifdef DIAGNOSTIC
Make sure interrupts are disable while updating the IOMD interrupt
masks.
irq_claim().
Clear the active flag in the irq handler when it is removed from the irq
chain in irq_release().
Checks for podule IRQ's in irq_claim() are now guarded with
#if NPODULEBUS > 0
fiq_release() now retrieves the FIQ more registers and places them
back in the fiq handler structure.
