Adopt as standard, the instruction sequence for storing the trapframe that

includes the workaround from the SA110 STM^ bug. This allows one piece of
code to be used to store the trapframe on all CPU types.
This commit is contained in:
mark 1997-02-04 06:49:08 +00:00
parent f6570e9a78
commit e626201c12
4 changed files with 13 additions and 13 deletions

View File

@ -1,7 +1,7 @@
/* $NetBSD: exception.S,v 1.8 1996/11/23 04:02:40 mark Exp $ */
/* $NetBSD: exception.S,v 1.9 1997/02/04 06:49:08 mark Exp $ */
/*
* Copyright (c) 1994-1996 Mark Brinicombe.
* Copyright (c) 1994-1997 Mark Brinicombe.
* Copyright (c) 1994 Brini.
* All rights reserved.
*
@ -54,7 +54,7 @@
* Since the current mode is used, the SVC R14 field is not defined.
*/
#ifdef CPU_SA110
#if 1
#define PUSHFRAME \
str lr, [sp, #-4]!; /* Push the return address */ \
@ -114,7 +114,7 @@
* R14 in SVC mode.
*/
#ifdef CPU_SA110
#if 1
#define PUSHFRAMEINSVC \
stmdb sp, {r0-r3}; /* Save 4 registers */ \

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@ -1,7 +1,7 @@
/* $NetBSD: irq.S,v 1.11 1997/01/06 02:35:46 mark Exp $ */
/* $NetBSD: irq.S,v 1.12 1997/02/04 06:49:09 mark Exp $ */
/*
* Copyright (c) 1994-1996 Mark Brinicombe.
* Copyright (c) 1994-1997 Mark Brinicombe.
* Copyright (c) 1994 Brini.
* All rights reserved.
*
@ -55,7 +55,7 @@
* R14 in SVC mode.
*/
#ifdef CPU_SA110
#if 1
#define PUSHFRAMEINSVC \
stmdb sp, {r0-r3}; /* Save 4 registers */ \

View File

@ -1,7 +1,7 @@
/* $NetBSD: locore.S,v 1.16 1997/01/06 02:15:17 mark Exp $ */
/* $NetBSD: locore.S,v 1.17 1997/02/04 06:49:10 mark Exp $ */
/*
* Copyright (C) 1994 Mark Brinicombe
* Copyright (C) 1994-1997 Mark Brinicombe
* Copyright (C) 1994 Brini
* All rights reserved.
*
@ -42,7 +42,7 @@
#define INIT_ARM_STACK_SIZE 2048
#ifdef CPU_SA110
#if 1
#define PUSHFRAME \
str lr, [sp, #-4]!; /* Push the return address */ \

View File

@ -1,7 +1,7 @@
/* $NetBSD: iomd_irq.S,v 1.11 1997/01/06 02:35:46 mark Exp $ */
/* $NetBSD: iomd_irq.S,v 1.12 1997/02/04 06:49:09 mark Exp $ */
/*
* Copyright (c) 1994-1996 Mark Brinicombe.
* Copyright (c) 1994-1997 Mark Brinicombe.
* Copyright (c) 1994 Brini.
* All rights reserved.
*
@ -55,7 +55,7 @@
* R14 in SVC mode.
*/
#ifdef CPU_SA110
#if 1
#define PUSHFRAMEINSVC \
stmdb sp, {r0-r3}; /* Save 4 registers */ \