Added the functions intr_claim() and intr_release(). These are front
ends for irq_claim() and irq_release() that will allocate and free memory for the irqhandler structure. Added an irqblock array that provides a quick reference to all the interrupts that should be blocked when a particular interrupt is received. The irq_claim() and irq_release() functions now update the irqblock array.
This commit is contained in:
mark
parent
b34fcd542a
commit
c87f4e3785
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@ -1,4 +1,4 @@
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/* $NetBSD: irqhandler.c,v 1.12 1996/12/27 02:01:02 mark Exp $ */
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/* $NetBSD: irqhandler.c,v 1.13 1997/01/06 02:30:21 mark Exp $ */
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/*
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* Copyright (c) 1994-1996 Mark Brinicombe.
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@ -46,6 +46,7 @@
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/syslog.h>
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#include <sys/malloc.h>
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#include <vm/vm.h>
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#include <net/netisr.h>
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@ -68,6 +69,8 @@ u_int spl_mask;
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u_int soft_interrupts;
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extern u_int intrcnt[];
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u_int irqblock[NIRQS];
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typedef struct {
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vm_offset_t physical;
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vm_offset_t virtual;
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@ -79,7 +82,6 @@ extern char *_intrnames;
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/* Prototypes */
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int podule_irqhandler __P((void));
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int irq_claim __P((int irq, irqhandler_t *handler));
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extern void zero_page_readonly __P((void));
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extern void zero_page_readwrite __P((void));
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extern int fiq_setregs __P((fiqhandler_t *));
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@ -102,10 +104,12 @@ irq_init()
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{
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int loop;
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/* Clear all the IRQ handlers */
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/* Clear all the IRQ handlers and the irq block masks */
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for (loop = 0; loop < NIRQS; ++loop)
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for (loop = 0; loop < NIRQS; ++loop) {
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irqhandlers[loop] = NULL;
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irqblock[loop] = 0;
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}
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/* Clear the FIQ handler */
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@ -162,6 +166,7 @@ irq_claim(irq, handler)
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irqhandler_t *handler;
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{
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int level;
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int loop;
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#ifdef DIAGNOSTIC
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/* Sanity check */
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@ -250,6 +255,33 @@ irq_claim(irq, handler)
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#endif
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}
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/*
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* We now need to update the irqblock array. This array indicates
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* what other interrupts should be blocked when interrupt is asserted
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* This basically emulates hardware interrupt priorities e.g. by blocking
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* all other IPL_BIO interrupts with an IPL_BIO interrupt is asserted.
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* For each interrupt we find the highest IPL and set the block mask to
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* the interrupt mask for that level.
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*/
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for (loop = 0; loop < NIRQS; ++loop) {
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irqhandler_t *ptr;
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ptr = irqhandlers[loop];
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if (ptr) {
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/* There is at least 1 handler so scan the chain */
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level = ptr->ih_level;
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while (ptr) {
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if (ptr->ih_level > level)
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level = ptr->ih_level;
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ptr = ptr->ih_next;
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}
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irqblock[loop] = ~irqmasks[level];
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} else
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/* No handlers for this irq so nothing to block */
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irqblock[loop] = 0;
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}
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#if NPODULEBUS > 0
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/*
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* Is this an expansion card IRQ and is there a PODULE IRQ handler
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@ -284,6 +316,7 @@ irq_release(irq, handler)
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irqhandler_t *handler;
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{
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int level;
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int loop;
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irqhandler_t *irqhand;
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irqhandler_t **prehand;
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extern char *_intrnames;
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@ -369,7 +402,6 @@ irq_release(irq, handler)
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level = ptr->ih_level - 1;
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ptr = ptr->ih_next;
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}
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while (level >= 0) {
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irqmasks[level] |= (1 << irq);
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--level;
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@ -377,6 +409,33 @@ irq_release(irq, handler)
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}
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}
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/*
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* We now need to update the irqblock array. This array indicates
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* what other interrupts should be blocked when interrupt is asserted
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* This basically emulates hardware interrupt priorities e.g. by blocking
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* all other IPL_BIO interrupts with an IPL_BIO interrupt is asserted.
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* For each interrupt we find the highest IPL and set the block mask to
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* the interrupt mask for that level.
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*/
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for (loop = 0; loop < NIRQS; ++loop) {
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irqhandler_t *ptr;
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ptr = irqhandlers[loop];
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if (ptr) {
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/* There is at least 1 handler so scan the chain */
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level = ptr->ih_level;
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while (ptr) {
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if (ptr->ih_level > level)
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level = ptr->ih_level;
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ptr = ptr->ih_next;
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}
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irqblock[loop] = ~irqmasks[level];
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} else
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/* No handlers for this irq so nothing to block */
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irqblock[loop] = 0;
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}
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/*
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* Disable the appropriate mask bit if there are no handlers left for
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* this IRQ.
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@ -391,6 +450,43 @@ irq_release(irq, handler)
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}
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void *
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intr_claim(irq, level, name, ih_func, ih_arg)
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int irq;
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int level;
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const char *name;
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int (*ih_func) __P((void *));
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void *ih_arg;
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{
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irqhandler_t *ih;
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ih = malloc(sizeof(*ih), M_DEVBUF, M_NOWAIT);
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if (!ih)
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panic("intr_claim(): Cannot malloc handler memory\n");
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ih->ih_level = level;
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ih->ih_name = name;
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ih->ih_func = ih_func;
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ih->ih_arg = ih_arg;
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ih->ih_flags = 0;
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if (irq_claim(irq, ih) != 0)
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return(NULL);
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return(ih);
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}
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void
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intr_release(arg)
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void *arg;
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{
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irqhandler_t *ih = (irqhandler_t *)arg;
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if (irq_release(ih->ih_num, ih) == 0)
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free(ih, M_DEVBUF);
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}
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u_int
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disable_interrupts(mask)
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u_int mask;
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@ -1,4 +1,4 @@
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/* $NetBSD: iomd_irqhandler.c,v 1.12 1996/12/27 02:01:02 mark Exp $ */
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/* $NetBSD: iomd_irqhandler.c,v 1.13 1997/01/06 02:30:21 mark Exp $ */
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/*
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* Copyright (c) 1994-1996 Mark Brinicombe.
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@ -46,6 +46,7 @@
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/syslog.h>
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#include <sys/malloc.h>
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#include <vm/vm.h>
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#include <net/netisr.h>
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@ -68,6 +69,8 @@ u_int spl_mask;
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u_int soft_interrupts;
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extern u_int intrcnt[];
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u_int irqblock[NIRQS];
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typedef struct {
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vm_offset_t physical;
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vm_offset_t virtual;
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@ -79,7 +82,6 @@ extern char *_intrnames;
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/* Prototypes */
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int podule_irqhandler __P((void));
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int irq_claim __P((int irq, irqhandler_t *handler));
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extern void zero_page_readonly __P((void));
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extern void zero_page_readwrite __P((void));
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extern int fiq_setregs __P((fiqhandler_t *));
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@ -102,10 +104,12 @@ irq_init()
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{
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int loop;
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/* Clear all the IRQ handlers */
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/* Clear all the IRQ handlers and the irq block masks */
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for (loop = 0; loop < NIRQS; ++loop)
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for (loop = 0; loop < NIRQS; ++loop) {
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irqhandlers[loop] = NULL;
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irqblock[loop] = 0;
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}
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/* Clear the FIQ handler */
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@ -162,6 +166,7 @@ irq_claim(irq, handler)
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irqhandler_t *handler;
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{
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int level;
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int loop;
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#ifdef DIAGNOSTIC
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/* Sanity check */
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@ -250,6 +255,33 @@ irq_claim(irq, handler)
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#endif
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}
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/*
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* We now need to update the irqblock array. This array indicates
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* what other interrupts should be blocked when interrupt is asserted
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* This basically emulates hardware interrupt priorities e.g. by blocking
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* all other IPL_BIO interrupts with an IPL_BIO interrupt is asserted.
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* For each interrupt we find the highest IPL and set the block mask to
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* the interrupt mask for that level.
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*/
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for (loop = 0; loop < NIRQS; ++loop) {
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irqhandler_t *ptr;
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ptr = irqhandlers[loop];
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if (ptr) {
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/* There is at least 1 handler so scan the chain */
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level = ptr->ih_level;
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while (ptr) {
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if (ptr->ih_level > level)
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level = ptr->ih_level;
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ptr = ptr->ih_next;
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}
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irqblock[loop] = ~irqmasks[level];
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} else
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/* No handlers for this irq so nothing to block */
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irqblock[loop] = 0;
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}
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#if NPODULEBUS > 0
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/*
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* Is this an expansion card IRQ and is there a PODULE IRQ handler
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@ -284,6 +316,7 @@ irq_release(irq, handler)
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irqhandler_t *handler;
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{
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int level;
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int loop;
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irqhandler_t *irqhand;
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irqhandler_t **prehand;
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extern char *_intrnames;
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@ -369,7 +402,6 @@ irq_release(irq, handler)
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level = ptr->ih_level - 1;
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ptr = ptr->ih_next;
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}
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while (level >= 0) {
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irqmasks[level] |= (1 << irq);
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--level;
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@ -377,6 +409,33 @@ irq_release(irq, handler)
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}
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}
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/*
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* We now need to update the irqblock array. This array indicates
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* what other interrupts should be blocked when interrupt is asserted
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* This basically emulates hardware interrupt priorities e.g. by blocking
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* all other IPL_BIO interrupts with an IPL_BIO interrupt is asserted.
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* For each interrupt we find the highest IPL and set the block mask to
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* the interrupt mask for that level.
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*/
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for (loop = 0; loop < NIRQS; ++loop) {
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irqhandler_t *ptr;
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ptr = irqhandlers[loop];
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if (ptr) {
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/* There is at least 1 handler so scan the chain */
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level = ptr->ih_level;
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while (ptr) {
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if (ptr->ih_level > level)
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level = ptr->ih_level;
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ptr = ptr->ih_next;
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}
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irqblock[loop] = ~irqmasks[level];
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} else
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/* No handlers for this irq so nothing to block */
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irqblock[loop] = 0;
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}
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/*
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* Disable the appropriate mask bit if there are no handlers left for
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* this IRQ.
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@ -391,6 +450,43 @@ irq_release(irq, handler)
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}
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void *
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intr_claim(irq, level, name, ih_func, ih_arg)
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int irq;
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int level;
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const char *name;
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int (*ih_func) __P((void *));
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void *ih_arg;
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{
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irqhandler_t *ih;
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ih = malloc(sizeof(*ih), M_DEVBUF, M_NOWAIT);
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if (!ih)
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panic("intr_claim(): Cannot malloc handler memory\n");
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ih->ih_level = level;
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ih->ih_name = name;
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ih->ih_func = ih_func;
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ih->ih_arg = ih_arg;
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ih->ih_flags = 0;
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if (irq_claim(irq, ih) != 0)
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return(NULL);
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return(ih);
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}
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void
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intr_release(arg)
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void *arg;
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{
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irqhandler_t *ih = (irqhandler_t *)arg;
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if (irq_release(ih->ih_num, ih) == 0)
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free(ih, M_DEVBUF);
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}
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u_int
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disable_interrupts(mask)
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u_int mask;
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