arm32 kernel source restructure
- IOMD register definitions moved from arm32/include/ - Updated for new IOMD device and all now base relative.
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mark
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@ -1,7 +1,7 @@
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/* $NetBSD: iomdreg.h,v 1.7 1996/11/23 03:21:43 mark Exp $ */
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/* $NetBSD: iomdreg.h,v 1.8 1997/10/14 11:08:45 mark Exp $ */
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/*
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* Copyright (c) 1994 Mark Brinicombe.
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* Copyright (c) 1994-1997 Mark Brinicombe.
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* Copyright (c) 1994 Brini.
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* All rights reserved.
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*
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@ -17,7 +17,7 @@
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed by Brini.
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* This product includes software developed by Mark Brinicombe.
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* 4. The name of the company nor the name of the author may be used to
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* endorse or promote products derived from this software without specific
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* prior written permission.
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@ -49,142 +49,140 @@
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#define IOMD_BASE 0xf6000000
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#define IOMD_IOCR (IOMD_BASE + 0x00000000)
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#define IOMD_KBDDAT (IOMD_BASE + 0x00000004)
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#define IOMD_KBDCR (IOMD_BASE + 0x00000008)
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#define IOMD_IOCR 0x00000000
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#define IOMD_KBDDAT 0x00000001
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#define IOMD_KBDCR 0x00000002
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#define IOMD_IRQSTA (IOMD_BASE + 0x00000010)
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#define IOMD_IRQRQA (IOMD_BASE + 0x00000014)
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#define IOMD_IRQMSKA (IOMD_BASE + 0x00000018)
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#define IOMD_SUSPEND (IOMD_BASE + 0x0000001C) /* ARM7500 */
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#define IOMD_IRQSTA 0x00000004
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#define IOMD_IRQRQA 0x00000005
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#define IOMD_IRQMSKA 0x00000006
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#define IOMD_SUSPEND 0x00000007 /* ARM7500 */
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#define IOMD_IRQSTB (IOMD_BASE + 0x00000020)
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#define IOMD_IRQRQB (IOMD_BASE + 0x00000024)
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#define IOMD_IRQMSKB (IOMD_BASE + 0x00000028)
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#define IOMD_IRQSTB 0x00000008
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#define IOMD_IRQRQB 0x00000009
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#define IOMD_IRQMSKB 0x0000000a
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#define IOMD_STOP (IOMD_BASE + 0x0000002C) /* ARM7500 */
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#define IOMD_STOP 0x0000000b /* ARM7500 */
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#define IOMD_FIQST (IOMD_BASE + 0x00000030)
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#define IOMD_FIQRQ (IOMD_BASE + 0x00000034)
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#define IOMD_FIQMSK (IOMD_BASE + 0x00000038)
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#define IOMD_FIQST 0x0000000c
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#define IOMD_FIQRQ 0x0000000d
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#define IOMD_FIQMSK 0x0000000e
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#define IOMD_CLKCTL (IOMD_BASE + 0x0000003C) /* ARM7500 */
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#define IOMD_CLKCTL 0x0000000f /* ARM7500 */
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#define IOMD_T0LOW (IOMD_BASE + 0x00000040)
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#define IOMD_T0HIGH (IOMD_BASE + 0x00000044)
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#define IOMD_T0GO (IOMD_BASE + 0x00000048)
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#define IOMD_T0LATCH (IOMD_BASE + 0x0000004c)
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#define IOMD_T0LOW 0x00000010
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#define IOMD_T0HIGH 0x00000011
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#define IOMD_T0GO 0x00000012
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#define IOMD_T0LATCH 0x00000013
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#define IOMD_T1LOW (IOMD_BASE + 0x00000050)
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#define IOMD_T1HIGH (IOMD_BASE + 0x00000054)
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#define IOMD_T1GO (IOMD_BASE + 0x00000058)
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#define IOMD_T1LATCH (IOMD_BASE + 0x0000005c)
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#define IOMD_T1LOW 0x00000014
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#define IOMD_T1HIGH 0x00000015
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#define IOMD_T1GO 0x00000016
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#define IOMD_T1LATCH 0x00000017
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/*
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* For ARM7500, it's not really a IOMD device.
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*/
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#define IOMD_IRQSTC (IOMD_BASE + 0x00000060) /* ARM7500 */
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#define IOMD_IRQRQC (IOMD_BASE + 0x00000064) /* ARM7500 */
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#define IOMD_IRQMSKC (IOMD_BASE + 0x00000068) /* ARM7500 */
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#define IOMD_VIDMUX (IOMD_BASE + 0x0000006C) /* ARM7500 */
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#define IOMD_IRQSTC 0x00000018 /* ARM7500 */
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#define IOMD_IRQRQC 0x00000019 /* ARM7500 */
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#define IOMD_IRQMSKC 0x0000001a /* ARM7500 */
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#define IOMD_VIDMUX 0x0000001b /* ARM7500 */
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#define IOMD_IRQSTD (IOMD_BASE + 0x00000070) /* ARM7500 */
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#define IOMD_IRQRQD (IOMD_BASE + 0x00000074) /* ARM7500 */
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#define IOMD_IRQMSKD (IOMD_BASE + 0x00000078) /* ARM7500 */
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#define IOMD_IRQSTD 0x0000001c /* ARM7500 */
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#define IOMD_IRQRQD 0x0000001d /* ARM7500 */
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#define IOMD_IRQMSKD 0x0000001e /* ARM7500 */
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#define IOMD_ROMCR0 (IOMD_BASE + 0x00000080)
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#define IOMD_ROMCR1 (IOMD_BASE + 0x00000084)
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#define IOMD_ROMCR0 0x00000020
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#define IOMD_ROMCR1 0x00000021
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#ifndef CPU_ARM7500
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#define IOMD_DRAMCR (IOMD_BASE + 0x00000088)
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#define IOMD_VREFCR (IOMD_BASE + 0x0000008c)
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#else
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#define IOMD_REFCR (IOMD_BASE + 0x0000008c) /* ARM7500 */
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#endif /* !CPU_ARM7500 */
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#define IOMD_DRAMCR 0x00000022 /* !ARM7500 */
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#define IOMD_VREFCR 0x00000023 /* !ARM7500 */
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#define IOMD_REFCR 0x00000023 /* ARM7500 */
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#define IOMD_FSIZE (IOMD_BASE + 0x00000090)
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#define IOMD_ID0 (IOMD_BASE + 0x00000094)
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#define IOMD_ID1 (IOMD_BASE + 0x00000098)
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#define IOMD_VERSION (IOMD_BASE + 0x0000009c)
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#define IOMD_FSIZE 0x00000024
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#define IOMD_ID0 0x00000025
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#define IOMD_ID1 0x00000026
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#define IOMD_VERSION 0x00000027
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#define IOMD_MOUSEX (IOMD_BASE + 0x000000a0)
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#define IOMD_MOUSEY (IOMD_BASE + 0x000000a4)
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#define IOMD_MOUSEX 0x00000028
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#define IOMD_MOUSEY 0x00000029
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#define IOMD_MSDATA (IOMD_BASE + 0x000000a8) /* ARM7500 */
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#define IOMD_MSCR (IOMD_BASE + 0x000000ac) /* ARM7500 */
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#define IOMD_MSDATA 0x000000a8 /* ARM7500 */
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#define IOMD_MSCR 0x000000ac /* ARM7500 */
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#define IOMD_DMATCR (IOMD_BASE + 0x000000c0)
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#define IOMD_IOTCR (IOMD_BASE + 0x000000c4)
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#define IOMD_ECTCR (IOMD_BASE + 0x000000c8)
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#ifndef CPU_ARM7500
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#define IOMD_DMAEXT (IOMD_BASE + 0x000000cc)
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#else
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#define IOMD_ASTCR (IOMD_BASE + 0x000000cc) /* ARM7500 */
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#endif
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#define IOMD_DMATCR 0x00000030
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#define IOMD_IOTCR 0x00000031
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#define IOMD_ECTCR 0x00000032
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#define IOMD_DMAEXT 0x00000033 /* !ARM7500 */
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#define IOMD_ASTCR 0x00000033 /* ARM7500 */
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#define IOMD_DRAMWID (IOMD_BASE + 0x000000d0) /* ARM7500 */
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#define IOMD_SELFREF (IOMD_BASE + 0x000000d4) /* ARM7500 */
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#define IOMD_DRAMWID 0x00000034 /* ARM7500 */
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#define IOMD_SELFREF 0x00000035 /* ARM7500 */
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#define IOMD_ATODICR (IOMD_BASE + 0x000000e0) /* ARM7500 */
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#define IOMD_ATODSR (IOMD_BASE + 0x000000e4) /* ARM7500 */
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#define IOMD_ATODCR (IOMD_BASE + 0x000000e8) /* ARM7500 */
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#define IOMD_ATODCNT1 (IOMD_BASE + 0x000000ec) /* ARM7500 */
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#define IOMD_ATODCNT2 (IOMD_BASE + 0x000000f0) /* ARM7500 */
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#define IOMD_ATODCNT3 (IOMD_BASE + 0x000000f4) /* ARM7500 */
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#define IOMD_ATODCNT4 (IOMD_BASE + 0x000000f8) /* ARM7500 */
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#define IOMD_ATODICR 0x00000038 /* ARM7500 */
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#define IOMD_ATODSR 0x00000039 /* ARM7500 */
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#define IOMD_ATODCR 0x0000003a /* ARM7500 */
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#define IOMD_ATODCNT1 0x0000003b /* ARM7500 */
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#define IOMD_ATODCNT2 0x0000003c /* ARM7500 */
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#define IOMD_ATODCNT3 0x0000003d /* ARM7500 */
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#define IOMD_ATODCNT4 0x0000003e /* ARM7500 */
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#define IOMD_IO0CURA (IOMD_BASE + 0x00000100)
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#define IOMD_IO0ENDA (IOMD_BASE + 0x00000104)
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#define IOMD_IO0CURB (IOMD_BASE + 0x00000108)
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#define IOMD_IO0ENDB (IOMD_BASE + 0x0000010c)
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#define IOMD_IO0CR (IOMD_BASE + 0x00000110)
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#define IOMD_IO0ST (IOMD_BASE + 0x00000114)
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#define IOMD_IO1CURA (IOMD_BASE + 0x00000120)
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#define IOMD_IO1ENDA (IOMD_BASE + 0x00000124)
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#define IOMD_IO1CURB (IOMD_BASE + 0x00000128)
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#define IOMD_IO1ENDB (IOMD_BASE + 0x0000012c)
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#define IOMD_IO1CR (IOMD_BASE + 0x00000130)
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#define IOMD_IO1ST (IOMD_BASE + 0x00000134)
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#define IOMD_IO2CURA (IOMD_BASE + 0x00000140)
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#define IOMD_IO2ENDA (IOMD_BASE + 0x00000144)
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#define IOMD_IO2CURB (IOMD_BASE + 0x00000148)
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#define IOMD_IO2ENDB (IOMD_BASE + 0x0000014c)
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#define IOMD_IO2CR (IOMD_BASE + 0x00000150)
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#define IOMD_IO2ST (IOMD_BASE + 0x00000154)
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#define IOMD_IO3CURA (IOMD_BASE + 0x00000160)
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#define IOMD_IO3ENDA (IOMD_BASE + 0x00000164)
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#define IOMD_IO3CURB (IOMD_BASE + 0x00000168)
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#define IOMD_IO3ENDB (IOMD_BASE + 0x0000016c)
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#define IOMD_IO3CR (IOMD_BASE + 0x00000170)
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#define IOMD_IO3ST (IOMD_BASE + 0x00000174)
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#define IOMD_DMA_SIZE 24
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#define IOMD_DMA_SPACING 32
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#define IOMD_IO0CURA 0x00000040
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#define IOMD_IO0ENDA 0x00000041
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#define IOMD_IO0CURB 0x00000042
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#define IOMD_IO0ENDB 0x00000043
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#define IOMD_IO0CR 0x00000044
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#define IOMD_IO0ST 0x00000045
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#define IOMD_IO1CURA 0x00000048
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#define IOMD_IO1ENDA 0x00000049
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#define IOMD_IO1CURB 0x0000004a
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#define IOMD_IO1ENDB 0x0000004b
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#define IOMD_IO1CR 0x0000004c
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#define IOMD_IO1ST 0x0000004d
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#define IOMD_IO2CURA 0x00000050
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#define IOMD_IO2ENDA 0x00000051
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#define IOMD_IO2CURB 0x00000052
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#define IOMD_IO2ENDB 0x00000053
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#define IOMD_IO2CR 0x00000054
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#define IOMD_IO2ST 0x00000055
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#define IOMD_IO3CURA 0x00000058
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#define IOMD_IO3ENDA 0x00000059
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#define IOMD_IO3CURB 0x0000005a
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#define IOMD_IO3ENDB 0x0000005b
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#define IOMD_IO3CR 0x0000005c
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#define IOMD_IO3ST 0x0000005d
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#define IOMD_SD0CURA (IOMD_BASE + 0x00000180)
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#define IOMD_SD0ENDA (IOMD_BASE + 0x00000184)
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#define IOMD_SD0CURB (IOMD_BASE + 0x00000188)
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#define IOMD_SD0ENDB (IOMD_BASE + 0x0000018c)
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#define IOMD_SD0CR (IOMD_BASE + 0x00000190)
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#define IOMD_SD0ST (IOMD_BASE + 0x00000194)
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#define IOMD_SD0CURA 0x00000060
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#define IOMD_SD0ENDA 0x00000061
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#define IOMD_SD0CURB 0x00000062
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#define IOMD_SD0ENDB 0x00000063
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#define IOMD_SD0CR 0x00000064
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#define IOMD_SD0ST 0x00000065
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#define IOMD_SD1CURA (IOMD_BASE + 0x000001a0)
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#define IOMD_SD1ENDA (IOMD_BASE + 0x000001a4)
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#define IOMD_SD1CURB (IOMD_BASE + 0x000001a8)
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#define IOMD_SD1ENDB (IOMD_BASE + 0x000001ac)
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#define IOMD_SD1CR (IOMD_BASE + 0x000001b0)
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#define IOMD_SD1ST (IOMD_BASE + 0x000001b4)
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#define IOMD_SD1CURA 0x00000068
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#define IOMD_SD1ENDA 0x00000069
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#define IOMD_SD1CURB 0x0000006a
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#define IOMD_SD1ENDB 0x0000006b
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#define IOMD_SD1CR 0x0000006c
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#define IOMD_SD1ST 0x0000006d
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#define IOMD_CURSCUR (IOMD_BASE + 0x000001c0)
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#define IOMD_CURSINIT (IOMD_BASE + 0x000001c4)
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#define IOMD_CURSCUR 0x00000070
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#define IOMD_CURSINIT 0x00000071
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#define IOMD_VIDCUR (IOMD_BASE + 0x000001d0)
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#define IOMD_VIDEND (IOMD_BASE + 0x000001d4)
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#define IOMD_VIDSTART (IOMD_BASE + 0x000001d8)
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#define IOMD_VIDINIT (IOMD_BASE + 0x000001dc)
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#define IOMD_VIDCR (IOMD_BASE + 0x000001e0)
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#define IOMD_VIDCUR 0x00000074
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#define IOMD_VIDEND 0x00000075
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#define IOMD_VIDSTART 0x00000076
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#define IOMD_VIDINIT 0x00000077
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#define IOMD_VIDCR 0x00000078
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#define IOMD_DMAST (IOMD_BASE + 0x000001f0)
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#define IOMD_DMARQ (IOMD_BASE + 0x000001f4)
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#define IOMD_DMAMSK (IOMD_BASE + 0x000001f8)
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#define IOMD_DMAST 0x0000007c
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#define IOMD_DMARQ 0x0000007d
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#define IOMD_DMAMSK 0x0000007e
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#define IOMD_SIZE 0x100 /* XXX - should be words ? */
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/*
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* Ok these mouse buttons are not strickly part of the iomd but
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@ -200,9 +198,20 @@
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#define FREQCON (IOMD_BASE + 0x40000)
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#define RPC600_IOMD_ID 0xd4e7
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#define ARM7500_IOC_ID 0x5b98
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#define RPC600_IOMD_ID 0xd4e7
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#define ARM7500_IOC_ID 0x5b98
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#define ARM7500FE_IOC_ID 0xaa7c
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#define IOMD_ID (ReadByte(IOMD_ID0) | (ReadByte(IOMD_ID1) << 8))
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#define IOMD_ADDRESS(reg) (IOMD_BASE + (reg << 2))
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#define IOMD_WRITE_BYTE(reg, val) \
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WriteByte(IOMD_ADDRESS(reg), val)
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#define IOMD_WRITE_WORD(reg, val) \
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WriteWord(IOMD_ADDRESS(reg), val)
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#define IOMD_READ_BYTE(reg) \
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ReadByte(IOMD_ADDRESS(reg))
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#define IOMD_READ_WORD(reg) \
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ReadWord(IOMD_ADDRESS(reg))
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/* End of iomd.h */
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#define IOMD_ID (IOMD_READ_BYTE(IOMD_ID0) | (IOMD_READ_BYTE(IOMD_ID1) << 8))
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/* End of iomdreg.h */
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