diff --git a/sys/arch/arm32/iomd/iomdreg.h b/sys/arch/arm32/iomd/iomdreg.h index a1a36c56e6a1..bb132e49db54 100644 --- a/sys/arch/arm32/iomd/iomdreg.h +++ b/sys/arch/arm32/iomd/iomdreg.h @@ -1,7 +1,7 @@ -/* $NetBSD: iomdreg.h,v 1.7 1996/11/23 03:21:43 mark Exp $ */ +/* $NetBSD: iomdreg.h,v 1.8 1997/10/14 11:08:45 mark Exp $ */ /* - * Copyright (c) 1994 Mark Brinicombe. + * Copyright (c) 1994-1997 Mark Brinicombe. * Copyright (c) 1994 Brini. * All rights reserved. * @@ -17,7 +17,7 @@ * documentation and/or other materials provided with the distribution. * 3. All advertising materials mentioning features or use of this software * must display the following acknowledgement: - * This product includes software developed by Brini. + * This product includes software developed by Mark Brinicombe. * 4. The name of the company nor the name of the author may be used to * endorse or promote products derived from this software without specific * prior written permission. @@ -49,142 +49,140 @@ #define IOMD_BASE 0xf6000000 -#define IOMD_IOCR (IOMD_BASE + 0x00000000) -#define IOMD_KBDDAT (IOMD_BASE + 0x00000004) -#define IOMD_KBDCR (IOMD_BASE + 0x00000008) +#define IOMD_IOCR 0x00000000 +#define IOMD_KBDDAT 0x00000001 +#define IOMD_KBDCR 0x00000002 -#define IOMD_IRQSTA (IOMD_BASE + 0x00000010) -#define IOMD_IRQRQA (IOMD_BASE + 0x00000014) -#define IOMD_IRQMSKA (IOMD_BASE + 0x00000018) -#define IOMD_SUSPEND (IOMD_BASE + 0x0000001C) /* ARM7500 */ +#define IOMD_IRQSTA 0x00000004 +#define IOMD_IRQRQA 0x00000005 +#define IOMD_IRQMSKA 0x00000006 +#define IOMD_SUSPEND 0x00000007 /* ARM7500 */ -#define IOMD_IRQSTB (IOMD_BASE + 0x00000020) -#define IOMD_IRQRQB (IOMD_BASE + 0x00000024) -#define IOMD_IRQMSKB (IOMD_BASE + 0x00000028) +#define IOMD_IRQSTB 0x00000008 +#define IOMD_IRQRQB 0x00000009 +#define IOMD_IRQMSKB 0x0000000a -#define IOMD_STOP (IOMD_BASE + 0x0000002C) /* ARM7500 */ +#define IOMD_STOP 0x0000000b /* ARM7500 */ -#define IOMD_FIQST (IOMD_BASE + 0x00000030) -#define IOMD_FIQRQ (IOMD_BASE + 0x00000034) -#define IOMD_FIQMSK (IOMD_BASE + 0x00000038) +#define IOMD_FIQST 0x0000000c +#define IOMD_FIQRQ 0x0000000d +#define IOMD_FIQMSK 0x0000000e -#define IOMD_CLKCTL (IOMD_BASE + 0x0000003C) /* ARM7500 */ +#define IOMD_CLKCTL 0x0000000f /* ARM7500 */ -#define IOMD_T0LOW (IOMD_BASE + 0x00000040) -#define IOMD_T0HIGH (IOMD_BASE + 0x00000044) -#define IOMD_T0GO (IOMD_BASE + 0x00000048) -#define IOMD_T0LATCH (IOMD_BASE + 0x0000004c) +#define IOMD_T0LOW 0x00000010 +#define IOMD_T0HIGH 0x00000011 +#define IOMD_T0GO 0x00000012 +#define IOMD_T0LATCH 0x00000013 -#define IOMD_T1LOW (IOMD_BASE + 0x00000050) -#define IOMD_T1HIGH (IOMD_BASE + 0x00000054) -#define IOMD_T1GO (IOMD_BASE + 0x00000058) -#define IOMD_T1LATCH (IOMD_BASE + 0x0000005c) +#define IOMD_T1LOW 0x00000014 +#define IOMD_T1HIGH 0x00000015 +#define IOMD_T1GO 0x00000016 +#define IOMD_T1LATCH 0x00000017 /* * For ARM7500, it's not really a IOMD device. */ -#define IOMD_IRQSTC (IOMD_BASE + 0x00000060) /* ARM7500 */ -#define IOMD_IRQRQC (IOMD_BASE + 0x00000064) /* ARM7500 */ -#define IOMD_IRQMSKC (IOMD_BASE + 0x00000068) /* ARM7500 */ -#define IOMD_VIDMUX (IOMD_BASE + 0x0000006C) /* ARM7500 */ +#define IOMD_IRQSTC 0x00000018 /* ARM7500 */ +#define IOMD_IRQRQC 0x00000019 /* ARM7500 */ +#define IOMD_IRQMSKC 0x0000001a /* ARM7500 */ +#define IOMD_VIDMUX 0x0000001b /* ARM7500 */ -#define IOMD_IRQSTD (IOMD_BASE + 0x00000070) /* ARM7500 */ -#define IOMD_IRQRQD (IOMD_BASE + 0x00000074) /* ARM7500 */ -#define IOMD_IRQMSKD (IOMD_BASE + 0x00000078) /* ARM7500 */ +#define IOMD_IRQSTD 0x0000001c /* ARM7500 */ +#define IOMD_IRQRQD 0x0000001d /* ARM7500 */ +#define IOMD_IRQMSKD 0x0000001e /* ARM7500 */ -#define IOMD_ROMCR0 (IOMD_BASE + 0x00000080) -#define IOMD_ROMCR1 (IOMD_BASE + 0x00000084) +#define IOMD_ROMCR0 0x00000020 +#define IOMD_ROMCR1 0x00000021 -#ifndef CPU_ARM7500 -#define IOMD_DRAMCR (IOMD_BASE + 0x00000088) -#define IOMD_VREFCR (IOMD_BASE + 0x0000008c) -#else -#define IOMD_REFCR (IOMD_BASE + 0x0000008c) /* ARM7500 */ -#endif /* !CPU_ARM7500 */ +#define IOMD_DRAMCR 0x00000022 /* !ARM7500 */ +#define IOMD_VREFCR 0x00000023 /* !ARM7500 */ +#define IOMD_REFCR 0x00000023 /* ARM7500 */ -#define IOMD_FSIZE (IOMD_BASE + 0x00000090) -#define IOMD_ID0 (IOMD_BASE + 0x00000094) -#define IOMD_ID1 (IOMD_BASE + 0x00000098) -#define IOMD_VERSION (IOMD_BASE + 0x0000009c) +#define IOMD_FSIZE 0x00000024 +#define IOMD_ID0 0x00000025 +#define IOMD_ID1 0x00000026 +#define IOMD_VERSION 0x00000027 -#define IOMD_MOUSEX (IOMD_BASE + 0x000000a0) -#define IOMD_MOUSEY (IOMD_BASE + 0x000000a4) +#define IOMD_MOUSEX 0x00000028 +#define IOMD_MOUSEY 0x00000029 -#define IOMD_MSDATA (IOMD_BASE + 0x000000a8) /* ARM7500 */ -#define IOMD_MSCR (IOMD_BASE + 0x000000ac) /* ARM7500 */ +#define IOMD_MSDATA 0x000000a8 /* ARM7500 */ +#define IOMD_MSCR 0x000000ac /* ARM7500 */ -#define IOMD_DMATCR (IOMD_BASE + 0x000000c0) -#define IOMD_IOTCR (IOMD_BASE + 0x000000c4) -#define IOMD_ECTCR (IOMD_BASE + 0x000000c8) -#ifndef CPU_ARM7500 -#define IOMD_DMAEXT (IOMD_BASE + 0x000000cc) -#else -#define IOMD_ASTCR (IOMD_BASE + 0x000000cc) /* ARM7500 */ -#endif +#define IOMD_DMATCR 0x00000030 +#define IOMD_IOTCR 0x00000031 +#define IOMD_ECTCR 0x00000032 +#define IOMD_DMAEXT 0x00000033 /* !ARM7500 */ +#define IOMD_ASTCR 0x00000033 /* ARM7500 */ -#define IOMD_DRAMWID (IOMD_BASE + 0x000000d0) /* ARM7500 */ -#define IOMD_SELFREF (IOMD_BASE + 0x000000d4) /* ARM7500 */ +#define IOMD_DRAMWID 0x00000034 /* ARM7500 */ +#define IOMD_SELFREF 0x00000035 /* ARM7500 */ -#define IOMD_ATODICR (IOMD_BASE + 0x000000e0) /* ARM7500 */ -#define IOMD_ATODSR (IOMD_BASE + 0x000000e4) /* ARM7500 */ -#define IOMD_ATODCR (IOMD_BASE + 0x000000e8) /* ARM7500 */ -#define IOMD_ATODCNT1 (IOMD_BASE + 0x000000ec) /* ARM7500 */ -#define IOMD_ATODCNT2 (IOMD_BASE + 0x000000f0) /* ARM7500 */ -#define IOMD_ATODCNT3 (IOMD_BASE + 0x000000f4) /* ARM7500 */ -#define IOMD_ATODCNT4 (IOMD_BASE + 0x000000f8) /* ARM7500 */ +#define IOMD_ATODICR 0x00000038 /* ARM7500 */ +#define IOMD_ATODSR 0x00000039 /* ARM7500 */ +#define IOMD_ATODCR 0x0000003a /* ARM7500 */ +#define IOMD_ATODCNT1 0x0000003b /* ARM7500 */ +#define IOMD_ATODCNT2 0x0000003c /* ARM7500 */ +#define IOMD_ATODCNT3 0x0000003d /* ARM7500 */ +#define IOMD_ATODCNT4 0x0000003e /* ARM7500 */ -#define IOMD_IO0CURA (IOMD_BASE + 0x00000100) -#define IOMD_IO0ENDA (IOMD_BASE + 0x00000104) -#define IOMD_IO0CURB (IOMD_BASE + 0x00000108) -#define IOMD_IO0ENDB (IOMD_BASE + 0x0000010c) -#define IOMD_IO0CR (IOMD_BASE + 0x00000110) -#define IOMD_IO0ST (IOMD_BASE + 0x00000114) -#define IOMD_IO1CURA (IOMD_BASE + 0x00000120) -#define IOMD_IO1ENDA (IOMD_BASE + 0x00000124) -#define IOMD_IO1CURB (IOMD_BASE + 0x00000128) -#define IOMD_IO1ENDB (IOMD_BASE + 0x0000012c) -#define IOMD_IO1CR (IOMD_BASE + 0x00000130) -#define IOMD_IO1ST (IOMD_BASE + 0x00000134) -#define IOMD_IO2CURA (IOMD_BASE + 0x00000140) -#define IOMD_IO2ENDA (IOMD_BASE + 0x00000144) -#define IOMD_IO2CURB (IOMD_BASE + 0x00000148) -#define IOMD_IO2ENDB (IOMD_BASE + 0x0000014c) -#define IOMD_IO2CR (IOMD_BASE + 0x00000150) -#define IOMD_IO2ST (IOMD_BASE + 0x00000154) -#define IOMD_IO3CURA (IOMD_BASE + 0x00000160) -#define IOMD_IO3ENDA (IOMD_BASE + 0x00000164) -#define IOMD_IO3CURB (IOMD_BASE + 0x00000168) -#define IOMD_IO3ENDB (IOMD_BASE + 0x0000016c) -#define IOMD_IO3CR (IOMD_BASE + 0x00000170) -#define IOMD_IO3ST (IOMD_BASE + 0x00000174) +#define IOMD_DMA_SIZE 24 +#define IOMD_DMA_SPACING 32 +#define IOMD_IO0CURA 0x00000040 +#define IOMD_IO0ENDA 0x00000041 +#define IOMD_IO0CURB 0x00000042 +#define IOMD_IO0ENDB 0x00000043 +#define IOMD_IO0CR 0x00000044 +#define IOMD_IO0ST 0x00000045 +#define IOMD_IO1CURA 0x00000048 +#define IOMD_IO1ENDA 0x00000049 +#define IOMD_IO1CURB 0x0000004a +#define IOMD_IO1ENDB 0x0000004b +#define IOMD_IO1CR 0x0000004c +#define IOMD_IO1ST 0x0000004d +#define IOMD_IO2CURA 0x00000050 +#define IOMD_IO2ENDA 0x00000051 +#define IOMD_IO2CURB 0x00000052 +#define IOMD_IO2ENDB 0x00000053 +#define IOMD_IO2CR 0x00000054 +#define IOMD_IO2ST 0x00000055 +#define IOMD_IO3CURA 0x00000058 +#define IOMD_IO3ENDA 0x00000059 +#define IOMD_IO3CURB 0x0000005a +#define IOMD_IO3ENDB 0x0000005b +#define IOMD_IO3CR 0x0000005c +#define IOMD_IO3ST 0x0000005d -#define IOMD_SD0CURA (IOMD_BASE + 0x00000180) -#define IOMD_SD0ENDA (IOMD_BASE + 0x00000184) -#define IOMD_SD0CURB (IOMD_BASE + 0x00000188) -#define IOMD_SD0ENDB (IOMD_BASE + 0x0000018c) -#define IOMD_SD0CR (IOMD_BASE + 0x00000190) -#define IOMD_SD0ST (IOMD_BASE + 0x00000194) +#define IOMD_SD0CURA 0x00000060 +#define IOMD_SD0ENDA 0x00000061 +#define IOMD_SD0CURB 0x00000062 +#define IOMD_SD0ENDB 0x00000063 +#define IOMD_SD0CR 0x00000064 +#define IOMD_SD0ST 0x00000065 -#define IOMD_SD1CURA (IOMD_BASE + 0x000001a0) -#define IOMD_SD1ENDA (IOMD_BASE + 0x000001a4) -#define IOMD_SD1CURB (IOMD_BASE + 0x000001a8) -#define IOMD_SD1ENDB (IOMD_BASE + 0x000001ac) -#define IOMD_SD1CR (IOMD_BASE + 0x000001b0) -#define IOMD_SD1ST (IOMD_BASE + 0x000001b4) +#define IOMD_SD1CURA 0x00000068 +#define IOMD_SD1ENDA 0x00000069 +#define IOMD_SD1CURB 0x0000006a +#define IOMD_SD1ENDB 0x0000006b +#define IOMD_SD1CR 0x0000006c +#define IOMD_SD1ST 0x0000006d -#define IOMD_CURSCUR (IOMD_BASE + 0x000001c0) -#define IOMD_CURSINIT (IOMD_BASE + 0x000001c4) +#define IOMD_CURSCUR 0x00000070 +#define IOMD_CURSINIT 0x00000071 -#define IOMD_VIDCUR (IOMD_BASE + 0x000001d0) -#define IOMD_VIDEND (IOMD_BASE + 0x000001d4) -#define IOMD_VIDSTART (IOMD_BASE + 0x000001d8) -#define IOMD_VIDINIT (IOMD_BASE + 0x000001dc) -#define IOMD_VIDCR (IOMD_BASE + 0x000001e0) +#define IOMD_VIDCUR 0x00000074 +#define IOMD_VIDEND 0x00000075 +#define IOMD_VIDSTART 0x00000076 +#define IOMD_VIDINIT 0x00000077 +#define IOMD_VIDCR 0x00000078 -#define IOMD_DMAST (IOMD_BASE + 0x000001f0) -#define IOMD_DMARQ (IOMD_BASE + 0x000001f4) -#define IOMD_DMAMSK (IOMD_BASE + 0x000001f8) +#define IOMD_DMAST 0x0000007c +#define IOMD_DMARQ 0x0000007d +#define IOMD_DMAMSK 0x0000007e + +#define IOMD_SIZE 0x100 /* XXX - should be words ? */ /* * Ok these mouse buttons are not strickly part of the iomd but @@ -200,9 +198,20 @@ #define FREQCON (IOMD_BASE + 0x40000) -#define RPC600_IOMD_ID 0xd4e7 -#define ARM7500_IOC_ID 0x5b98 +#define RPC600_IOMD_ID 0xd4e7 +#define ARM7500_IOC_ID 0x5b98 +#define ARM7500FE_IOC_ID 0xaa7c -#define IOMD_ID (ReadByte(IOMD_ID0) | (ReadByte(IOMD_ID1) << 8)) +#define IOMD_ADDRESS(reg) (IOMD_BASE + (reg << 2)) +#define IOMD_WRITE_BYTE(reg, val) \ + WriteByte(IOMD_ADDRESS(reg), val) +#define IOMD_WRITE_WORD(reg, val) \ + WriteWord(IOMD_ADDRESS(reg), val) +#define IOMD_READ_BYTE(reg) \ + ReadByte(IOMD_ADDRESS(reg)) +#define IOMD_READ_WORD(reg) \ + ReadWord(IOMD_ADDRESS(reg)) -/* End of iomd.h */ +#define IOMD_ID (IOMD_READ_BYTE(IOMD_ID0) | (IOMD_READ_BYTE(IOMD_ID1) << 8)) + +/* End of iomdreg.h */