bus_space(9), if drivers want it (they shouldn't; easy to convert) they
can define it right before including bus.h. There's been a release since
the interfaces were (slightly) changed, and no code in the source tree
uses the old interfaces as far as I can tell.
the former, but not the latter. Hopefully, this will address some problems
people have been experiencing w/ some devices on Pyxis systems when BWX
is used for bus access. (If it's not used for PCI config access, we can
get fatal machine checks while probing behind PCI-PCI bridges!!)
tty structures, and on some machines (namely the DraCo internal lpt, and some
multi-i/o boards for Amigas and DraCos), tying spltty to the pretty high printer
interupt level would hurt serial performance.
On all affected ports but Amiga, spllpt() has been defined in machine/intr.h
to be spltty(), thus preserving old behaviour. Portmasters are encouraged to
change is, if they feel something else is better (e.g., one of its own were
possible).
the recent bug where Multias around the world have been aborting back to
SRM with no message at all as they tried to attach a TGA or VGA console,
because the old mchkinfo pointer wasn't allocated prior to use.
And contrary to widespread rumour, this bug has nothing to do with my
LCA IDE mod...that worked just fine. "Not guilty."
a linear 0..N mapping out of alpha_cpu_whami - which is what I was
using to index the new cpu machine check array. This is a quick hack
back to just using the first element while I think of a kinder function
that will do the function (per-platform) of whami->VIRTUAL CPU ID, which
if you think about it, is really necessary anyway.
use by an error handler:
* There can be only one TurboLaser, and we'll overload it
* with a bitmap of found turbo laser nodes. Note that
* these are just the actual hard TL node IDS that we
* discover here, not the virtual IDs that get assigned
* to CPUs. During TLSB specific error handling we
* only need to know which actual TLSB slots have boards
* in them (irrespective of how many CPUs they have).
into the integer tlsb_found a bit map of found nodes and export
it to the rest of the kernel. This is so that at machine check
time when we're doing some TLSB/KFTXX error handling we don't
have to attempt a badaddr to look at all TLSB nodes (which will
just be too sad to try...).
is not really needed for this platform, except that we might want to
handle PCI errors which get reported through here. In any case, this
prints out more info than is usual. Will probably need to detune
this to be based upon DIAGNOSTIC defines.
DEC_1000
DEC_1000A
DEC_ALPHABOOK1
DEC_EB66
Remove support (ran out of space) for: ahc and bha. SCSI must be ncr or isp.
This will be fixed soon by defining an optional, two-floppy install
alternative.
before it can be useful, and [B] #ifdefs do not belong at every call site,
a common API should be defined and the implementations conditionalized, not
the calls. Duhh.
Also, remove the initial XXX mystery_icu debugging code.
Like the 1000A, the AlphaServer 1000 has a daughtercard assembly that
integrates the CPU and core logic, so these can be ev4/apecs or ev5/cia.
New systype, and, sigh, another way of doing interrupts and another
mystery icu.
Kill off some EVCNT_COUNTERS calls, since [A] it has to be rewritten anyway
before it can be useful, and [B] #ifdefs do not belong at every call site,
a common API should be defined and the implementations conditionalized, not
all the calls. Duhh.
AXPpci33 machines + power management and a Cirrus PCI-PCMCIA controller.
There is currently no support for the power management facilities, and
the PCI-PCMCIA controller driver needs some work, but this should boot
and run from disk.
In this case, all it has in it are the never-referenced printable names
for the ELF sections themselves. It's located at the end of the (ramdisk)
netbsd.gz file, so it is a very expensive seek and read for only 85 bytes.
Boot floppy load time:
before: 5 minutes
now: 3 minutes
the iot, memt, and pc in the call so that pci_1000a_pickintr() (and the
other routines in that module) do not need to be aware of the core logic
type just to pass down memory and I/O space tags or to call the decompose
function.
New macros:
LOCATE_PCS(struct rpb *hwrpb, int cpu_number)
PCS_PROC_MAJORTYPE(struct pcs *)
PCS_PROC_MINORTYPE(struct pcs *)
Define LOCATE_PCS() to map (hwrpb, cpu_number) -> Per-Cpu-Slot structure.
Replace the PCS_PROC_{MAJOR,MINOR}{,SHIFT} stuff with macros that simply
return the major and minor cpu type codes.
address on 2 architectures anyhow. Also, move the definition of the `label_t'
type inside _KERNEL protection, since it is specific to the in-kernel
setjmp()/longjmp() implementations.
as with user-land programs, include files are installed by each directory
in the tree that has includes to install. (This allows more flexibility
as to what gets installed, makes 'partial installs' easier, and gives us
more options as to which machines' includes get installed at any given
time.) The old SYS_INCLUDES={symlinks,copies} behaviours are _both_
still supported, though at least one bug in the 'symlinks' case is
fixed by this change. Include files can't be build before installation,
so directories that have includes as targets (e.g. dev/pci) have to move
those targets into a different Makefile.
a struct device * corresponding to the ISA bus device. The ISA DMA
controller driver functions have been renamed and now take a struct
isa_dma_state *, and are called indirectly by machine-dependent code
which provides the DMA state.
These changes allow e.g. `ofisa' (the OpenFirmware configuration
mechanism for the ISA bus, used by e.g. Sharks) to use the MI ISA
DMA controller code.
is defined, the bus_space macros will check to ensure that the bus address
and the target buffer (if applicable) are aligned properly for the size
of the type being used. If they are not, a message will be displayed on
the console.
Strict alignment is required by the Alpha architecture, and a trap will
occur of unaligned access is performed. These changes will aid debugging
of broken device drivers.
Use the check recommended by the Digital Workstation engineers; look
for Miata 1 systems (i.e. with Intel SIO). From Andrew Gallatin.
- Update copyright (Pyxis and BWX).
device 4. Miata 1.5 and Miata 2 have a Cypress at device 7 and PCI IDE
at functions 1 and 2 of the Cypress (like the PC164SX). These on-board
PCI IDE controllers are wired to compatibility mode, so don't bother
trying to map the interrupt.
on the ALCOR2 and Pyxis. BWX is enabled iff:
- It hasn't been disabled by the user (patch `cia_use_bwx' or build cia.o
with the option "CIA_USE_BWX=0"),
- it's enabled in CIA_CSR_CNFG,
- we are running on an EV5-family processor,
- BWX is in the processor's capabilities mask.
the scatter/gather TLB cannot be invalidated on these chips. So, to
work around this, we configure the otherwise unsed DMA Window 2 as a
2M SGMAP window at 128M, point all of its page table entries at the
DMA spill page, and, when the TLB is to be invalidated, put the PCI bus
into loopback mode, and create a target hit on Window 2 every 64k for
the number of TLB entries (plus a few ... it seems to not work unless
we read a few extra times), forcing out old TLB entries to make room for
the new, dummy target hits.
day.
- Convert to use bus_dma.
- Fix cleaning up unaligned start address.
- Correctly determine if the device supports Fast SCSI, and adjust the
minimum sync period accordingly.
- Compute minimum sync period correctly on the 25MHz devices.
- Use GPI2 to determine if we're a 25MHz or 40MHz device.
- Currectly determine SCSI ID and "fast mode enabled" for the built-in
TCDS on DEC 3000 models, using cached information from the PROM environment.
the namespace accordingly.
- Set FCLK in the CFG3 register if we have a > 25MHz clock.
- Indicate that we support Fast mode to the back-end if we're told we're
fast by the TCDS layer.
- Correctly compute the minimum sync period.
pk