Change the "vm_offset_t"s to "u_long"s for now; eventually, we can make
them vaddr_t and paddr_t, as appropriate (after scouring the RPB docs to know which are phys and virt addresses).
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thorpej
parent
5cb492b751
commit
97e83f6e0b
@ -1,4 +1,4 @@
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/* $NetBSD: rpb.h,v 1.25 1998/06/26 21:55:38 ross Exp $ */
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/* $NetBSD: rpb.h,v 1.26 1998/08/14 16:46:09 thorpej Exp $ */
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/*
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* Copyright (c) 1994, 1995, 1996 Carnegie-Mellon University.
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@ -175,19 +175,19 @@ struct rpb {
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char rpb_revision[8]; /* 60; only first 4 valid */
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u_int64_t rpb_intr_freq; /* 68; scaled by 4096 */
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u_int64_t rpb_cc_freq; /* 70: cycle cntr frequency */
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vm_offset_t rpb_vptb; /* 78: */
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u_long rpb_vptb; /* 78: */
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u_int64_t rpb_reserved_arch; /* 80: */
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vm_offset_t rpb_tbhint_off; /* 88: */
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u_long rpb_tbhint_off; /* 88: */
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u_int64_t rpb_pcs_cnt; /* 90: */
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u_int64_t rpb_pcs_size; /* 98; pcs size in bytes */
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vm_offset_t rpb_pcs_off; /* A0: offset to pcs info */
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u_long rpb_pcs_off; /* A0: offset to pcs info */
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u_int64_t rpb_ctb_cnt; /* A8: console terminal */
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u_int64_t rpb_ctb_size; /* B0: ctb size in bytes */
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vm_offset_t rpb_ctb_off; /* B8: offset to ctb */
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vm_offset_t rpb_crb_off; /* C0: offset to crb */
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vm_offset_t rpb_memdat_off; /* C8: memory data offset */
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vm_offset_t rpb_condat_off; /* D0: config data offset */
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vm_offset_t rpb_fru_off; /* D8: FRU table offset */
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u_long rpb_ctb_off; /* B8: offset to ctb */
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u_long rpb_crb_off; /* C0: offset to crb */
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u_long rpb_memdat_off; /* C8: memory data offset */
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u_long rpb_condat_off; /* D0: config data offset */
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u_long rpb_fru_off; /* D8: FRU table offset */
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u_int64_t rpb_save_term; /* E0: terminal save */
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u_int64_t rpb_save_term_val; /* E8: */
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u_int64_t rpb_rest_term; /* F0: terminal restore */
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@ -199,7 +199,7 @@ struct rpb {
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u_int64_t rpb_checksum; /* 120: HWRPB checksum */
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u_int64_t rpb_rxrdy; /* 128: receive ready */
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u_int64_t rpb_txrdy; /* 130: transmit ready */
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vm_offset_t rpb_dsrdb_off; /* 138: HWRPB + DSRDB offset */
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u_long rpb_dsrdb_off; /* 138: HWRPB + DSRDB offset */
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u_int64_t rpb_tbhint[8]; /* 149: TB hint block */
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};
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@ -233,8 +233,8 @@ struct pcs {
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u_int64_t pcs_pal_memsize; /* 88: PAL memory size */
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u_int64_t pcs_pal_scrsize; /* 90: PAL scratch size */
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vm_offset_t pcs_pal_memaddr; /* 98: PAL memory addr */
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vm_offset_t pcs_pal_scraddr; /* A0: PAL scratch addr */
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u_long pcs_pal_memaddr; /* 98: PAL memory addr */
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u_long pcs_pal_scraddr; /* A0: PAL scratch addr */
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struct {
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u_int64_t
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minorrev : 8, /* alphabetic char 'a' - 'z' */
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@ -285,10 +285,10 @@ struct pcs {
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char pcs_proc_revision[8]; /* C0: only first 4 valid */
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char pcs_proc_sn[16]; /* C8: only first 10 valid */
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vm_offset_t pcs_machcheck; /* D8: mach chk phys addr. */
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u_long pcs_machcheck; /* D8: mach chk phys addr. */
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u_int64_t pcs_machcheck_len; /* E0: length in bytes */
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vm_offset_t pcs_halt_pcbb; /* E8: phys addr of halt PCB */
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vm_offset_t pcs_halt_pc; /* F0: halt PC */
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u_long pcs_halt_pcbb; /* E8: phys addr of halt PCB */
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u_long pcs_halt_pc; /* F0: halt PC */
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u_int64_t pcs_halt_ps; /* F8: halt PS */
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u_int64_t pcs_halt_r25; /* 100: halt argument list */
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u_int64_t pcs_halt_r26; /* 108: halt return addr list */
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@ -325,8 +325,8 @@ struct ctb {
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u_int64_t ctb_reserved; /* 16: */
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u_int64_t ctb_len; /* 24: bytes of info */
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u_int64_t ctb_ipl; /* 32: console ipl level */
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vm_offset_t ctb_tintr_vec; /* 40: transmit vec (0x800) */
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vm_offset_t ctb_rintr_vec; /* 48: receive vec (0x800) */
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u_long ctb_tintr_vec; /* 40: transmit vec (0x800) */
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u_long ctb_rintr_vec; /* 48: receive vec (0x800) */
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#define CTB_GRAPHICS 3 /* graphics device */
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#define CTB_NETWORK 0xC0 /* network device */
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@ -334,12 +334,12 @@ struct ctb {
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u_int64_t ctb_term_type; /* 56: terminal type */
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u_int64_t ctb_keybd_type; /* 64: keyboard nationality */
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vm_offset_t ctb_keybd_trans; /* 72: trans. table addr */
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vm_offset_t ctb_keybd_map; /* 80: map table addr */
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u_long ctb_keybd_trans; /* 72: trans. table addr */
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u_long ctb_keybd_map; /* 80: map table addr */
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u_int64_t ctb_keybd_state; /* 88: keyboard flags */
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u_int64_t ctb_keybd_last; /* 96: last key entered */
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vm_offset_t ctb_font_us; /* 104: US font table addr */
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vm_offset_t ctb_font_mcs; /* 112: MCS font table addr */
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u_long ctb_font_us; /* 104: US font table addr */
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u_long ctb_font_mcs; /* 112: MCS font table addr */
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u_int64_t ctb_font_width; /* 120: font width, height */
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u_int64_t ctb_font_height; /* 128: in pixels */
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u_int64_t ctb_mon_width; /* 136: monitor width, height */
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@ -350,11 +350,11 @@ struct ctb {
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u_int64_t ctb_cur_height; /* 176: in pixels */
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u_int64_t ctb_head_cnt; /* 184: # of heads */
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u_int64_t ctb_opwindow; /* 192: opwindow on screen */
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vm_offset_t ctb_head_offset; /* 200: offset to head info */
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vm_offset_t ctb_putchar; /* 208: output char to TURBO */
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u_long ctb_head_offset; /* 200: offset to head info */
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u_long ctb_putchar; /* 208: output char to TURBO */
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u_int64_t ctb_io_state; /* 216: I/O flags */
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u_int64_t ctb_listen_state; /* 224: listener flags */
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vm_offset_t ctb_xaddr; /* 232: extended info addr */
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u_long ctb_xaddr; /* 232: extended info addr */
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u_int64_t ctb_turboslot; /* 248: TURBOchannel slot # */
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u_int64_t ctb_server_off; /* 256: offset to server info */
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u_int64_t ctb_line_off; /* 264: line parameter offset */
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@ -374,9 +374,9 @@ struct crd {
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*/
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struct crb {
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struct crd *crb_v_dispatch; /* 0: virtual dispatch addr */
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vm_offset_t crb_p_dispatch; /* 8: phys dispatch addr */
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u_long crb_p_dispatch; /* 8: phys dispatch addr */
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struct crd *crb_v_fixup; /* 10: virtual fixup addr */
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vm_offset_t crb_p_fixup; /* 18: phys fixup addr */
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u_long crb_p_fixup; /* 18: phys fixup addr */
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u_int64_t crb_map_cnt; /* 20: phys/virt map entries */
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u_int64_t crb_page_cnt; /* 28: pages to be mapped */
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};
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@ -386,16 +386,16 @@ struct crb {
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*/
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struct mddt {
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int64_t mddt_cksum; /* 0: 7-N checksum */
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vm_offset_t mddt_physaddr; /* 8: bank config addr
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u_long mddt_physaddr; /* 8: bank config addr
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* IMPLEMENTATION SPECIFIC
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*/
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u_int64_t mddt_cluster_cnt; /* 10: memory cluster count */
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struct mddt_cluster {
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vm_offset_t mddt_pfn; /* 0: starting PFN */
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u_long mddt_pfn; /* 0: starting PFN */
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u_int64_t mddt_pg_cnt; /* 8: 8KB page count */
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u_int64_t mddt_pg_test; /* 10: tested page count */
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vm_offset_t mddt_v_bitaddr; /* 18: bitmap virt addr */
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vm_offset_t mddt_p_bitaddr; /* 20: bitmap phys addr */
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u_long mddt_v_bitaddr; /* 18: bitmap virt addr */
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u_long mddt_p_bitaddr; /* 20: bitmap phys addr */
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int64_t mddt_bit_cksum; /* 28: bitmap checksum */
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#define MDDT_NONVOLATILE 0x10 /* cluster is non-volatile */
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