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798 Commits

Author SHA1 Message Date
macallan
9c39c70523 we can read the timebase register as a 64bit chunk when _ARCH_PPC64 is defined, 
not necessarily LP64
 2013-04-25 00:08:48 +00:00
christos
caafbf4e1b add missing SSIZE_MIN 2013-04-11 00:57:34 +00:00
kiyohara
b73bbcbf2e More stack for ibm4xx slow machines. 2013-01-29 15:47:16 +00:00
kiyohara
f870b0a58c Support 16bits over stack size. 2013-01-29 15:45:43 +00:00
matt
f82647e665 Make the 85xx get closer to spinning up the secondary CPUs. 
Don't assume TLB1[0] has the mapping for VA/PA 0.
Make sure the TLB1 entries that map physical memory have the M (memory
coherent) bit set.
 2012-11-27 19:24:45 +00:00
christos
72708a99b3 provide _ENTRY(x) because some code needs it. 2012-11-25 01:10:37 +00:00
chs
cbab9cadce split device_t/softc for all remaining drivers. 
replace "struct device *" with "device_t".
use device_xname(), device_unit(), etc.
 2012-10-27 17:17:22 +00:00
kiyohara
515e584834 Support Cache Protocol 'MEI' with MULTIPROCESSOR. 2012-10-20 14:42:15 +00:00
christos
e62c0b0fdf move common tlb stuff to uvm 2012-10-02 23:51:39 +00:00
mrg
d87a39703d increase powerpc NKMEMPAGES_MAX_DEFAULT to 256MB. remove the macppc 
overrides that are now the same as the powerpc default.
 2012-09-23 22:31:38 +00:00
matt
17674df3f2 Add support for _UC_TLSBASE. Make sure to preserve backwards compat for 
programs built before TLS support was added.
 2012-09-11 00:15:19 +00:00
matt
143ca138fb Add a machine splhist command to give (a incomplete) spl history. 
(only the most recent are going to be accurate).

splraise(6) from 0 at 549214603
splraise(7) from 6 at 549214643 (+40)
splx(6) from 7 at 549214691 (+48)
splx(0) from 6 at 549214730 (+39)
 2012-08-01 21:30:21 +00:00
matt
8c3b0a4f45 Export dump_trapframe. 2012-08-01 16:35:50 +00:00
matt
261130358b Fix a problem where the kernel could randomly reset due to a watchdog event. 
When an exception happens, the srr0 (exception PC) was being saved in the
normal location of the current callframe.  This was fine except when the
routine was in its prologue after it had saved LR but had not yet updated the
stack pointer or when the routine was in its epilogue after it has restored
the stack pointer but not yet loaded the LR.  In either case this would cause
the LR to be corrupted (either running the routine forever or by branching
to itself forever).  Now we save and restore the contents of that memory
location so the corruption can't happen.
 2012-08-01 16:19:42 +00:00
matt
0a110b1873 Fix some copy&paste bugs. 2012-08-01 00:45:18 +00:00
matt
bc80e11446 Add command line processing from uboot 
bootm $loadaddr [opts] [device]
where opts is -[advqs] and device is the boot device.
cpu_rootconf will now wait a bit for devices to appear until the boot device
appears.
 2012-07-29 21:39:43 +00:00
matt
927b8a6c6e Fix -fno-common fallout. 2012-07-28 23:08:56 +00:00
matt
75d1db6793 Fix -fno-common fallout. 2012-07-27 22:24:13 +00:00
matt
234c45d0cb Fix some -fno-common fallout 2012-07-27 22:13:58 +00:00
matt
d303a3d4ea Add ESDHC DCR definitions 2012-07-26 18:41:32 +00:00
matt
a162208b2f Add some more PVRs and SVRs 2012-07-18 20:46:36 +00:00
matt
c988344e70 Add P1025 support to the PCI truth tables. 
P1025 only has two PCIe ports, not 3.
 2012-07-18 19:38:26 +00:00
matt
0803c20a9e Define the MPC8XX traps 2012-07-18 16:44:52 +00:00
matt
c53bebd619 MPC8xx SPR defintions 2012-07-17 20:46:07 +00:00
matt
20c73c17d6 The ETSEC on the P1025 has been moved/split so the MDIO stayed in the same 
place but each ETSEC has been split into two virtual halves (G0 and G1) and
each one has a new different base address.
For some reason, tsec1 connects to phy 2 and tsec2 connects to phy 1.
Adjust config file to match
 2012-07-17 01:36:12 +00:00
matt
a8a82a563c Add support for the Freescale TWR-P1025 evaluation board and the P1025/P1016 
QorIQ processors.  XXX tsec isn't working yet on the TWR-P1025.
 2012-07-15 08:44:56 +00:00
matt
789d060691 Add some e500mc/e5500 machines. 2012-07-09 17:58:34 +00:00
matt
dd01d67e95 Allow the use of the full 4GB address space. 2012-07-09 17:55:15 +00:00
matt
d2df93c65d Use pmap_segtab_t 2012-07-09 17:48:31 +00:00
matt
7f99503816 More cleanup. Use a union (pmap_segtab) and a typedef (pmap_segtab_t). Add 
more functionality from the mips pmap and try to make it more common to ease
the transition for mips in the future.
 2012-07-09 17:45:22 +00:00
matt
283eda5a32 Add __HAVE_RAS support. Do it in userret. 2012-05-26 00:31:07 +00:00
matt
94a2d5c844 Add an KASSERT to check that PSL_PR is always set. 2012-05-17 16:21:45 +00:00
matt
12ca21c5bb Preserve some MACCFG2 bits 2012-05-07 23:04:22 +00:00
matt
1f81b2fdc7 Don't use global asm for __clang__ 2012-04-10 16:57:50 +00:00
matt
271a309329 Add e500_tlb_minimize prototype. 2012-03-29 15:45:06 +00:00
matt
20e78297f8 Add vsize_t to pmap_md_{un,}map_poolpage. 
Add pmap_kvptefill prototype.
Slightly change pmap_bootstrap prototype.
 2012-03-29 15:44:40 +00:00
christos
7484a2dbbe - Normalize inclusion protection (remove) 
- Move CHAR_{MIN,MAX} to a common file.
- Fix broken comments
 2012-03-28 17:03:27 +00:00
matt
9e3fcedeae Add CPU_EXECPROT sysctl so that atf can enable exec permission tests for 
PPC Booke.
 2012-03-16 07:41:54 +00:00
matt
46b7d7283d Export MIN_PAGE_SIZE and MAX_PAGE_SIZE for modular kernels. 2012-02-23 20:33:29 +00:00
matt
f326ce849e Restore back to double alignment. 2012-02-21 02:19:01 +00:00
matt
84b41e5d58 Change ALIGNBYTES to be AltiVec savvy 2012-02-21 02:09:35 +00:00
rmind
ad12c77015 Remove COMPAT_SA / KERN_SA. Welcome to 6.99.3! 
Approved by core@.
 2012-02-19 21:05:51 +00:00
macallan
a6d582eda0 make BATs >256MB work, now macppc works again on 745x CPUs as well 
ok riz
 2012-02-15 04:33:19 +00:00
matt
69545c610e When making BATU, use (BAT_XBL|BAT_BL) for the extended bat lengths. 2012-02-15 01:46:42 +00:00
matt
413fb4c3c5 Enable XBSEN and HIGHBAT for OEA 7455 and related CPUs. 
The BAT entries now have a resolution of 8MB.  (Adjacent entries are merged
up to a total of 2GB per entry).
 2012-02-01 05:25:57 +00:00
matt
2144269334 Use C89 function prototypes. 2012-02-01 02:02:07 +00:00
matt
ccd880d5ab Switch to using ANSI prototypes. 2012-01-30 23:34:58 +00:00
matt
c8f14b1af6 PowerPC wants 16-byte aligned stacks (for AltiVec). 2012-01-30 06:04:32 +00:00
christos
dd23e71080 Use and define ALIGN() ALIGN_POINTER() and STACK_ALIGN() consistently, 
and avoid definining them in 10 different places if not needed.
 2012-01-24 20:03:36 +00:00
joerg
e8bec33be1 Change CMSG_SPACE and CMSG_LEN to provide Integer Constant Expressions 
again. This was changed in sys/socket.h r1.51 to work around fallout
from the IPv6 aux data migration. It broke the historic ABI on some
platforms. This commit restores compatibility for netbsd32 code on such
platforms and provides a template for future changes to the CMSG_*
alignment. Revert PCC/Clang workarounds in postfix and tmux.
 2012-01-20 14:08:04 +00:00