section. Patch come up with by Bob Baron <rvb+@cs.cmu.edu> and myself.
This entire bit of code (the code which sets daddr/dsize and taddr/tsize)
is very bogus, but it's not clear what the 'right' way to fix it is
and this patch fixes a problem preventing some ELF executables from
being run.
mips_r2000_, mips_R2000_ -> mips1_
mips_r4000_, mips_R4000_ -> mips3_
(which are also, for mnemonic reasons, consistent with gcc flag usage,
rather than using mipsI_ and mipsIII_).
linker's command line args, rather than the NetBSD linker's command
line args. This is a hack, and should go away in favor of something
more general when that something is developed. In the mean time, it
might be appropriate for the various mips ports to do the same thing.
Where CACHED_TO_HYS() is still needed for kernel-virtual-to-physical
or physical-to-uncached mapping (fb drivers), replace with
`#include <mips/cpuregs.h>'.
* dcparam() with normal tty t_param interface, which calls
* cold_dcparam() called with explicit dc7085 register address
and flags, which does the work and is also callable when cold,
to set up console (or kgdb) line parameters.
* use mips_round_page,mips_trunc_seg() instead of
pica_round_page(),pica_trunc_page().
* discard (unused) return value from TLBUpdate(), and delete
(unused) temporary variable used to hold it.
* Move mips-I pte (TLBlo) definitions from pmax/include/pte.h
to mips/include/mips1_pte.h
* Move mips-III pte (TLBlo) definitions from pica/include/pte.h
to mips/include/mips3_pte.h
* Add new mips/include/pte.h, which includes exactly one of
mips1_pte.h or mips3_pte.h (which still have namespace collisions),
depending on "options MIPS1" or "options MIPS3". (hack).
Move soft kvtopte(), ptetovk() definitions to mips/include/pte.h
* Add macro PTE_TO_PADDR() to hide the different hardware TLB formats
when mapping from pte to physical address.
* Add macro PTE_READONLY() to hide lack of SW read-only bit in mips-III
tlb. (mips1 pmap uses a sw bit in the PTE, mips3 looks up RO bit in
the kernel pmap.)
* Use macros (not direct TLB frobbing) in mips/trap.c, to make it
mips-1/mips-III indepenndet.
* Change {pmax,pica}/include/pte.h to just do #include <mips/pte.h>.
jump-table) locore entrypoints, so the stack traceback code can use
the end marker to handle entry points specially when doing tracebacks,
even if it doesn't know about them explicitly.
* fold in netBSD style changes:
``if (foo = bar)'' -> ``if ((foo = bar) != 0)''
* add mips1 vector as well as mips3 vector
* change vector names to make mips1 and mips3 locore entrpoints distinct
* add pmax additions (e.g., old fixes to ktrace code, kernel-TLB_miss
instrumentation)
* update stack traceback code to a newer version of the pmax code.
add catch-all case, with distinct mips1 and mips3 ranges for locore
entry points, cases to catch othewise-unknown locore entrypoints and
vector code (which have special entry sequences and require special
support to trace through). The relevant mips1 and mips3 functions are
of course now distinct.
NetBSD-current changes:
* change include paths to be relative to the kernel-source tree
(e.g., `/sys') instead of arch/pmax/conf.
* add explicit options for exec packages (EXEC_ELF32, EXEC_ECOFF
for COMPAT_ULTRIX)
* comment out references to still-unsuppoted MI scsi.
