Merge mips1 and mips3 pte/pmap code, pass 0;
* Move mips-I pte (TLBlo) definitions from pmax/include/pte.h to mips/include/mips1_pte.h * Move mips-III pte (TLBlo) definitions from pica/include/pte.h to mips/include/mips3_pte.h * Add new mips/include/pte.h, which includes exactly one of mips1_pte.h or mips3_pte.h (which still have namespace collisions), depending on "options MIPS1" or "options MIPS3". (hack). Move soft kvtopte(), ptetovk() definitions to mips/include/pte.h * Add macro PTE_TO_PADDR() to hide the different hardware TLB formats when mapping from pte to physical address. * Add macro PTE_READONLY() to hide lack of SW read-only bit in mips-III tlb. (mips1 pmap uses a sw bit in the PTE, mips3 looks up RO bit in the kernel pmap.) * Use macros (not direct TLB frobbing) in mips/trap.c, to make it mips-1/mips-III indepenndet. * Change {pmax,pica}/include/pte.h to just do #include <mips/pte.h>.
This commit is contained in:
parent
a179b23932
commit
6ac1fdec40
@ -1,4 +1,4 @@
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/* $NetBSD: mips1_pte.h,v 1.6 1996/02/01 22:32:15 mycroft Exp $ */
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/* $NetBSD: mips1_pte.h,v 1.7 1996/10/13 09:28:53 jonathan Exp $ */
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/*
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* Copyright (c) 1988 University of Utah.
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@ -93,15 +93,5 @@ typedef union pt_entry {
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#define PG_SHIFT 12
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#define PG_PFNUM(x) (((x) & PG_FRAME) >> PG_SHIFT)
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#if defined(_KERNEL) && !defined(_LOCORE)
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/*
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* Kernel virtual address to page table entry and visa versa.
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*/
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#define kvtopte(va) \
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(Sysmap + (((vm_offset_t)(va) - VM_MIN_KERNEL_ADDRESS) >> PGSHIFT))
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#define ptetokv(pte) \
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((((pt_entry_t *)(pte) - Sysmap) << PGSHIFT) + VM_MIN_KERNEL_ADDRESS)
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#define PTE_TO_PADDR(x) ((unsigned)(x) & PG_FRAME)
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extern pt_entry_t *Sysmap; /* kernel pte table */
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extern u_int Sysmapsize; /* number of pte's in Sysmap */
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#endif
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@ -1,4 +1,4 @@
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/* $NetBSD: mips3_pte.h,v 1.3 1996/08/11 23:30:22 jonathan Exp $ */
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/* $NetBSD: mips3_pte.h,v 1.4 1996/10/13 09:28:55 jonathan Exp $ */
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/*
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* Copyright (c) 1988 University of Utah.
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@ -106,11 +106,17 @@ typedef union pt_entry {
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#define PG_IOPAGE (PG_G | PG_V | PG_M | PG_UNCACHED)
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#define PG_FRAME 0x3fffffc0
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#define PG_SHIFT 6
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/* pte accessor macros */
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#define vad_to_pfn(x) (((unsigned)(x) >> PG_SHIFT) & PG_FRAME)
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#define pfn_to_vad(x) (((x) & PG_FRAME) << PG_SHIFT)
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#define vad_to_vpn(x) ((unsigned)(x) & PG_SVPN)
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#define vpn_to_vad(x) ((x) & PG_SVPN)
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/* User viritual to pte page entry */
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#define PTE_TO_PADDR(x) (pfn_to_vad((x))
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/* User virtual to pte page entry */
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#define uvtopte(adr) (((adr) >> PGSHIFT) & (NPTEPG -1))
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#define PG_SIZE_4K 0x00000000
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@ -121,15 +127,3 @@ typedef union pt_entry {
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#define PG_SIZE_4M 0x007fe000
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#define PG_SIZE_16M 0x01ffe000
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#if defined(_KERNEL) && !defined(_LOCORE)
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/*
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* Kernel virtual address to page table entry and visa versa.
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*/
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#define kvtopte(va) \
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(Sysmap + (((vm_offset_t)(va) - VM_MIN_KERNEL_ADDRESS) >> PGSHIFT))
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#define ptetokv(pte) \
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((((pt_entry_t *)(pte) - Sysmap) << PGSHIFT) + VM_MIN_KERNEL_ADDRESS)
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extern pt_entry_t *Sysmap; /* kernel pte table */
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extern u_int Sysmapsize; /* number of pte's in Sysmap */
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#endif /* defined(_KERNEL) && !defined(_LOCORE) */
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46
sys/arch/mips/include/pte.h
Normal file
46
sys/arch/mips/include/pte.h
Normal file
@ -0,0 +1,46 @@
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/* $NetBSD: pte.h,v 1.1 1996/10/13 09:28:56 jonathan Exp $ */
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/*
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* Copyright 1996 The Board of Trustees of The Leland Stanford
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* Junior University. All Rights Reserved.
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*
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* Permission to use, copy, modify, and distribute this
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* software and its documentation for any purpose and without
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* fee is hereby granted, provided that the above copyright
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* notice appear in all copies. Stanford University
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* makes no representations about the suitability of this
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* software for any purpose. It is provided "as is" without
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* express or implied warranty.
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*/
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#ifndef __MIPS_PTE_H__
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#define __MIPS_PTE_H__
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#if defined(MIPS1) && defined(MIPS3)
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#error Cannot yet upport both "MIPS1" (r2000 family) and "MIP3" (r4000 family) in the same kernel.
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#endif
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#ifdef MIPS1
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#include <mips/mips1_pte.h>
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#endif
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#ifdef MIPS3
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#include <mips/mips3_pte.h>
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#endif
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#if defined(_KERNEL) && !defined(_LOCORE)
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/*
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* Kernel virtual address to page table entry and visa versa.
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*/
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#define kvtopte(va) \
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(Sysmap + (((vm_offset_t)(va) - VM_MIN_KERNEL_ADDRESS) >> PGSHIFT))
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#define ptetokv(pte) \
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((((pt_entry_t *)(pte) - Sysmap) << PGSHIFT) + VM_MIN_KERNEL_ADDRESS)
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extern pt_entry_t *Sysmap; /* kernel pte table */
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extern u_int Sysmapsize; /* number of pte's in Sysmap */
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#endif /* defined(_KERNEL) && !defined(_LOCORE) */
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#endif /* __MIPS_PTE_H__ */
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@ -1,4 +1,4 @@
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/* $NetBSD: trap.c,v 1.47 1996/10/13 07:09:33 jonathan Exp $ */
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/* $NetBSD: trap.c,v 1.48 1996/10/13 09:29:07 jonathan Exp $ */
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/*
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* Copyright (c) 1988 University of Utah.
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@ -108,8 +108,10 @@ extern void mips_r2000_UserGenException __P((void));
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extern void mips_r2000_KernIntr __P((void));
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extern void mips_r2000_UserIntr __P((void));
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extern void mips_r2000_TLBModException __P((void));
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extern void mips_r2000_TLBMissException __P((void));
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/* marks end of vector code */
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extern void mips_R2000_UTLBMiss __P((void));
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extern void mips1_exceptionentry_end __P((void));
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extern void mips_r4000_KernGenException __P((void));
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@ -118,7 +120,9 @@ extern void mips_r4000_KernIntr __P((void));
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extern void mips_r4000_UserIntr __P((void));
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extern void mips_r4000_TLBModException __P((void));
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extern void mips_r4000_TLBMissException __P((void));
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/* marks end of vector code */
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extern void mips_r4000_TLBMiss __P((void));
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extern void mips3_exceptionentry_end __P((void));
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@ -454,7 +458,7 @@ trap(statusReg, causeReg, vadr, pc, args)
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pte->pt_entry = entry;
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vadr &= ~PGOFSET;
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MachTLBUpdate(vadr, entry);
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pa = entry & PG_FRAME;
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pa = PTE_TO_PADDR(entry);
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#ifdef ATTR
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pmap_attributes[atop(pa)] |= PMAP_ATTR_MOD;
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#else
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@ -492,7 +496,7 @@ trap(statusReg, causeReg, vadr, pc, args)
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vadr = (vadr & ~PGOFSET) |
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(pmap->pm_tlbpid << VMMACH_TLB_PID_SHIFT);
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MachTLBUpdate(vadr, entry);
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pa = entry & PG_FRAME;
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pa = PTE_TO_PADDR(entry);
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#ifdef ATTR
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pmap_attributes[atop(pa)] |= PMAP_ATTR_MOD;
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#else
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@ -1556,7 +1560,7 @@ specialframe:
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else if (pcBetween(mips_r2000_UserIntr, mips_r2000_TLBMissException))
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subr = (unsigned) mips_r2000_UserIntr;
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else if (pcbetween(mips_r2000_UTLBMiss, mips1_exceptionentry_end) {
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else if (pcBetween(mips_R2000_UTLBMiss, mips1_exceptionentry_end)) {
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(*printfn)("<<mips1 locore>>");
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goto done;
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}
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@ -1576,7 +1580,7 @@ specialframe:
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else if (pcBetween(mips_r4000_UserIntr, mips_r4000_TLBMissException))
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subr = (unsigned) mips_r4000_UserIntr;
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else if (pcbetween(mips_r4000_UTLBMiss, mips3_exceptionentry_end) {
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else if (pcBetween(mips_R4000_TLBMiss, mips3_exceptionentry_end)) {
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(*printfn)("<<mips3 locore>>");
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goto done;
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} else
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@ -1,135 +1,3 @@
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/* $NetBSD: pte.h,v 1.3 1996/08/11 23:30:22 jonathan Exp $ */
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/* $NetBSD: pte.h,v 1.4 1996/10/13 09:29:03 jonathan Exp $ */
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/*
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* Copyright (c) 1988 University of Utah.
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* Copyright (c) 1992, 1993
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* The Regents of the University of California. All rights reserved.
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*
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* This code is derived from software contributed to Berkeley by
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* the Systems Programming Group of the University of Utah Computer
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* Science Department and Ralph Campbell.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
|
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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||||
* notice, this list of conditions and the following disclaimer in the
|
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed by the University of
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* California, Berkeley and its contributors.
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* 4. Neither the name of the University nor the names of its contributors
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* may be used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
|
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* ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* from: Utah Hdr: pte.h 1.11 89/09/03
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*
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* from: @(#)pte.h 8.1 (Berkeley) 6/10/93
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*/
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/*
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* R4000 hardware page table entry
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*/
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#ifndef _LOCORE
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struct pte {
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#if BYTE_ORDER == BIG_ENDIAN
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unsigned int pg_prot:2, /* SW: access control */
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pg_pfnum:24, /* HW: core page frame number or 0 */
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pg_attr:3, /* HW: cache attribute */
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pg_m:1, /* HW: modified (dirty) bit */
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pg_v:1, /* HW: valid bit */
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pg_g:1; /* HW: ignore pid bit */
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#endif
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#if BYTE_ORDER == LITTLE_ENDIAN
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unsigned int pg_g:1, /* HW: ignore pid bit */
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pg_v:1, /* HW: valid bit */
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pg_m:1, /* HW: modified (dirty) bit */
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pg_attr:3, /* HW: cache attribute */
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pg_pfnum:24, /* HW: core page frame number or 0 */
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pg_prot:2; /* SW: access control */
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#endif
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};
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/*
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* Structure defining an tlb entry data set.
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*/
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struct tlb {
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int tlb_mask;
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int tlb_hi;
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int tlb_lo0;
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int tlb_lo1;
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};
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typedef union pt_entry {
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unsigned int pt_entry; /* for copying, etc. */
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struct pte pt_pte; /* for getting to bits by name */
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} pt_entry_t; /* Mach page table entry */
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#endif /* _LOCORE */
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#define PT_ENTRY_NULL ((pt_entry_t *) 0)
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#define PG_WIRED 0x80000000 /* SW */
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#define PG_RO 0x40000000 /* SW */
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#define PG_SVPN 0xfffff000 /* Software page no mask */
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#define PG_HVPN 0xffffe000 /* Hardware page no mask */
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#define PG_ODDPG 0x00001000 /* Odd even pte entry */
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#define PG_ASID 0x000000ff /* Address space ID */
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#define PG_G 0x00000001 /* HW */
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#define PG_V 0x00000002
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#define PG_NV 0x00000000
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#define PG_M 0x00000004
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#define PG_ATTR 0x0000003f
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#define PG_UNCACHED 0x00000010
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#define PG_CACHED 0x00000018
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#define PG_CACHEMODE 0x00000038
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#define PG_ROPAGE (PG_V | PG_RO | PG_CACHED) /* Write protected */
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#define PG_RWPAGE (PG_V | PG_M | PG_CACHED) /* Not wr-prot not clean */
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#define PG_CWPAGE (PG_V | PG_CACHED) /* Not wr-prot but clean */
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#define PG_IOPAGE (PG_G | PG_V | PG_M | PG_UNCACHED)
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#define PG_FRAME 0x3fffffc0
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#define PG_SHIFT 6
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#define vad_to_pfn(x) (((unsigned)(x) >> PG_SHIFT) & PG_FRAME)
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#define pfn_to_vad(x) (((x) & PG_FRAME) << PG_SHIFT)
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#define vad_to_vpn(x) ((unsigned)(x) & PG_SVPN)
|
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#define vpn_to_vad(x) ((x) & PG_SVPN)
|
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/* User viritual to pte page entry */
|
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#define uvtopte(adr) (((adr) >> PGSHIFT) & (NPTEPG -1))
|
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#define PG_SIZE_4K 0x00000000
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#define PG_SIZE_16K 0x00006000
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#define PG_SIZE_64K 0x0001e000
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#define PG_SIZE_256K 0x0007e000
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#define PG_SIZE_1M 0x001fe000
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#define PG_SIZE_4M 0x007fe000
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#define PG_SIZE_16M 0x01ffe000
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|
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#if defined(_KERNEL) && !defined(_LOCORE)
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/*
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* Kernel virtual address to page table entry and visa versa.
|
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*/
|
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#define kvtopte(va) \
|
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(Sysmap + (((vm_offset_t)(va) - VM_MIN_KERNEL_ADDRESS) >> PGSHIFT))
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#define ptetokv(pte) \
|
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((((pt_entry_t *)(pte) - Sysmap) << PGSHIFT) + VM_MIN_KERNEL_ADDRESS)
|
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|
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extern pt_entry_t *Sysmap; /* kernel pte table */
|
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extern u_int Sysmapsize; /* number of pte's in Sysmap */
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#endif /* defined(_KERNEL) && !defined(_LOCORE) */
|
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#include <mips/pte.h>
|
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|
@ -1,107 +1,3 @@
|
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/* $NetBSD: pte.h,v 1.6 1996/02/01 22:32:15 mycroft Exp $ */
|
||||
/* $NetBSD: pte.h,v 1.7 1996/10/13 09:29:00 jonathan Exp $ */
|
||||
|
||||
/*
|
||||
* Copyright (c) 1988 University of Utah.
|
||||
* Copyright (c) 1992, 1993
|
||||
* The Regents of the University of California. All rights reserved.
|
||||
*
|
||||
* This code is derived from software contributed to Berkeley by
|
||||
* the Systems Programming Group of the University of Utah Computer
|
||||
* Science Department and Ralph Campbell.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
* 1. Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
* 3. All advertising materials mentioning features or use of this software
|
||||
* must display the following acknowledgement:
|
||||
* This product includes software developed by the University of
|
||||
* California, Berkeley and its contributors.
|
||||
* 4. Neither the name of the University nor the names of its contributors
|
||||
* may be used to endorse or promote products derived from this software
|
||||
* without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
|
||||
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
|
||||
* ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
|
||||
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
|
||||
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
|
||||
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
|
||||
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
|
||||
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
|
||||
* SUCH DAMAGE.
|
||||
*
|
||||
* from: Utah Hdr: pte.h 1.11 89/09/03
|
||||
*
|
||||
* @(#)pte.h 8.1 (Berkeley) 6/10/93
|
||||
*/
|
||||
|
||||
/*
|
||||
* R2000 hardware page table entry
|
||||
*/
|
||||
|
||||
#ifndef _LOCORE
|
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struct pte {
|
||||
#if BYTE_ORDER == BIG_ENDIAN
|
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unsigned int pg_pfnum:20, /* HW: core page frame number or 0 */
|
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pg_n:1, /* HW: non-cacheable bit */
|
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pg_m:1, /* HW: modified (dirty) bit */
|
||||
pg_v:1, /* HW: valid bit */
|
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pg_g:1, /* HW: ignore pid bit */
|
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:4,
|
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pg_swapm:1, /* SW: page must be forced to swap */
|
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pg_fod:1, /* SW: is fill on demand (=0) */
|
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pg_prot:2; /* SW: access control */
|
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#endif
|
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#if BYTE_ORDER == LITTLE_ENDIAN
|
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unsigned int pg_prot:2, /* SW: access control */
|
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pg_fod:1, /* SW: is fill on demand (=0) */
|
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pg_swapm:1, /* SW: page must be forced to swap */
|
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:4,
|
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pg_g:1, /* HW: ignore pid bit */
|
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pg_v:1, /* HW: valid bit */
|
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pg_m:1, /* HW: modified (dirty) bit */
|
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pg_n:1, /* HW: non-cacheable bit */
|
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pg_pfnum:20; /* HW: core page frame number or 0 */
|
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#endif
|
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};
|
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|
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typedef union pt_entry {
|
||||
unsigned int pt_entry; /* for copying, etc. */
|
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struct pte pt_pte; /* for getting to bits by name */
|
||||
} pt_entry_t; /* Mach page table entry */
|
||||
#endif /* _LOCORE */
|
||||
|
||||
#define PT_ENTRY_NULL ((pt_entry_t *) 0)
|
||||
|
||||
#define PG_PROT 0x00000003
|
||||
#define PG_RW 0x00000000
|
||||
#define PG_RO 0x00000001
|
||||
#define PG_WIRED 0x00000002
|
||||
#define PG_G 0x00000100
|
||||
#define PG_V 0x00000200
|
||||
#define PG_NV 0x00000000
|
||||
#define PG_M 0x00000400
|
||||
#define PG_N 0x00000800
|
||||
#define PG_FRAME 0xfffff000
|
||||
#define PG_SHIFT 12
|
||||
#define PG_PFNUM(x) (((x) & PG_FRAME) >> PG_SHIFT)
|
||||
|
||||
#if defined(_KERNEL) && !defined(_LOCORE)
|
||||
/*
|
||||
* Kernel virtual address to page table entry and visa versa.
|
||||
*/
|
||||
#define kvtopte(va) \
|
||||
(Sysmap + (((vm_offset_t)(va) - VM_MIN_KERNEL_ADDRESS) >> PGSHIFT))
|
||||
#define ptetokv(pte) \
|
||||
((((pt_entry_t *)(pte) - Sysmap) << PGSHIFT) + VM_MIN_KERNEL_ADDRESS)
|
||||
|
||||
extern pt_entry_t *Sysmap; /* kernel pte table */
|
||||
extern u_int Sysmapsize; /* number of pte's in Sysmap */
|
||||
#endif
|
||||
#include <mips/pte.h>
|
||||
|
Loading…
Reference in New Issue
Block a user