Commit (very old) partly-merged ARC Pica mips3 trap handler code:
* fold in netBSD style changes:
``if (foo = bar)'' -> ``if ((foo = bar) != 0)''
* add mips1 vector as well as mips3 vector
* change vector names to make mips1 and mips3 locore entrpoints distinct
* add pmax additions (e.g., old fixes to ktrace code, kernel-TLB_miss
instrumentation)
* update stack traceback code to a newer version of the pmax code.
This commit is contained in:
jonathan
parent
bc759e3dfb
commit
96eb3c22a4
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@ -1,4 +1,4 @@
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/* $NetBSD: trap.c,v 1.6 1996/10/13 03:31:57 christos Exp $ */
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/* $NetBSD: trap.c,v 1.7 1996/10/13 08:15:40 jonathan Exp $ */
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/*
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* Copyright (c) 1988 University of Utah.
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@ -42,20 +42,26 @@
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* @(#)trap.c 8.5 (Berkeley) 1/11/94
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*/
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#if #defined(CPU_R4000) && !defined(CPU_R3000)
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#error Must define at least one of CPU_R3000 or CPU_R4000.
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#endif
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/device.h>
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#include <sys/proc.h>
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#include <sys/kernel.h>
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#include <sys/signalvar.h>
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#include <sys/syscall.h>
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#include <sys/user.h>
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#include <sys/buf.h>
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#include <sys/device.h>
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#ifdef KTRACE
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#include <sys/ktrace.h>
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#endif
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#include <net/netisr.h>
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#include <mips/locore.h>
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#include <machine/trap.h>
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#include <machine/psl.h>
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#include <machine/reg.h>
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@ -72,6 +78,14 @@
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#include <sys/cdefs.h>
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#include <sys/syslog.h>
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#include <miscfs/procfs/procfs.h>
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/* all this to get prototypes for ipintr() and arpintr() */
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#include <sys/socket.h>
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#include <net/if.h>
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#include <netinet/in.h>
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#include <netinet/if_ether.h>
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#include <netinet/ip_var.h>
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struct proc *machFPCurProcPtr; /* pointer to last proc to use FP */
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@ -86,10 +100,6 @@ int (*mips_hardware_intr) __P((u_int mask, u_int pc, u_int status,
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/*
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* Exception-handling functions, called via machExceptionTable from locore
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*/
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extern void MachKernGenException __P((void));
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extern void MachUserGenException __P((void));
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extern void MachKernIntr __P((void));
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extern void MachUserIntr __P((void));
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extern void MachTLBModException __P((void));
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extern void MachTLBInvalidException __P((void));
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extern unsigned MachEmulateBranch __P((unsigned *regsPtr,
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@ -97,77 +107,175 @@ extern unsigned MachEmulateBranch __P((unsigned *regsPtr,
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unsigned fpcCSR,
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int allowNonBranch));
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extern void mips_r2000_KernGenException __P((void));
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extern void mips_r2000_UserGenException __P((void));
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extern void mips_r2000_KernIntr __P((void));
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extern void mips_r2000_UserIntr __P((void));
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extern void mips_r2000_TLBModException __P((void));
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extern void mips_r2000_TLBMissException __P((void));
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extern void mips_r4000_KernGenException __P((void));
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extern void mips_r4000_UserGenException __P((void));
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extern void mips_r4000_KernIntr __P((void));
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extern void mips_r4000_UserIntr __P((void));
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extern void mips_r4000_TLBModException __P((void));
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extern void mips_r4000_TLBMissException __P((void));
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extern void mips_r4000_TLBInvalidException __P((void));
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void (*mips_r4000_ExceptionTable[]) __P((void)) = {
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/*
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* The kernel exception handlers.
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*/
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mips_r4000_KernIntr, /* external interrupt */
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mips_r4000_KernGenException, /* TLB modification */
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mips_r4000_TLBInvalidException, /* TLB miss (load or instr. fetch) */
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mips_r4000_TLBInvalidException, /* TLB miss (store) */
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mips_r4000_KernGenException, /* address error (load or I-fetch) */
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mips_r4000_KernGenException, /* address error (store) */
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mips_r4000_KernGenException, /* bus error (I-fetch) */
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mips_r4000_KernGenException, /* bus error (load or store) */
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mips_r4000_KernGenException, /* system call */
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mips_r4000_KernGenException, /* breakpoint */
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mips_r4000_KernGenException, /* reserved instruction */
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mips_r4000_KernGenException, /* coprocessor unusable */
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mips_r4000_KernGenException, /* arithmetic overflow */
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mips_r4000_KernGenException, /* trap exception */
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mips_r4000_KernGenException, /* virtual coherence exception inst */
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mips_r4000_KernGenException, /* floating point exception */
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mips_r4000_KernGenException, /* reserved */
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mips_r4000_KernGenException, /* reserved */
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mips_r4000_KernGenException, /* reserved */
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mips_r4000_KernGenException, /* reserved */
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mips_r4000_KernGenException, /* reserved */
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mips_r4000_KernGenException, /* reserved */
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mips_r4000_KernGenException, /* reserved */
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mips_r4000_KernGenException, /* watch exception */
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mips_r4000_KernGenException, /* reserved */
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mips_r4000_KernGenException, /* reserved */
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mips_r4000_KernGenException, /* reserved */
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mips_r4000_KernGenException, /* reserved */
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mips_r4000_KernGenException, /* reserved */
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mips_r4000_KernGenException, /* reserved */
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mips_r4000_KernGenException, /* reserved */
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mips_r4000_KernGenException, /* virtual coherence exception data */
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/*
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* The user exception handlers.
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*/
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mips_r4000_UserIntr, /* 0 */
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mips_r4000_UserGenException, /* 1 */
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mips_r4000_UserGenException, /* 2 */
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mips_r4000_UserGenException, /* 3 */
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mips_r4000_UserGenException, /* 4 */
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mips_r4000_UserGenException, /* 5 */
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mips_r4000_UserGenException, /* 6 */
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mips_r4000_UserGenException, /* 7 */
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mips_r4000_UserGenException, /* 8 */
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mips_r4000_UserGenException, /* 9 */
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mips_r4000_UserGenException, /* 10 */
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mips_r4000_UserGenException, /* 11 */
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mips_r4000_UserGenException, /* 12 */
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mips_r4000_UserGenException, /* 13 */
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mips_r4000_UserGenException, /* 14 */
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mips_r4000_UserGenException, /* 15 */
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mips_r4000_UserGenException, /* 16 */
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mips_r4000_UserGenException, /* 17 */
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mips_r4000_UserGenException, /* 18 */
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mips_r4000_UserGenException, /* 19 */
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mips_r4000_UserGenException, /* 20 */
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mips_r4000_UserGenException, /* 21 */
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mips_r4000_UserGenException, /* 22 */
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mips_r4000_UserGenException, /* 23 */
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mips_r4000_UserGenException, /* 24 */
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mips_r4000_UserGenException, /* 25 */
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mips_r4000_UserGenException, /* 26 */
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mips_r4000_UserGenException, /* 27 */
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mips_r4000_UserGenException, /* 28 */
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mips_r4000_UserGenException, /* 29 */
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mips_r4000_UserGenException, /* 20 */
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mips_r4000_UserGenException, /* 31 */
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};
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/*
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* XXX bug compatibility. Some versions of the locore code still refer
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* to the exception vector by the Sprite name.
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* Note these are all different from the r2000 equivalents. At the very
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* least, the MIPS-1 returns from an exception using rfe, and the
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* MIPS-III uses eret.
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*/
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void (*machExceptionTable[]) __P((void)) = {
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/*
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* The kernel exception handlers.
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*/
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MachKernIntr, /* external interrupt */
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MachKernGenException, /* TLB modification */
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MachTLBInvalidException, /* TLB miss (load or instr. fetch) */
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MachTLBInvalidException, /* TLB miss (store) */
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MachKernGenException, /* address error (load or I-fetch) */
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MachKernGenException, /* address error (store) */
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MachKernGenException, /* bus error (I-fetch) */
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MachKernGenException, /* bus error (load or store) */
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MachKernGenException, /* system call */
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MachKernGenException, /* breakpoint */
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MachKernGenException, /* reserved instruction */
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MachKernGenException, /* coprocessor unusable */
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MachKernGenException, /* arithmetic overflow */
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MachKernGenException, /* trap exception */
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MachKernGenException, /* virtual coherence exception inst */
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MachKernGenException, /* floating point exception */
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MachKernGenException, /* reserved */
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MachKernGenException, /* reserved */
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MachKernGenException, /* reserved */
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MachKernGenException, /* reserved */
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MachKernGenException, /* reserved */
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MachKernGenException, /* reserved */
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MachKernGenException, /* reserved */
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MachKernGenException, /* watch exception */
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MachKernGenException, /* reserved */
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MachKernGenException, /* reserved */
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MachKernGenException, /* reserved */
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MachKernGenException, /* reserved */
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MachKernGenException, /* reserved */
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MachKernGenException, /* reserved */
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MachKernGenException, /* reserved */
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MachKernGenException, /* virtual coherence exception data */
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mips_r4000_KernIntr, /* external interrupt */
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mips_r4000_KernGenException, /* TLB modification */
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mips_r4000_TLBInvalidException, /* TLB miss (load or instr. fetch) */
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mips_r4000_TLBInvalidException, /* TLB miss (store) */
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mips_r4000_KernGenException, /* address error (load or I-fetch) */
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mips_r4000_KernGenException, /* address error (store) */
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mips_r4000_KernGenException, /* bus error (I-fetch) */
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mips_r4000_KernGenException, /* bus error (load or store) */
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mips_r4000_KernGenException, /* system call */
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mips_r4000_KernGenException, /* breakpoint */
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mips_r4000_KernGenException, /* reserved instruction */
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mips_r4000_KernGenException, /* coprocessor unusable */
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mips_r4000_KernGenException, /* arithmetic overflow */
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mips_r4000_KernGenException, /* trap exception */
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mips_r4000_KernGenException, /* virtual coherence exception inst */
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mips_r4000_KernGenException, /* floating point exception */
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mips_r4000_KernGenException, /* reserved */
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mips_r4000_KernGenException, /* reserved */
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mips_r4000_KernGenException, /* reserved */
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mips_r4000_KernGenException, /* reserved */
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mips_r4000_KernGenException, /* reserved */
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mips_r4000_KernGenException, /* reserved */
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mips_r4000_KernGenException, /* reserved */
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mips_r4000_KernGenException, /* watch exception */
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mips_r4000_KernGenException, /* reserved */
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mips_r4000_KernGenException, /* reserved */
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mips_r4000_KernGenException, /* reserved */
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mips_r4000_KernGenException, /* reserved */
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mips_r4000_KernGenException, /* reserved */
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mips_r4000_KernGenException, /* reserved */
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mips_r4000_KernGenException, /* reserved */
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mips_r4000_KernGenException, /* virtual coherence exception data */
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/*
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* The user exception handlers.
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*/
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MachUserIntr, /* 0 */
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MachUserGenException, /* 1 */
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MachUserGenException, /* 2 */
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MachUserGenException, /* 3 */
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MachUserGenException, /* 4 */
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MachUserGenException, /* 5 */
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MachUserGenException, /* 6 */
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MachUserGenException, /* 7 */
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MachUserGenException, /* 8 */
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MachUserGenException, /* 9 */
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MachUserGenException, /* 10 */
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MachUserGenException, /* 11 */
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MachUserGenException, /* 12 */
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MachUserGenException, /* 13 */
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MachUserGenException, /* 14 */
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MachUserGenException, /* 15 */
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MachUserGenException, /* 16 */
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MachUserGenException, /* 17 */
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MachUserGenException, /* 18 */
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MachUserGenException, /* 19 */
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MachUserGenException, /* 20 */
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MachUserGenException, /* 21 */
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MachUserGenException, /* 22 */
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MachUserGenException, /* 23 */
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MachUserGenException, /* 24 */
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MachUserGenException, /* 25 */
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MachUserGenException, /* 26 */
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MachUserGenException, /* 27 */
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MachUserGenException, /* 28 */
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MachUserGenException, /* 29 */
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MachUserGenException, /* 20 */
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MachUserGenException, /* 31 */
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mips_r4000_UserIntr, /* 0 */
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mips_r4000_UserGenException, /* 1 */
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mips_r4000_UserGenException, /* 2 */
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mips_r4000_UserGenException, /* 3 */
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mips_r4000_UserGenException, /* 4 */
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mips_r4000_UserGenException, /* 5 */
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mips_r4000_UserGenException, /* 6 */
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mips_r4000_UserGenException, /* 7 */
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mips_r4000_UserGenException, /* 8 */
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mips_r4000_UserGenException, /* 9 */
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mips_r4000_UserGenException, /* 10 */
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mips_r4000_UserGenException, /* 11 */
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mips_r4000_UserGenException, /* 12 */
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mips_r4000_UserGenException, /* 13 */
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mips_r4000_UserGenException, /* 14 */
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mips_r4000_UserGenException, /* 15 */
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mips_r4000_UserGenException, /* 16 */
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mips_r4000_UserGenException, /* 17 */
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mips_r4000_UserGenException, /* 18 */
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mips_r4000_UserGenException, /* 19 */
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mips_r4000_UserGenException, /* 20 */
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mips_r4000_UserGenException, /* 21 */
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mips_r4000_UserGenException, /* 22 */
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mips_r4000_UserGenException, /* 23 */
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mips_r4000_UserGenException, /* 24 */
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mips_r4000_UserGenException, /* 25 */
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mips_r4000_UserGenException, /* 26 */
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mips_r4000_UserGenException, /* 27 */
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mips_r4000_UserGenException, /* 28 */
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mips_r4000_UserGenException, /* 29 */
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mips_r4000_UserGenException, /* 20 */
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mips_r4000_UserGenException, /* 31 */
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};
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char *trap_type[] = {
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@ -218,6 +326,7 @@ struct trapdebug { /* trap history buffer for debugging */
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} trapdebug[TRAPSIZE], *trp = trapdebug;
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void trapDump __P((char * msg));
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void cpu_getregs __P((int *regs));
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#endif /* DEBUG */
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#ifdef DEBUG /* stack trace code, also useful for DDB one day */
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@ -225,7 +334,7 @@ extern void stacktrace();
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extern void logstacktrace();
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/* extern functions printed by name in stack backtraces */
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extern void idle(), cpu_switch(), splx(), MachEmptyWriteBuffer();
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extern void idle(), cpu_switch(), wbflush();
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extern void MachTLBMiss();
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extern int main __P((void*));
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#endif /* DEBUG */
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@ -280,7 +389,7 @@ trap(statusReg, causeReg, vadr, pc, args)
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* We only respond to software interrupts when returning to user mode.
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*/
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if (statusReg & MIPS_SR_INT_IE)
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splx((statusReg & MACH_HARD_INT_MASK) | MACH_SR_INT_ENAB);
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splx((statusReg & MACH_HARD_INT_MASK) | MIPS_SR_INT_IE);
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switch (type) {
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case T_TLB_MOD:
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@ -366,11 +475,12 @@ trap(statusReg, causeReg, vadr, pc, args)
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int rv;
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kernel_fault:
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/*kernelfaults++;*/
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va = trunc_page((vm_offset_t)vadr);
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rv = vm_fault(kernel_map, va, ftype, FALSE);
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if (rv == KERN_SUCCESS)
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return (pc);
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if (i = ((struct pcb *)UADDR)->pcb_onfault) {
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if ((i = ((struct pcb *)UADDR)->pcb_onfault) != 0) {
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((struct pcb *)UADDR)->pcb_onfault = 0;
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return (onfault_table[i]);
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}
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@ -431,7 +541,7 @@ trap(statusReg, causeReg, vadr, pc, args)
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goto out;
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}
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if (!USERMODE(statusReg)) {
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if (i = ((struct pcb *)UADDR)->pcb_onfault) {
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if ((i = ((struct pcb *)UADDR)->pcb_onfault) != 0) {
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((struct pcb *)UADDR)->pcb_onfault = 0;
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return (onfault_table[i]);
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}
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@ -626,6 +736,11 @@ trap(statusReg, causeReg, vadr, pc, args)
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locr0[V0] = i;
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locr0[A3] = 1;
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}
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/*
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* If we modified code or data, flush caches.
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* XXX code unyderling ptrace() and/or proc fs should do this?
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*/
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if(code == SYS_ptrace)
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MachFlushCache();
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done:
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@ -634,7 +749,7 @@ trap(statusReg, causeReg, vadr, pc, args)
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#endif
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#ifdef KTRACE
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if (KTRPOINT(p, KTR_SYSRET))
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ktrsysret(p->p_tracep, code, i, rval);
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ktrsysret(p->p_tracep, code, i, rval[0]);
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#endif
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goto out;
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}
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@ -695,7 +810,8 @@ trap(statusReg, causeReg, vadr, pc, args)
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i = SIGILL; /* only FPU instructions allowed */
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break;
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}
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MachSwitchFPState(machFPCurProcPtr, p->p_md.md_regs);
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MachSwitchFPState(machFPCurProcPtr,
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(struct user*)p->p_md.md_regs);
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machFPCurProcPtr = p;
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p->p_md.md_regs[PS] |= MACH_SR_COP_1_BIT;
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p->p_md.md_flags |= MDP_FPUSED;
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@ -721,7 +837,7 @@ trap(statusReg, causeReg, vadr, pc, args)
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case T_ADDR_ERR_LD: /* misaligned access */
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case T_ADDR_ERR_ST: /* misaligned access */
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case T_BUS_ERR_LD_ST: /* BERR asserted to cpu */
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if (i = ((struct pcb *)UADDR)->pcb_onfault) {
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if ((i = ((struct pcb *)UADDR)->pcb_onfault) != 0) {
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((struct pcb *)UADDR)->pcb_onfault = 0;
|
||||
return (onfault_table[i]);
|
||||
}
|
||||
|
|
@ -1247,7 +1363,6 @@ stacktrace_subr(a0, a1, a2, a3, printfn)
|
|||
InstFmt i;
|
||||
int more, stksize;
|
||||
int regs[3];
|
||||
extern setsoftclock();
|
||||
extern char start[], edata[];
|
||||
unsigned int frames = 0;
|
||||
|
||||
|
|
@ -1281,11 +1396,21 @@ specialframe:
|
|||
goto done;
|
||||
}
|
||||
|
||||
/*
|
||||
* check for PC between two entry points
|
||||
*/
|
||||
# define Between(x, y, z) \
|
||||
( ((x) <= (y)) && ((y) < (z)) )
|
||||
# define pcBetween(a,b) \
|
||||
Between((unsigned)a, pc, (unsigned)b)
|
||||
|
||||
|
||||
/* Backtraces should contine through interrupts from kernel mode */
|
||||
if (pc >= (unsigned)MachKernIntr && pc < (unsigned)MachUserIntr) {
|
||||
#ifdef CPU_R3000
|
||||
if (pcBetween(mips_r2000_KernIntr, mips_r2000_UserIntr)) {
|
||||
/* NOTE: the offsets depend on the code in locore.s */
|
||||
(*printfn)("MachKernIntr+%x: (%x, %x ,%x) -------\n",
|
||||
pc-(unsigned)MachKernIntr, a0, a1, a2);
|
||||
(*printfn)("r3000 KernIntr+%x: (%x, %x ,%x) -------\n",
|
||||
pc-(unsigned)mips_r2000_KernIntr, a0, a1, a2);
|
||||
a0 = kdbpeek(sp + 36);
|
||||
a1 = kdbpeek(sp + 40);
|
||||
a2 = kdbpeek(sp + 44);
|
||||
|
|
@ -1296,27 +1421,69 @@ specialframe:
|
|||
sp = sp + 108;
|
||||
goto specialframe;
|
||||
}
|
||||
#endif /* CPU_R3000 */
|
||||
|
||||
#ifdef CPU_R4000
|
||||
if (pcBetween(mips_r4000_KernIntr, mips_r4000_UserIntr)) {
|
||||
/* NOTE: the offsets depend on the code in locore.s */
|
||||
(*printfn)("R4000 KernIntr+%x: (%x, %x ,%x) -------\n",
|
||||
pc-(unsigned)mips_r4000_KernIntr, a0, a1, a2);
|
||||
a0 = kdbpeek(sp + 36);
|
||||
a1 = kdbpeek(sp + 40);
|
||||
a2 = kdbpeek(sp + 44);
|
||||
a3 = kdbpeek(sp + 48);
|
||||
|
||||
pc = kdbpeek(sp + 20); /* exc_pc - pc at time of exception */
|
||||
ra = kdbpeek(sp + 92); /* ra at time of exception */
|
||||
sp = sp + 108;
|
||||
goto specialframe;
|
||||
}
|
||||
#endif /* cpu_r4000 */
|
||||
|
||||
|
||||
# define Between(x, y, z) \
|
||||
( ((x) <= (y)) && ((y) < (z)) )
|
||||
# define pcBetween(a,b) \
|
||||
Between((unsigned)a, pc, (unsigned)b)
|
||||
|
||||
/*
|
||||
* Check for current PC in exception handler code that don't
|
||||
* have a preceding "j ra" at the tail of the preceding function.
|
||||
* Depends on relative ordering of functions in locore.
|
||||
*/
|
||||
if (pcBetween(MachKernGenException, MachUserGenException))
|
||||
subr = (unsigned) MachKernGenException;
|
||||
else if (pcBetween(MachUserGenException,MachKernIntr))
|
||||
subr = (unsigned) MachUserGenException;
|
||||
else if (pcBetween(MachKernIntr, MachUserIntr))
|
||||
subr = (unsigned) MachKernIntr;
|
||||
else if (pcBetween(MachUserIntr, MachTLBInvalidException))
|
||||
subr = (unsigned) MachUserIntr;
|
||||
else if (pcBetween(splx, MachEmptyWriteBuffer))
|
||||
|
||||
/* XXX fixup tests after cutting and pasting in locore.S */
|
||||
/* R4000 exception handlers */
|
||||
|
||||
#ifdef CPU_R2000
|
||||
if (pcBetween(mips_r2000_KernGenException, mips_r2000_UserGenException))
|
||||
subr = (unsigned) mips_r2000_KernGenException;
|
||||
else if (pcBetween(mips_r2000_UserGenException,mips_r2000_KernIntr))
|
||||
subr = (unsigned) mips_r2000_UserGenException;
|
||||
else if (pcBetween(mips_r2000_KernIntr, mips_r2000_UserIntr))
|
||||
subr = (unsigned) mips_r2000_KernIntr;
|
||||
else if (pcBetween(mips_r2000_UserIntr, mips_r2000_TLBMissException))
|
||||
subr = (unsigned) mips_r2000_UserIntr;
|
||||
|
||||
else if (pcBetween(mips_r2000_UserIntr, mips_r2000_TLBMissException))
|
||||
subr = (unsigned) mips_r2000_UserIntr;
|
||||
else
|
||||
#endif /* CPU_R2000 */
|
||||
|
||||
|
||||
#ifdef CPU_R4000
|
||||
/* R4000 exception handlers */
|
||||
if (pcBetween(mips_r4000_KernGenException, mips_r4000_UserGenException))
|
||||
subr = (unsigned) mips_r4000_KernGenException;
|
||||
else if (pcBetween(mips_r4000_UserGenException,mips_r4000_KernIntr))
|
||||
subr = (unsigned) mips_r4000_UserGenException;
|
||||
else if (pcBetween(mips_r4000_KernIntr, mips_r4000_UserIntr))
|
||||
subr = (unsigned) mips_r4000_KernIntr;
|
||||
|
||||
|
||||
else if (pcBetween(mips_r4000_UserIntr, mips_r4000_TLBMissException))
|
||||
subr = (unsigned) mips_r4000_UserIntr;
|
||||
else
|
||||
#endif /* CPU_R4000 */
|
||||
|
||||
|
||||
if (pcBetween(splx, wbflush))
|
||||
subr = (unsigned) splx;
|
||||
else if (pcBetween(cpu_switch, fuword))
|
||||
subr = (unsigned) cpu_switch;
|
||||
|
|
@ -1325,14 +1492,21 @@ specialframe:
|
|||
ra = 0;
|
||||
goto done;
|
||||
}
|
||||
else if (pc >= (unsigned)MachTLBMiss && pc < (unsigned)setsoftclock) {
|
||||
#ifdef notyet /* XXX FIXME: the order changed with merged locore */
|
||||
else if (pc >= (unsigned)MachUTLBMiss && pc < (unsigned)setsoftclock) {
|
||||
(*printfn)("<<locore>>");
|
||||
goto done;
|
||||
}
|
||||
#endif /* notyet */
|
||||
|
||||
/* check for bad PC */
|
||||
if (pc & 3 || pc < 0x80000000 || pc >= (unsigned)edata) {
|
||||
(*printfn)("PC 0x%x: not in kernel\n", pc);
|
||||
(*printfn)("PC 0x%x: not in kernel space\n", pc);
|
||||
ra = 0;
|
||||
goto done;
|
||||
}
|
||||
if (!pcBetween(start, (unsigned) edata)) {
|
||||
(*printfn)("PC 0x%x: not in kernel text\n", pc);
|
||||
ra = 0;
|
||||
goto done;
|
||||
}
|
||||
|
|
@ -1356,7 +1530,9 @@ specialframe:
|
|||
* Jump here for locore entry pointsn for which the preceding
|
||||
* function doesn't end in "j ra"
|
||||
*/
|
||||
#if 0
|
||||
stackscan:
|
||||
#endif
|
||||
/* scan forwards to find stack size and any saved registers */
|
||||
stksize = 0;
|
||||
more = 3;
|
||||
|
|
@ -1482,10 +1658,23 @@ static struct { void *addr; char *name;} names[] = {
|
|||
Name(main),
|
||||
Name(interrupt),
|
||||
Name(trap),
|
||||
Name(MachKernGenException),
|
||||
Name(MachUserGenException),
|
||||
Name(MachKernIntr),
|
||||
Name(MachUserIntr),
|
||||
#ifdef pmax
|
||||
Name(am7990_meminit),
|
||||
#endif
|
||||
#ifdef CPU_R3000
|
||||
Name(mips_r2000_KernGenException),
|
||||
Name(mips_r2000_UserGenException),
|
||||
Name(mips_r2000_KernIntr),
|
||||
Name(mips_r2000_UserIntr),
|
||||
#endif /* CPU_R3000 */
|
||||
|
||||
#ifdef CPU_R4000
|
||||
Name(mips_r4000_KernGenException),
|
||||
Name(mips_r4000_UserGenException),
|
||||
Name(mips_r4000_KernIntr),
|
||||
Name(mips_r4000_UserIntr),
|
||||
#endif /* CPU_R4000 */
|
||||
|
||||
Name(splx),
|
||||
Name(idle),
|
||||
Name(cpu_switch),
|
||||
|
|
|
|||
Loading…
Reference in New Issue