keeping track of where the kernel lives in K0SEG. Place early data
structure allocation into an allocsys() function, like other ports, so
that it can be used to first calculate the amount of memory needed
for those data structures.
called anyway, but now at least the reason is documented).
- rearrange a few things to make it easier to add support for non-contigous
physical memory.
configured into the kernel, or when the platform is not supported.
Use the defopt'ed options, rather than NDEC_... and remove the needs-flag
hack that's existed for a while.
- fix _C_LABEL so that it actually works.
- make __RENAME use _C_LABEL.
- fix __RENAME so that it expects an unquoted argument.
- fix __indr_reference and __warn_references so that they
supply their own final semicolon.
- define __warn_references to nothing if not GNU C (required
by the way it's used).
The __warn_references semicolon change has to be made
so that __warn_references can be defined into nothing.
(A ; all by itself isn't a great idea.) The __indr_reference
change was made for consistency.
--entries / remove kernel entry from locore / reorganize vector entry
--code. Enables access to stack frames transitively w.r.t. palcode
--vectors, e.g. upward traceback works, inverting (possibly several)
--kernel vectors. Until now, all trackbacks ended at the first-reached
--instance of trap(), which was totally useless as there is no mystery
--to trap->panic->cpu_reboot
pseudo-device rnd # /dev/random and in-kernel generator
in config files.
o Add declaration to all architectures.
o Clean up copyright message in rnd.c, rnd.h, and rndpool.c to include
that this code is derived in part from Ted Tyso's linux code.
Only assembly version for i386 bswap16 and bswap32 for now (bswap64 uses
bswap32). Contribution of assembly versions of these are welcome.
Add byte-swapping of ext2fs metadata for big-endian systems.
Tested on i386 and sparc.
a function) which specifies how many lines will be skipped when scrolling
up when the bottom of the screen is reached. Dumb framebuffers skip 10
lines (as before) because the copies are s ... l ... o ... w, but it's
silly to skip 10 lines on VGA, since the copies are much faster, so we
only skip one in that case.
with large amounts of memory and not spew. This doesn't really replace
fixing this problem better later, but it works for now. Basically, if memory
is greater than 128MB, start upping the sizes of some maps.
msgbuf. Note that old 'dmesg' and 'syslogd' binaries will continue running,
though old 'dmesg' binaries will output a few bytes of junk at the start of
the buffer, and will miss a few bytes at the end of the buffer.
on EV56 and later processors that have the "amask BWX" bit clear. These
instructions will be used to implement non-swizzle bus access functions
on newer systems, such as the new AlphaStation 500s with EV56 and 21172
PCI chipsets.
See "Alpha Architecture Handbook, Version 3", DEC order number EC-QD2KB-TE.
* support chip clocks != COM_FREQ, by introducing sc_frequency (for the
mainline code) and adding a frequency parameter right after the rate
parameter to comcnattach() and com_kgdb_attach().
- Make com_isa and com_multi initialize sc_frequency to COM_FREQ.
- Make i386/machdep.c and alpha/dec_xxx.c call com*attach() with the freq.
parameter.
* supio_attach_args get two more fields: a sc_ipl and a sc_arg, both ints.
- com_supio uses the first for interupt establishment (all childs will, as
soon as they exist) and the 2nd for sc_frequency.
- drsupio passes sc_ipl alway as 5, and for the "com"s, sc_arg as 16*115200
- hyper will pass sc_ipl as 6, and sc_arg as 16 * 460800
- Fix a few bugs in the software single-stepping support code, where
VMS PALcode ops were being checked, rather than OSF/1 PALcode ops,
causing erroneous results in the "exception return" and "unconditional
branch" predicates.
- Add the BWX instructions ("ldbu", "ldwu", "stb", "stw") to the
"load" and "store" predicates.
easier to add instructions that the disassembler doesn't know about
(the opcode subfunction number is now printed).
- Add the "amask" and "implver" operate subfunctions.
- Add the "ldbu", "ldwu", "stb", and "stw" major opcodes (BWX instructions).
An IMB intruction must be executed after software or I/O devices
write into the instruction stream or modify the instruction
stream virtual address mapping, and before the new value is
fetched as an instruction.
We were missing calls to IMB after mappings were changed, which caused
systems with large I-caches (e.g. my AlphaStation 500) to fail miserably
when mapping in new pages of program text, or when context switching
(I couldn't even get the shell from init!).
reads. This is necessary because of newer AlphaStation firmware doing
the Wrong Thing with target aborts behind PCI-PCI bridges, much like they
do the Wrong Thing with master aborts. Reported by Matthias Drochner.
PCI master aborts as eb164 firmware, so use the same workaround mechanism
on all system types (clear error register's master abort bit, and check
it after accessing configuration space), not just eb164's.
This also fixes a bug on eb164's - when making the Alpha port compile
again, I made an error that caused this to not be used on eb164 systems,
either. Thanks to Matt Jacob for pointing out this goof.
such code for Mach 3's Alpha port. Initially reworked for NetBSD/alpha
by Chris Demetriou, and then heavily hacked on by me. Works, but is still
a little rough around the edges. Known problems:
- Error recovery could be improved a bit.
- Back traces don't work.
- Single-stepping can be flaky, at times. (Alpha doesn't have hardware
support for single-stepping, and I'm not entirely convinced the
MI DDB software-emulated single-stepping logic is 100% correct.)
- Logic for when to drop into DDB needs some improvement.
(II-B) 2-33 of the Alpha AXP Architecture Reference Manual, Second Edition:
* rdps - Read Processor Status, needed by spl* functions.
* cflush - Cache Flush
* rdval - Read System Value
* wripir - Write Interprocessor Interrupt Request
* wrval - Write System Value
cflush, rdval, wripir, and wrval are used in multi-processor environments.
don't expect/provide pci_decompose_tag to be a MI, public function. It
wasn't intended to be to begin with, and uses of it (e.g. the one in the
'de' driver) are quite likely to be incorrect.
passing them a proc *, which encapsulates all of the information necessary
to activate an address space.
- Garbage-collect pmap->pm_stchanged; it's not really used for anything.
passing them a proc *, which encapsulates all of the information necessary
to activate an address space.
- Garbage-collect pmap->pm_stchanged; it's not really used for anything.
- Marco-ize the 3 instructions that actually switch to the new process
context.
- Unify (except for the pmap_deactivate() call) the NEW_PMAP and not-NEW_PMAP
versions of cpu_switch(), and clean up some comments.
- Tidy up the not-NEW_PMAP bits of switch_exit().
Also, put the cpu_decl()s in cpuconf.h, so that platform support files
can pull in the prototypes from there, and pull in options for those
systems for which there is code in the source tree.
(currently only CD-ROM drives on i386). The sys/dev/scsipi system provides 2
busses to which devices can attach (scsibus and atapibus). This needed to
change some include files and structure names in the low level scsi drivers.
packets. It's not clear whether latency will be affected much. It could be.
However, for the time being, getting full rates out of HIPPI or SCSI are what
interests us at NASA, so we'll hew to this bias.
at least 8-). Add structure offssets for structure members, so we
know how much space we're using. Make the version in the bootinfo
structure be a u_long, so there's no implicit padding in the structure.
Add a few more pointers to the bootinfo v1 structure, which will all
be set to NULL for now.
- Allow BUGCHK and BPT instruction faults in kernel mode if DDB is enabled,
since they are used to invoke the debugger.
- Add a comment about how we'd like to invoke DDB on a trap panic condition,
in a perfect world.
pointer to boot program's bootinfo structure. If the bootinfo magic
matches, save a copy of the bootinfo structure, and use it to determine
booted kernel name, the boot flags, and the location of the kernel symbol
table. If the magic number does not match, revert to the old method
of finding this information (sans symbol table info).
- Add some additonal DDB glue.
was sent to developers, but will eventually become a man page or
something), i noticed a few in various names:
(1) _map and _alloc should take a flags argument, rather than a
'cacheable' boolean.
(2) BUS_BARRIER_* flags should be BUS_SPACE_BARRIER_*.
(3) bus_space_copy_* should be bus_space_copy_region_* for consistency
with other region ops.
Fix all of these (in a backward-compatible way, at least for now). Redefine
internal usees of those names to use the new names. Also, while at it,
clean up the copy functions (remove unnecessary variables) and make sure
that they and other functions conform to the spec.
don't assume that the names/values to be put into defines in assym.h
start with the first .ascii in the assembler file; look for the array
start symbol, instead.
* Move clockvar.h (header file for generic clock code) to sys/dev/dec.
* Move if_le_dec.c with DEC padded LANCE-dma (pmax/pmax, ioasic, vax 3400)
to sys/dev/dec. Remove from sys/dev/tc.
* Declare attribute le_dec_subr in /sys/dev/dec/files.dec,
use if_le_dec.c when it's defined.
* Move IOCTL asic declaration from pmax and Alpha MD machine
files to sys/dev/tc/files.tc.
* move TurboChannel and ioasic if_le attachments from pmax and Alpha machine
config files to /sys/dev/tc/files.tc. Add le_dec_subr attribute.
* Add if_le_dec attribute to if_le_ibus (pmax ds3100 pmax) LANCE attachment.
into the 'argument variables' section.
* define variables for CPP and SIZE, defaulting to cpp and size, respectively.
* kill HOSTED_C*, since it's no longer used.
* use ${SIZE} rather than using 'size' directly, so it can be overridden for
cross-builds.
* generate assym.h via assym.s and an awk script.
>date: 1997/07/18 00:26:22; author: fvdl; state: Exp; lines: +10 -10
>Work around possible race condition with 2 drives on one controller
>in wd_get_parms. PR 3773, from Onno van der Linden (onno@simplex.nl)
S: ----------------------------------------------------------------------
the PCIA revision, and whether or not the STD I/O EISA bridge is
present. Decode, but don't bother displaying, the power consumption
information for each PCI slot.
behaviour of splhigh() was changed. The new behaviour raised the level to
IPL_HIGH if it was lower, but left it alone if the same or higher. Apparently
the firmware transfers to NetBSD with all interrupts blocked, or something
else blocks all interrupts (including machine checks) before the code
is really started. This meant that machine checks were blocked during
device probes, leading to false device probes _and_ an unexpected (and
therefore fatal) machine check at the spl0() after autoconfiguration.
(1) it was using 'max', and some functions use a variable
of that name (*sigh*), and
(2) that makes it easier to be a bit trickier, and only call
swpipl if changing the IPL.
compliation without DEBUG and/or DIAGNOSTIC happens without errors.
Note that all such initializations in the Alpha port are marked with "XXX
gcc -Wuninitialized". As far as I'm concerned, the one or two times
-Wuninitialized has saved me from problems are worth the (very minor) cost
involved with the initializations, esp. if it's noted why the
initializations are done. This was prompted by PR#3690, from Ted Lemon.
to be nailed down. From Ken Hornstein <kenh@cmf.nrl.navy.mil>, PR #3626,
slightly modified to allow wildcarded offsets.
- Blow away the cf->cf_unit check in sccmatch(); it's bogus.
Remove esp FLUSH when residual bytes are present in FIFO, the ncr53c9x
driver will flush when necessary. Doing the FLUSH here interferes
with DMA-enabled target selection.
It is configured (in config files) as 'awdc'/'awd', but shows up as
'wdc'/'wd', so that a minimal amount of code had to be modified to make
the name change work. This is only intended to be temporary, anyway.
(1) object code can be shared (where the hardware makes that possible), and
(2) so that the file names better describe the systems which use them. (the
pci_swiz* files are for machines whose PCI interfaces require address
"swizzling." Later, there will be probably be other sets, e.g. pci_bwx*
for machines whose chipsets can easily deal with the Alpha BWX extensions
when doing device accesses.)
arguments, so that a device can tell if its memory and I/O spaces are
enabled. The flags are cleared, depending on the contents of devices CSR
registers, in the machine-independent PCI bus code.
