40beab6ad6
If a lock is held do not spin in a read/write loop but just read the lock
...
until it is released. This is easier on the bus cache coherency logic.
1998-10-05 19:58:19 +00:00
550ee6b308
rename getprop routine to avoid conflict with the one in bsd_openprom.h
1998-10-05 07:13:07 +00:00
0bf5ff6ade
make this compile with DIAGNOSTIC again.
1998-10-01 21:26:55 +00:00
c5b8d42e66
Need 14 longs for jmp_buf now (sigcontext has 128-bit signal mask at the
...
end).
1998-10-01 03:28:11 +00:00
f382e91b5e
Add a field to identify the processor that has a process' FPU context.
1998-09-30 18:40:58 +00:00
4826aac9cf
Make the current FPU owner (`fpproc') a per-CPU entity. Unresolved issue
...
as yet: lazy FPU context switching may require co-operation from other
CPUs.
1998-09-30 18:38:57 +00:00
8c29324cc7
Kernel configuration with multi-processor support.
1998-09-27 15:10:25 +00:00
0a090af2c7
Add `ldstub()'.
1998-09-27 14:32:14 +00:00
e6ce8bcfc7
sparc spin lock functions.
1998-09-27 14:31:18 +00:00
0a1a6fb7e0
This file is no longer used
1998-09-26 20:51:45 +00:00
166c2a5fa5
fix typo
1998-09-26 20:15:59 +00:00
9f352b7e15
Stop all other CPUs upon entering a debugger.
1998-09-26 20:14:48 +00:00
01e64c640c
Implement mp_pause_cpus() and mp_resume_cpus(): pause and resume all
...
CPUs except the one running this code.
1998-09-26 20:13:56 +00:00
6ad3a051e8
mp_{pause,resume,halt}_cpu() prototypes.
1998-09-26 20:12:06 +00:00
8ddcd514a6
Use CPU start function in obp.c
1998-09-26 19:09:56 +00:00
fe1cf94b9f
Add wrappers for PROM's CPU start/stop functions.
1998-09-26 19:08:09 +00:00
a89a10c394
Add file obp.c
1998-09-26 19:06:47 +00:00
43c1cb852c
Move PROM interface prototypes into openprom.h
...
Use the `openprom_addr' structure for passing around physical addresses.
1998-09-26 18:20:19 +00:00
09a4cf6caa
Move PROM interface routines into their own file.
1998-09-26 18:15:34 +00:00
eb8de83739
`eccmemctl' inadvertently got into the `mandatory' list.
1998-09-25 11:40:16 +00:00
27569e4050
Initialize pointer to the boot CPU's interrupt register.
1998-09-24 20:38:43 +00:00
831354d6de
Add `intreg' cpuinfo offset.
1998-09-24 20:37:17 +00:00
58ab38cb69
Use per-CPU interrupt status register.
1998-09-23 11:07:28 +00:00
9eca565a37
Make cgsix_sbus & cgsix_obio dependent on their respective attribute.s
1998-09-23 08:49:46 +00:00
d6746389a4
The nmi_* routines are sun4m-only.
1998-09-23 08:44:51 +00:00
aa1cf01930
Express per-processor interrupt registers in a C structure as well.
1998-09-22 13:42:26 +00:00
bd37118769
Dup header.
1998-09-22 13:41:03 +00:00
eca50c1c33
Flush cache after diddling with trap vectors.
1998-09-22 13:40:08 +00:00
1186ba5102
Introduce a `flush entire cache' method.
1998-09-22 13:39:19 +00:00
5afb0e8bcb
Keep the per-processor interrupt status in the cpuinfo structure.
...
For now, map them to the fixed virtual addresses set up early in autoconf.c
1998-09-22 13:08:44 +00:00
c945760779
sign-extend some operand types which need it.
1998-09-22 05:40:14 +00:00
709360e3ce
Fill the `bpp' slot.
1998-09-21 21:13:51 +00:00
20f2898a0c
Merge sun4 and sun4c version of memerr() again.
1998-09-21 10:32:00 +00:00
af19654e85
We no longer need to access memerr() through a function pointer.
...
GC `cpumod' and `mmumod'.
1998-09-21 10:30:41 +00:00
c3b26811ac
We no longer need to access memerr() through a function pointer.
1998-09-21 10:29:20 +00:00
ec34e18063
Don't map sbus `registers' on sun4c (i.e. sbus @ mainbus); it's almost
...
certainly not the control space we want..
1998-09-20 20:08:52 +00:00
7a147080b8
Async arguments are no longer passed to the memory fault handler.
1998-09-20 20:01:15 +00:00
4bf750b7df
Add sun4m NMI handlers.
1998-09-20 20:00:09 +00:00
d0d9bb7669
Dedicate a pair of entry points to handling sun4m level 15 (NMI) interrupts.
...
Hardware NMIs are generated on various fault conditions that take place
asynchronously to the instruction stream. Software NMIs are going to be used
for inter-processor communications.
Get synchronous fault information separately from asynchronous fault
information. Do the former right after taking a memory fault trap and
store the values in temporary locations within the cpuinfo structure (XXX),
so we can unconditionally clear the sync fault status register after
MMU probe operations. This all is to work around a Hypersparc feature
which could lead to loss of fault information because of the fault
status register getting locked.
1998-09-20 19:54:48 +00:00
cd8dfa6798
Account for changes in struct cpuinfo & locore
1998-09-20 19:39:18 +00:00
4128057c52
Split memory fault status function into `synchronous' and `asynchronous'
...
versions.
1998-09-20 19:37:50 +00:00
2734182a74
Re-arrange the sun4m cases a bit.
...
Entry points no longer have async arguments.
1998-09-20 19:34:16 +00:00
c3e742adfb
Format string for SI register.
1998-09-20 19:31:37 +00:00
b6da06d637
Name fault registers more like they're referred to in various docs.
1998-09-20 19:29:10 +00:00
a1a94bc5fc
Use the expected name for the config attach structure.
1998-09-19 16:50:31 +00:00
0a6347a24d
Provide an error entry point like sbus and memory.
1998-09-19 16:45:43 +00:00
812eb8c1da
Add %b format strings.
1998-09-19 16:44:59 +00:00
25d48215a2
Map Sbus control registers.
1998-09-19 15:49:50 +00:00
8381b55bd7
Add a bunch of SBus control register definitions.
1998-09-19 15:48:55 +00:00
1bcd9d3bbb
Pass the children register space in the attach arguments.
1998-09-19 15:47:18 +00:00
ced4225429
Add `eccmemctl' device.
1998-09-18 20:19:12 +00:00
b3c7ebb7cd
Handle ECC memory control found on a number of machines.
...
Also defines an entry point for memory errors reported by module interrupts.
1998-09-18 20:18:10 +00:00
81d435b491
sigh.. put back non-garbage collectible `que' functions.
1998-09-18 08:07:08 +00:00
dcb541531a
Minor cosmetic change.
1998-09-17 02:33:06 +00:00
c006c7c0da
Sync w/ sendsig().
1998-09-17 02:30:02 +00:00
e5ea525b9f
Slight brain'o in last.
1998-09-17 02:26:26 +00:00
5bc9dafaee
Minor cosmetic change to sendsig().
1998-09-17 02:24:56 +00:00
59e5588098
Map the per-CPU counter registers into each cpu info area.
1998-09-16 13:39:48 +00:00
49b5114713
Make all cpu info structures accessible through an array `cpus[_MAXNCPUS]'.
1998-09-16 13:36:23 +00:00
543070847c
Can't afford a 1K buffer in the data segment.
1998-09-15 20:03:50 +00:00
0ad1257add
sub-arch protection.
1998-09-15 13:12:25 +00:00
fb38024157
Use `swap' to install page-table entries which is recommended practice
...
for MP configurarions.
1998-09-14 22:45:36 +00:00
1736bda754
Define `swap'.
1998-09-14 22:43:29 +00:00
0a46abfd42
Collect redundant code into cpu_setup().
1998-09-14 10:37:12 +00:00
b1b69e4195
Fix cache bit confusion in pmap_alloc_cpu().
1998-09-14 09:46:11 +00:00
ff383dc20d
Add compat_13_machdep.c
1998-09-13 20:34:34 +00:00
190e4c429d
Move compat_13 sigreturn() into its own file.
1998-09-13 20:33:33 +00:00
82d2ea3a70
Remove left-over SUNOS_COMPAT line.
1998-09-13 20:24:15 +00:00
9658554e18
Replace previous by something more complete.
1998-09-13 20:17:54 +00:00
9d9f22fa79
Signal handling changes: sunos compat gets its own sendsig(); sunos
...
sigreturn() == compat_13_sigreturn().
1998-09-13 20:07:54 +00:00
4e4f120db9
Update these for signal handling changes.
...
XXX Not tested yet.
1998-09-13 12:13:49 +00:00
90054fd502
New sigcontext.
1998-09-13 11:41:02 +00:00
ba67f63901
Sync function prototypes; remove unsed variables.
1998-09-13 11:34:04 +00:00
b8de221a1e
Pull in <sys/syscall.h> directly into locore.s
1998-09-13 11:12:36 +00:00
875bff538c
A few slight optimizations.
1998-09-12 19:50:59 +00:00
ad0f4a6fbb
Nuke `insqeu' and `remque'
1998-09-12 19:46:00 +00:00
8b7ee2cd89
Add hatching code for other CPUs.
1998-09-12 19:44:17 +00:00
e120fa4e14
Machinery to configure multiple CPUs. All CPUs found are spun up from the
...
auto-configuration cpu_attach() function using the firmware.
Currently, all CPUs except the one used to boot end up in an idle loop
in locore.
1998-09-12 15:33:40 +00:00
1b077ae1cd
Set cache control bits according to configured preference (if any).
1998-09-12 15:08:04 +00:00
097a922a9c
Add field holding the physical address of the MMU context table.
1998-09-12 14:12:49 +00:00
f390eccd7d
Add missing bits to per-CPU MMU table allocator routine.
1998-09-12 14:11:53 +00:00
cd0a5fe245
Define some bit-format strings.
1998-09-12 13:59:19 +00:00
18fbdfc2f8
Expose `v3' routines to everyone.
1998-09-12 13:34:38 +00:00
62ea009b0e
Update for signal handling changes.
1998-09-11 13:31:39 +00:00
f6b7ca884e
Use our brand new extent_alloc1() function to allocate cache-aligned
...
DVMA addresses.
1998-09-10 21:08:39 +00:00
70e641047c
In cpu_coredump(), use MID_MACHINE rather than MID_* (whatever it expands
...
to).
1998-09-09 11:17:24 +00:00
8abe0d6b1c
Adjust for the new "reaper" kernel thread: do not free the vmspace and
...
u-area in machine-dependent code. Instead, call exit2() to schedule
the reaper to free them for us, once it is safe to do so (i.e. we are
no longer running on the dead proc's vmspace and stack).
1998-09-09 00:07:48 +00:00
07b0821d4d
Adapt to cpuvar.h changes.
1998-09-07 23:04:28 +00:00
b09b9f7339
De-couple the CPU info structure from auto-configuration structures.
1998-09-07 23:02:40 +00:00
729d765620
Clear up some type confusion.
1998-09-07 22:56:46 +00:00
e21c0b3450
Need to cast sbus attach `prom_vaddrs' field.
1998-09-07 07:15:51 +00:00
c4c4e35608
Undo last change (we're passing the address of a pointer here).
1998-09-07 07:11:11 +00:00
457395fe53
Use the new "%b" format.
1998-09-06 21:38:36 +00:00
c529fe0888
memerr() is now an indirect call.
1998-09-06 21:18:59 +00:00
cda6fb7430
Sanitize memerr*() a bit.
1998-09-06 21:14:56 +00:00
484ce04810
The `address' field from the prom is really an unsigned 32-bit value.
...
Make it so.
1998-09-05 22:29:49 +00:00
5dc93bd9fe
Remove function naming conflict.
1998-09-05 22:15:51 +00:00
b39d7e33be
Assign my copyrights to TNF.
1998-09-05 15:42:41 +00:00
50909bd6d9
Assign copyright to TNF.
1998-09-05 15:28:08 +00:00
c9db84ecc9
distclean is a synonym for cleandir
1998-09-05 15:15:14 +00:00
pk