Sanitize memerr*() a bit.
This commit is contained in:
pk
parent
dccbf9bc96
commit
cda6fb7430
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@ -1,4 +1,4 @@
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/* $NetBSD: cpu.c,v 1.63 1998/07/26 23:35:34 pk Exp $ */
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/* $NetBSD: cpu.c,v 1.64 1998/09/06 21:14:57 pk Exp $ */
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/*
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* Copyright (c) 1996
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@ -70,6 +70,7 @@
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#include <sparc/sparc/cache.h>
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#include <sparc/sparc/asm.h>
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#include <sparc/sparc/cpuvar.h>
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#include <sparc/sparc/memreg.h>
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/* The following are used externally (sysctl_hw). */
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char machine[] = MACHINE; /* from <machine/param.h> */
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@ -383,7 +384,8 @@ struct module_info module_sun4 = {
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sun4_vcache_flush_region,
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sun4_vcache_flush_context,
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noop_pcache_flush_line,
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noop_pure_vcache_flush
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noop_pure_vcache_flush,
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memerr4
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};
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void
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@ -506,7 +508,8 @@ struct module_info module_sun4c = {
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sun4_vcache_flush_region,
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sun4_vcache_flush_context,
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noop_pcache_flush_line,
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noop_pure_vcache_flush
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noop_pure_vcache_flush,
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memerr4c
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};
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void
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@ -701,7 +704,8 @@ struct module_info module_ms1 = {
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noop_vcache_flush_region,
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noop_vcache_flush_context,
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noop_pcache_flush_line,
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noop_pure_vcache_flush
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noop_pure_vcache_flush,
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memerr4m
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};
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void
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@ -725,7 +729,9 @@ struct module_info module_ms2 = { /* UNTESTED */
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srmmu_vcache_flush_segment,
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srmmu_vcache_flush_region,
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srmmu_vcache_flush_context,
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noop_pcache_flush_line
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noop_pcache_flush_line,
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noop_pure_vcache_flush,
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memerr4m
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};
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@ -745,7 +751,8 @@ struct module_info module_swift = { /* UNTESTED */
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srmmu_vcache_flush_region,
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srmmu_vcache_flush_context,
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srmmu_pcache_flush_line,
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noop_pure_vcache_flush
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noop_pure_vcache_flush,
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memerr4m
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};
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void
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@ -781,7 +788,8 @@ struct module_info module_viking = { /* UNTESTED */
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noop_vcache_flush_region,
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noop_vcache_flush_context,
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viking_pcache_flush_line,
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noop_pure_vcache_flush
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noop_pure_vcache_flush,
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viking_memerr
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};
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void
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@ -859,7 +867,8 @@ struct module_info module_hypersparc = { /* UNTESTED */
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srmmu_vcache_flush_region,
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srmmu_vcache_flush_context,
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srmmu_pcache_flush_line,
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hypersparc_pure_vcache_flush
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hypersparc_pure_vcache_flush,
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hypersparc_memerr
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};
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void
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@ -905,7 +914,8 @@ struct module_info module_cypress = { /* UNTESTED */
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srmmu_vcache_flush_region,
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srmmu_vcache_flush_context,
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srmmu_pcache_flush_line,
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noop_pure_vcache_flush
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noop_pure_vcache_flush,
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memerr4m
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};
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/* Fujitsu Turbosparc */
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@ -925,7 +935,8 @@ struct module_info module_turbosparc = { /* UNTESTED */
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srmmu_vcache_flush_region,
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srmmu_vcache_flush_context,
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srmmu_pcache_flush_line,
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noop_pure_vcache_flush
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noop_pure_vcache_flush,
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memerr4m
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};
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void
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@ -1146,6 +1157,7 @@ getcpuinfo(sc, node)
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MPCOPY(vcache_flush_context);
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MPCOPY(pcache_flush_line);
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MPCOPY(pure_vcache_flush);
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MPCOPY(memerr);
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#undef MPCOPY
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return;
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}
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@ -1,4 +1,4 @@
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/* $NetBSD: cpuvar.h,v 1.7 1998/07/26 23:35:34 pk Exp $ */
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/* $NetBSD: cpuvar.h,v 1.8 1998/09/06 21:14:57 pk Exp $ */
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/*
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* Copyright (c) 1996 The NetBSD Foundation, Inc.
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@ -70,6 +70,8 @@ struct module_info {
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void (*vcache_flush_context)__P((void));
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void (*pcache_flush_line)__P((int, int));
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void (*pure_vcache_flush)__P((void));
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void (*memerr)__P((unsigned, u_int, u_int, u_int, u_int,
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struct trapframe *));
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};
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@ -188,6 +190,12 @@ struct cpu_softc {
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void (*mbusflush) __P((void));
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#endif
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/*
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* Memory error handler; parity errors, unhandled NMIs and other
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* unrecoverable faults end up here.
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*/
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void (*memerr)__P((unsigned, u_int, u_int, u_int, u_int,
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struct trapframe *));
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/* XXX: Add more here! */
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};
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@ -1,4 +1,4 @@
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# $NetBSD: genassym.cf,v 1.7 1998/09/05 15:28:09 christos Exp $
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# $NetBSD: genassym.cf,v 1.8 1998/09/06 21:14:56 pk Exp $
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#
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# Copyright (c) 1998 The NetBSD Foundation, Inc.
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@ -148,6 +148,7 @@ endif
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# CPU info structure
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define CPUINFO_FAULTSTATUS offsetof(struct cpu_softc, get_faultstatus)
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define CPUINFO_PURE_VCACHE_FLS offsetof(struct cpu_softc, pure_vcache_flush)
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define CPUINFO_MEMERR offsetof(struct cpu_softc, memerr)
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# PTE bits and related information
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define PG_W PG_W
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@ -1,4 +1,4 @@
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/* $NetBSD: memreg.c,v 1.25 1998/03/30 14:21:39 pk Exp $ */
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/* $NetBSD: memreg.c,v 1.26 1998/09/06 21:14:56 pk Exp $ */
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/*
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* Copyright (c) 1992, 1993
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@ -78,9 +78,8 @@ struct cfattach memreg_obio_ca = {
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sizeof(struct device), memregmatch_obio, memregattach_obio
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};
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void memerr __P((int, u_int, u_int, u_int, u_int));
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#if defined(SUN4M)
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static void hardmemerr4m __P((int, u_int, u_int));
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static void hardmemerr4m __P((u_int, u_int, u_int, u_int));
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#endif
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/*
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@ -184,66 +183,51 @@ memregattach_obio(parent, self, aux)
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* and take the page out of the page pool, but for now...
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*/
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void
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memerr(issync, ser, sva, aer, ava)
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int issync;
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u_int ser, sva, aer, ava;
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{
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#if defined(SUN4) || defined(SUN4C)
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char bits[64];
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#endif
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/* XXX Ugh! Clean up this switch and all the ifdefs! */
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switch (cputyp) {
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#if defined(SUN4)
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case CPU_SUN4:
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if (par_err_reg) {
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printf("mem err: ser=%s sva=0x%x\n",
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bitmask_snprintf(ser, SER_BITS, bits,
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sizeof(bits)), sva);
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printf("parity error register = %s\n",
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bitmask_snprintf(*par_err_reg, PER_BITS,
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bits, sizeof(bits)));
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} else {
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printf("mem err: ser=? sva=?\n");
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printf("parity error register not mapped yet!\n"); /* XXX */
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}
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#ifdef DEBUG
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callrom();
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#else
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panic("memory error"); /* XXX */
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#endif
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break;
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#endif /* Sun4 */
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void
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memerr4(issync, ser, sva, aer, ava, tf)
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unsigned int issync;
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u_int ser, sva, aer, ava;
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struct trapframe *tf; /* XXX - unused/invalid */
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{
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char bits[64];
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if (par_err_reg) {
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printf("mem err: ser=%s sva=0x%x\n",
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bitmask_snprintf(ser, SER_BITS, bits,
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sizeof(bits)), sva);
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printf("parity error register = %s\n",
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bitmask_snprintf(*par_err_reg, PER_BITS,
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bits, sizeof(bits)));
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} else {
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printf("mem err: ser=? sva=?\n");
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printf("parity error register not mapped yet!\n"); /* XXX */
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}
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panic("memory error"); /* XXX */
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}
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#endif /* SUN4 */
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#if defined(SUN4C)
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case CPU_SUN4C:
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printf("%ssync mem arr: ser=%s sva=0x%x ",
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issync ? "" : "a", bitmask_snprintf(ser, SER_BITS,
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bits, sizeof(bits)), sva);
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printf("aer=%s ava=0x%x\n", bitmask_snprintf(aer & 0xff,
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AER_BITS, bits, sizeof(bits)), ava);
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if (par_err_reg)
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printf("parity error register = %s\n",
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bitmask_snprintf(*par_err_reg, PER_BITS,
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bits, sizeof(bits)));
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#ifdef DEBUG
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callrom();
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#else
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panic("memory error"); /* XXX */
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#endif
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break;
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#endif /* Sun4C */
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void
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memerr4c(issync, ser, sva, aer, ava, tf)
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unsigned int issync;
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u_int ser, sva, aer, ava;
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struct trapframe *tf; /* XXX - unused/invalid */
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{
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char bits[64];
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#if defined(SUN4M)
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case CPU_SUN4M:
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hardmemerr4m(2, ser, sva);
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break;
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#endif /* Sun4M */
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default:
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break;
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}
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printf("%ssync mem arr: ser=%s sva=0x%x ",
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issync ? "" : "a", bitmask_snprintf(ser, SER_BITS,
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bits, sizeof(bits)), sva);
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printf("aer=%s ava=0x%x\n", bitmask_snprintf(aer & 0xff,
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AER_BITS, bits, sizeof(bits)), ava);
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if (par_err_reg)
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printf("parity error register = %s\n",
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bitmask_snprintf(*par_err_reg, PER_BITS,
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bits, sizeof(bits)));
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panic("memory error"); /* XXX */
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}
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#endif /* SUN4C */
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#if defined(SUN4M)
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@ -257,35 +241,25 @@ memerr(issync, ser, sva, aer, ava)
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*/
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static void
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hardmemerr4m(issync, fsr, faddr)
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int issync;
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u_int fsr, faddr;
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hardmemerr4m(sfsr, sfva, afsr, afva)
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u_int sfsr;
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u_int sfva;
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u_int afsr;
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u_int afva;
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{
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char bits[64];
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char *s, bits[64];
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printf("memory error: ");
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s = bitmask_snprintf(sfsr, SFSR_BITS, bits, sizeof(bits));
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printf("sfsr=%s sfva=0x%x\n", s, sfva);
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s = bitmask_snprintf(afsr, AFSR_BITS, bits, sizeof(bits));
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printf("; afsr=%s afva=0x%x%x\n", s,
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(afsr & AFSR_AFA) >> AFSR_AFA_RSHIFT, afva);
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if ((sfsr & SFSR_FT) == SFSR_FT_NONE && (afsr & AFSR_AFO) == 0)
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return;
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switch (issync) {
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case 1:
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if ((fsr & SFSR_FT) == SFSR_FT_NONE)
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return;
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printf("mem err: sfsr=%s sfaddr=0x%x\n", bitmask_snprintf(fsr,
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SFSR_BITS, bits, sizeof(bits)), faddr);
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break;
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case 0:
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if (!(fsr & AFSR_AFO))
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return;
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printf("async (HS) mem err: afsr=%s afaddr=0x%x physaddr=0x%x%x\n",
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bitmask_snprintf(fsr, AFSR_BITS, bits, sizeof(bits)),
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faddr, (fsr & AFSR_AFA) >> AFSR_AFA_RSHIFT, faddr);
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break;
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default: /* unknown; print both decodings*/
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printf("unknown mem err: if sync, fsr=%s fva=0x%x; ",
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bitmask_snprintf(fsr, SFSR_BITS, bits, sizeof(bits)),
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faddr);
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printf("if async, fsr=%s fa=0x%x pa=0x%x%x", bitmask_snprintf(fsr,
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AFSR_BITS, bits, sizeof(bits)), faddr,
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(fsr & AFSR_AFA) >> AFSR_AFA_RSHIFT, faddr);
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break;
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}
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panic("hard memory error");
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}
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@ -301,15 +275,14 @@ static int addroldtop = (int) 0xdeadbeef;
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static int oldtype = -1;
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void
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memerr4m(type, sfsr, sfva, afsr, afva, tf)
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register unsigned type;
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register u_int sfsr;
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register u_int sfva;
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register u_int afsr;
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register u_int afva;
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register struct trapframe *tf;
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hypersparc_memerr(type, sfsr, sfva, afsr, afva, tf)
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unsigned type;
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u_int sfsr;
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u_int sfva;
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u_int afsr;
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u_int afva;
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struct trapframe *tf;
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{
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char bits[64];
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if ((afsr & AFSR_AFO) != 0) { /* HS async fault! */
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@ -318,14 +291,27 @@ memerr4m(type, sfsr, sfva, afsr, afva, tf)
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afva);
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if (afva == addrold && (afsr & AFSR_AFA) == addroldtop)
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hardmemerr4m(0, afsr, afva);
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/* NOTREACHED */
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hardmemerr4m(sfsr, sfva, afsr, afva);
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oldtype = -1;
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addrold = afva;
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addroldtop = afsr & AFSR_AFA;
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return;
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}
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memerr4m(type, sfsr, sfva, afsr, afva, tf);
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}
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} else if (type == T_STOREBUFFAULT && cpuinfo.cpu_vers == 4) {
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void
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viking_memerr(type, sfsr, sfva, afsr, afva, tf)
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unsigned type;
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u_int sfsr;
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u_int sfva;
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u_int afsr;
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u_int afva;
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struct trapframe *tf;
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{
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if (type == T_STOREBUFFAULT) {
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/*
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* On Supersparc, we try to reenable the store buffers
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@ -335,8 +321,7 @@ memerr4m(type, sfsr, sfva, afsr, afva, tf)
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sfva);
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if (oldtype == T_STOREBUFFAULT || addrold == sfva)
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hardmemerr4m(1, sfsr, sfva);
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/* NOTREACHED */
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hardmemerr4m(sfsr, sfva, afsr, afva);
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oldtype = T_STOREBUFFAULT;
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addrold = sfva;
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@ -345,18 +330,34 @@ memerr4m(type, sfsr, sfva, afsr, afva, tf)
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sta(SRMMU_PCR, ASI_SRMMU,
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lda(SRMMU_PCR, ASI_SRMMU) | VIKING_PCR_SB);
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} else if (type == T_DATAFAULT && !(sfsr & SFSR_FAV)) { /* bizarre */
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/* XXX: Should handle better. See SuperSPARC manual pg. 9-35 */
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return;
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}
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memerr4m(type, sfsr, sfva, afsr, afva, tf);
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}
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void
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memerr4m(type, sfsr, sfva, afsr, afva, tf)
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unsigned type;
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u_int sfsr;
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u_int sfva;
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u_int afsr;
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u_int afva;
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struct trapframe *tf;
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{
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char bits[64];
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if (type == T_DATAFAULT && !(sfsr & SFSR_FAV)) { /* bizarre */
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/* XXX: Should handle better. See SuperSPARC manual pg. 9-35 */
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printf("warning: got data fault with no faulting address."
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" Ignoring.\n");
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if (oldtype == T_DATAFAULT)
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hardmemerr4m(1, sfsr, sfva);
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/* NOTREACHED */
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hardmemerr4m(sfsr, sfva, afsr, afva);
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oldtype = T_DATAFAULT;
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} else if (type == 0) { /* NMI */
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printf("ERROR: got NMI with sfsr=0x%s, sfva=0x%x, ",
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bitmask_snprintf(sfsr, SFSR_BITS, bits, sizeof(bits)),
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sfva);
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@ -364,20 +365,16 @@ memerr4m(type, sfsr, sfva, afsr, afva, tf)
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bitmask_snprintf(afsr, AFSR_BITS, bits, sizeof(bits)),
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||||
afva);
|
||||
if (oldtype == 0 || addrold == sfva)
|
||||
hardmemerr4m(1, sfsr, sfva); /* XXX: async? */
|
||||
/* NOTREACHED */
|
||||
hardmemerr4m(sfsr, sfva, afsr, afva);
|
||||
|
||||
oldtype = 0;
|
||||
addrold = sfva;
|
||||
} else /* something we don't know about?!? */ {
|
||||
printf("unknown fatal memory error, type=%d, sfsr=%s, sfva=0x%x",
|
||||
type, bitmask_snprintf(sfsr, SFSR_BITS, bits, sizeof(bits)),
|
||||
sfva);
|
||||
printf(", afsr=%s, afaddr=0x%x\n", bitmask_snprintf(afsr,
|
||||
AFSR_BITS, bits, sizeof(bits)), afva);
|
||||
panic("memerr4m");
|
||||
|
||||
} else {
|
||||
/* something we don't know about?!? */
|
||||
hardmemerr4m(sfsr, sfva, afsr, afva);
|
||||
}
|
||||
|
||||
return;
|
||||
}
|
||||
#endif /* 4m */
|
||||
#endif /* SUN4M */
|
||||
|
|
|
|||
|
|
@ -1,4 +1,4 @@
|
|||
/* $NetBSD: memreg.h,v 1.4 1996/03/31 22:52:13 pk Exp $ */
|
||||
/* $NetBSD: memreg.h,v 1.5 1998/09/06 21:14:56 pk Exp $ */
|
||||
|
||||
/*
|
||||
* Copyright (c) 1992, 1993
|
||||
|
|
@ -71,4 +71,8 @@ volatile u_int *par_err_reg; /* virtual address; NULL if not yet mapped */
|
|||
* sun4m ...
|
||||
*/
|
||||
struct trapframe;
|
||||
void memerr4 __P((unsigned, u_int, u_int, u_int, u_int, struct trapframe *));
|
||||
void memerr4c __P((unsigned, u_int, u_int, u_int, u_int, struct trapframe *));
|
||||
void memerr4m __P((unsigned, u_int, u_int, u_int, u_int, struct trapframe *));
|
||||
void viking_memerr __P((unsigned, u_int, u_int, u_int, u_int, struct trapframe *));
|
||||
void hypersparc_memerr __P((unsigned, u_int, u_int, u_int, u_int, struct trapframe *));
|
||||
|
|
|
|||
|
|
@ -1,4 +1,4 @@
|
|||
/* $NetBSD: trap.c,v 1.70 1998/08/21 14:13:56 pk Exp $ */
|
||||
/* $NetBSD: trap.c,v 1.71 1998/09/06 21:14:56 pk Exp $ */
|
||||
|
||||
/*
|
||||
* Copyright (c) 1996
|
||||
|
|
@ -861,7 +861,7 @@ mem_access_fault4m(type, sfsr, sfva, afsr, afva, tf)
|
|||
*/
|
||||
if ((afsr & AFSR_AFO) != 0 || type == T_STOREBUFFAULT ||
|
||||
(type == T_DATAFAULT && !(sfsr & SFSR_FAV))) {
|
||||
memerr4m(type, sfsr, sfva, afsr, afva, tf);
|
||||
(*cpuinfo.memerr)(type, sfsr, sfva, afsr, afva, tf);
|
||||
/*
|
||||
* If we get here, exit the trap handler and wait for the
|
||||
* trap to re-occur.
|
||||
|
|
|
|||
Loading…
Reference in New Issue