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Set cache control bits according to configured preference (if any).

This commit is contained in:
pk 1998-09-12 15:08:04 +00:00
parent 0aa47cd025
commit 1b077ae1cd
1 changed files with 4 additions and 2 deletions
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6
sys/arch/sparc/sparc/cache.c
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@ -1,4 +1,4 @@
/* $NetBSD: cache.c,v 1.36 1998/08/09 23:37:12 mrg Exp $ */
/* $NetBSD: cache.c,v 1.37 1998/09/12 15:08:04 pk Exp $ */
/*
* Copyright (c) 1996
@ -207,7 +207,9 @@ hypersparc_cache_enable()
sta(i, ASI_DCACHETAG, 0);
/* Enable write-back cache */
pcr |= (HYPERSPARC_PCR_CE | HYPERSPARC_PCR_CM);
pcr |= HYPERSPARC_PCR_CE;
if (CACHEINFO.c_vactype == VAC_WRITEBACK)
pcr |= HYPERSPARC_PCR_CM;
sta(SRMMU_PCR, ASI_SRMMU, pcr);
CACHEINFO.c_enabled = 1;