mkfs() do its job
- pass cpgflg=1 to mkfs() if the user provided cpg, =0 otherwise
- improve error reporting in ffs_write_file()
- only add superblock & block map slop for one cylinder group.
trying to calculate the number of required cylinder groups caused
too many problems when tweaking parameters for small file systems.
rely upon slop from minfree, and upon ffs_write_file() to complain
if the user is too aggressive about tweaking the parameters
frank's scheme, with one new twist: don't wait until we've totally run
out of free pages before committing, but instead notice when we've built
up a largish range of uncommitted pages and commit only the older half of
the range, which is likely to already be on disk on the server.
cores.
* For i80200 Step-A0 and Step-A1, set dcache_inv_range to
xscale_cache_purgeD_rng to work around a bug where a D$
"invalidate by address" doesn't properly clear the dirty
bits on the cache block (i80200 errata item #25).
* Track which process (XXX really, vmspace) owns the mapping. When
we sync the map, if the mapping doesn't belong to the kernel or to
the current process (XXX really, vmspace), then no cache fobbing
is necessary, since the cache is Wb-Inv'd on context switch (XXX need
to revisit this when we support FCSE).
* Be smarter about which cache operation we do when sync'ing the map:
- PREREAD -- Invalidate D$ (XXX right now, we actually do Wb-Inv)
- PREWRITE -- Write-back D$ (note, we do NOT invalidate here)
- PREREAD|PREWRITE -- Wb-Inv D$
More work is needed here. In particular, a version for CPUs
with write-through caches should be provided, to eliminate
the write-back steps (which are noops on such CPUs, but skipping
two branches would be nice).
pass. Rather than providing a whole slew of cache operations that
aren't ever used, distill them down to some useful primitives:
icache_sync_all Synchronize I-cache
icache_sync_range Synchronize I-cache range
dcache_wbinv_all Write-back and Invalidate D-cache
dcache_wbinv_range Write-back and Invalidate D-cache range
dcache_inv_range Invalidate D-cache range
dcache_wb_range Write-back D-cache range
idcache_wbinv_all Write-back and Invalidate D-cache,
Invalidate I-cache
idcache_wbinv_range Write-back and Invalidate D-cache,
Invalidate I-cache range
Note: This does not yet include an overhaul of the actual asm files
that implement the primitives. Instead, we've provided a safe default
for each CPU type, and the individual CPU types can now be optimized
one at a time.
A7000 kernels are obsolete now the ARM7500 detection is integrated. The
NC's however are not completely supported and should in the near future be
bootable with GENERIC/INSTALL too.
