Remove out-dated comment on pager pages + some other comment nit-pickings.
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@ -1,4 +1,4 @@
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/* $NetBSD: pmap.c,v 1.202 2002/01/24 16:50:34 pk Exp $ */
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/* $NetBSD: pmap.c,v 1.203 2002/01/25 17:50:33 pk Exp $ */
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/*
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* Copyright (c) 1996
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@ -231,8 +231,8 @@ static struct pvlist *pvhead(paddr_t pfn)
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* it is in the MMU, however; that is true iff pm_segmap[VA_VSEG(va)]
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* does not point to the invalid PMEG.
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*
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* In the older SPARC architectures (pre-4m), page tables are cached in the
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* MMU. The following discussion applies to these architectures:
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* In the older SPARC architectures (sun4/sun4c), page tables are cached in
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* the MMU. The following discussion applies to these architectures:
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*
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* If a virtual segment is valid and loaded, the correct PTEs appear
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* in the MMU only. If it is valid and unloaded, the correct PTEs appear
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@ -265,6 +265,7 @@ static struct pvlist *pvhead(paddr_t pfn)
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* for kernel entries; both are doubly linked queues headed by `mmuhd's.
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* The free list is a simple list, headed by a free list pointer.
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*
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*
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* In the sun4m architecture using the SPARC Reference MMU (SRMMU), three
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* levels of page tables are maintained in physical memory. We use the same
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* structures as with the 3-level old-style MMU (pm_regmap, pm_segmap,
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@ -303,8 +304,8 @@ int reginval; /* [4/3mmu] the invalid region number */
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/*
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* (sun4/4c)
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* A context is simply a small number that dictates which set of 4096
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* segment map entries the MMU uses. The Sun 4c has eight such sets.
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* These are alloted in an `almost MRU' fashion.
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* segment map entries the MMU uses. The Sun 4c has eight (SS1,IPC) or
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* sixteen (SS2,IPX) such sets. These are alloted in an `almost MRU' fashion.
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* (sun4m)
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* A context is simply a small number that indexes the context table, the
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* root-level page table mapping 4G areas. Each entry in this table points
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@ -521,7 +522,7 @@ void (*pmap_rmu_p) __P((struct pmap *, vaddr_t, vaddr_t, int, int));
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/* --------------------------------------------------------------*/
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/*
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* Next we have some Sun4m-specific routines which have no 4/4c
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* Next we have some sun4m-specific routines which have no 4/4c
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* counterparts, or which are 4/4c macros.
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*/
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@ -1141,7 +1142,7 @@ mmu_reservemon4_4c(nrp, nsp)
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#if defined(SUN4M)
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if (CPU_ISSUN4M) {
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panic("mmu_reservemon4_4c called on Sun4M machine");
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panic("mmu_reservemon4_4c called on sun4m machine");
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return;
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}
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#endif
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@ -1209,7 +1210,7 @@ mmu_reservemon4_4c(nrp, nsp)
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}
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#endif
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#if defined(SUN4M) /* Sun4M versions of above */
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#if defined(SUN4M) /* sun4m versions of above */
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u_long
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srmmu_bypass_read(paddr)
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@ -1265,7 +1266,7 @@ mmu_reservemon4m(kpmap)
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prom_vend = OPENPROM_ENDVADDR;
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/*
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* XXX: although the Sun4M can handle 36 bits of physical
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* XXX: although the sun4m can handle 36 bits of physical
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* address space, we assume that all these page tables, etc
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* are in the lower 4G (32-bits) of address space, i.e. out of I/O
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* space. Eventually this should be changed to support the 36 bit
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@ -2050,7 +2051,7 @@ ctx_alloc(pm)
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* Reload page and context tables to activate the page tables
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* for this context.
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*
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* The gap stuff isn't really needed in the Sun4m architecture,
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* The gap stuff isn't really needed in the sun4m architecture,
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* since we don't have to worry about excessive mappings (all
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* mappings exist since the page tables must be complete for
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* the mmu to be happy).
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@ -2174,10 +2175,6 @@ ctx_free(pm)
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* Walk the given pv list, and for each PTE, set or clear some bits
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* (e.g., PG_W or PG_NC).
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*
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* As a special case, this never clears PG_W on `pager' pages.
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* These, being kernel addresses, are always in hardware and have
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* a context.
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*
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* This routine flushes the cache for any page whose PTE changes,
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* as long as the process has a context; this is overly conservative.
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* It also copies ref and mod bits to the pvlist, on the theory that
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@ -2462,7 +2459,7 @@ pv_link4_4c(pv, pm, va, nc)
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#endif /* sun4, sun4c code */
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#if defined(SUN4M) /* Sun4M versions of above */
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#if defined(SUN4M) /* sun4m versions of above */
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/*
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* Walk the given pv list, and for each PTE, set or clear some bits
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* (e.g., PG_W or PG_NC).
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@ -3273,9 +3270,9 @@ pmap_bootstrap4_4c(nctx, nregion, nsegment)
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}
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#endif
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#if defined(SUN4M) /* Sun4M version of pmap_bootstrap */
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#if defined(SUN4M) /* sun4m version of pmap_bootstrap */
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/*
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* Bootstrap the system enough to run with VM enabled on a Sun4M machine.
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* Bootstrap the system enough to run with VM enabled on a sun4m machine.
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*
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* Switches from ROM to kernel page tables, and sets up initial mappings.
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*/
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@ -3312,7 +3309,7 @@ pmap_bootstrap4m(void)
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pmap_changeprot_p = pmap_changeprot4m;
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pmap_rmk_p = pmap_rmk4m;
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pmap_rmu_p = pmap_rmu4m;
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#endif /* defined Sun4/Sun4c */
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#endif /* defined SUN4/SUN4C */
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/*
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* p points to top of kernel mem
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@ -5855,7 +5852,7 @@ pmap_kremove4_4c(va, len)
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#endif /*sun4,4c*/
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#if defined(SUN4M) /* Sun4M versions of enter routines */
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#if defined(SUN4M) /* sun4m versions of enter routines */
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/*
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* Insert (MI) physical page pa at virtual address va in the given pmap.
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* NB: the pa parameter includes type bits PMAP_OBIO, PMAP_NC as necessary.
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@ -6781,7 +6778,7 @@ pmap_copy_page4_4c(src, dst)
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}
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#endif /* 4, 4c */
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#if defined(SUN4M) /* Sun4M version of copy/zero routines */
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#if defined(SUN4M) /* sun4m version of copy/zero routines */
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/*
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* Fill the given MI physical page with zero bytes.
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*
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