Commit Graph

285 Commits

Author SHA1 Message Date
jmcneill
dda9d480db Don't try to fixup PCI interrupt routing here; we're going to use ACPI to
do this for us instead. This prevents us from having to write chipset
specific support -- yay!
2006-06-19 02:30:35 +00:00
xtraeme
0b27695a68 Fix AMD 766 PMC entry. 2006-06-18 10:34:34 +00:00
xtraeme
9552b18ed1 Match the following products:
* SIS 962 and SIS 963
* AMD 766 and AMD 768
* ALI M1533

... syncing the code with openbsd.
2006-06-18 09:57:37 +00:00
xtraeme
c8a267e9c8 Sync with openbsd and apply fix from mickey@openbsd rev 1.5:
"It seems that via has 7, not 4 pci interrupt lines.
this fixes unmapped interrupts on some via-based boards."
2006-06-18 09:55:11 +00:00
mrg
911a6956b3 add another GCC4 uninitialised variable warning. it only shows with -O3. 2006-06-17 19:00:03 +00:00
jmcneill
6d05bd66ec Add powerhook to restore IRQ routing on resume. 2006-06-16 23:04:25 +00:00
jmcneill
686aef2890 Restore standard PCI configuration registers as well as PIRQX route control
registers on the PIIX4. This fixes up interrupt routing, and makes ACPI S3
suspend/resume work on my Sony Vaio.
2006-06-16 22:10:36 +00:00
kardel
09b51ec920 convert to timecounters (from branch simonb-timecounters) 2006-06-07 22:37:14 +00:00
christos
d05d5214fe Add another fixup entry Arthur Dimitrelis 2006-05-20 20:32:16 +00:00
christos
b70f726885 XXX: GCC uninitialized 2006-05-15 00:36:55 +00:00
jdc
0f4d7745b5 Match on subclass bridge/miscellaneous too.
Makes this work on an IBM Thinkpad T20.
OK'd jmcneill.
2006-05-06 20:44:29 +00:00
jmcneill
3ab993c834 Add SpeedStep SMI support for Intel PIIX4 based Pentium III processors. 2006-05-06 15:46:48 +00:00
xtraeme
4a4be4e854 Match the VIA VT8237 chipset, too. ok'ed by jmcneill 2006-03-17 19:52:35 +00:00
jmcneill
73e1e8a116 Add support for the VIA SMBus controller found on the VT8235 PCI-ISA
bridge.
2006-03-17 12:19:49 +00:00
dyoung
cafe884d2c Change macro names to avoid collisions:
BIT -> __BIT
BITS -> __BITS
2006-03-08 08:26:50 +00:00
dyoung
f66403a698 Move my bit-twiddling macros to libkern.h from my drivers, where
I had duplicated them.  Improve the macros' names.  Simplify their
implementation.

A brief description of each macro is below.

        BIT(n): Return a bitmask with bit m set, where the least
                significant bit is bit 0.

        BITS(m, n): Return a bitmask with bits m through n, inclusive,
                    set.  It does not matter whether m>n or m<=n.
                    The least significant bit is bit 0.

        A "bitfield" is a span of consecutive bits defined by a
        bitmask, where 1s select the bits in the bitfield.  SHIFTIN,
        SHIFTOUT, and SHIFTOUT_MASK help read and write bitfields
        from device registers.

        SHIFTIN(v, mask): Left-shift bits `v' into the bitfield
                          defined by `mask', and return them.  No
                          side-effects.

        SHIFTOUT(v, mask): Extract and return the bitfield selected
                           by `mask' from `v', right-shifting the
                           bits so that the rightmost selected bit
                           is at bit 0.  No side-effects.

        SHIFTOUT_MASK(mask): Right-shift the bits in `mask' so that
                             the rightmost non-zero bit is at bit
                             0.  This is useful for finding the
                             greatest unsigned value that a bitfield
                             can hold.  No side-effects.  Note that
                             SHIFTOUT_MASK(m) = SHIFTOUT(m, m).

Examples:

/*
 * Register definitions taken from the RFMD RF3000 manual.
 */
#define RF3000_GAINCTL          0x11            /* TX variable gain control */
#define         RF3000_GAINCTL_TXVGC_MASK       BITS(7, 2)
#define         RF3000_GAINCTL_SCRAMBLER        BIT(1)

/*
 * Shift the transmit power into the transmit-power field of the
 * gain-control register and write it to the baseband processor.
 */
atw_rf3000_write(sc, RF3000_GAINCTL,
    SHIFTIN(txpower, RF3000_GAINCTL_TXVGC_MASK));


/*
 * Register definitions taken from the ADMtek ADM8211 manual.
 *
 */
#define ATW_RXSTAT_OWN          BIT(31)         /* 1: NIC may fill descriptor */
/* ... */
#define ATW_RXSTAT_DA1          BIT(17)         /* DA bit 1, admin'd address */
#define ATW_RXSTAT_DA0          BIT(16)         /* DA bit 0, group address */
#define ATW_RXSTAT_RXDR_MASK    BITS(15,12)     /* RX data rate */
#define ATW_RXSTAT_FL_MASK      BITS(11,0)      /* RX frame length, last
                                                 * descriptor only
                                                 */

/* Extract the frame length from the Rx descriptor's
 * status field.
 */
len = SHIFTOUT(rxstat, ATW_RXSTAT_FL_MASK);
2006-03-08 00:24:06 +00:00
thorpej
a9beff9534 Use aprint_*(). 2006-02-19 14:59:22 +00:00
wiz
c6871c6fe4 Fix typo. 2006-02-17 06:57:18 +00:00
kochi
dd74d9277b add some more Intel LPC controllers 2006-02-16 08:47:16 +00:00
rpaulo
1a5af035b5 PR 32848: Nicolas Joly: typo 2006-02-16 01:08:09 +00:00
tron
cbb0e8c88b Share Intel hardware random number generator support between amd64 and
i386 port. This will benefit EM64T systems using Intel i9xx chipsets.
2006-02-12 18:16:01 +00:00
tron
bc6a85f1e9 Add hardware RNG support for Intel i925X chipset. 2006-02-12 16:37:31 +00:00
tron
0b49145263 Add hardware RNG support for Intel i945G/P and i955X chipsets. 2006-02-12 12:03:55 +00:00
christos
a39411c0d7 PR/32550: Michael Eriksson: No agp(4) support for i915 integrated graphics 2006-01-16 22:59:36 +00:00
xtraeme
37a21a6320 PCI Interrupt router support for VIA VT823[1357] Southbridges.
From OpenBSD.
2006-01-01 12:12:43 +00:00
perry
68da44823c u_intN_t -> uintN_t 2005-12-26 19:23:59 +00:00
rpaulo
30a362ab71 Add Intel 82801FBM ICH6M LPC Interface Bridge. There seem to be more
pci products missing, but I can only test this one.
2005-12-25 19:26:33 +00:00
perry
5f1c88d70d Remove leading __ from __(const|inline|signed|volatile) -- it is obsolete. 2005-12-24 20:06:46 +00:00
christos
95e1ffb156 merge ktrace-lwp. 2005-12-11 12:16:03 +00:00
xtraeme
279c037778 Attach to ICH6, ICH6-M and ICH7 Intel I/O Controller Hub.
Tested by seb with ICH6-M.
2005-12-04 12:20:31 +00:00
riz
2feefaad21 Move a little more under #if NGPIO > 0 2005-10-14 19:21:07 +00:00
drochner
e8d3f46495 kill gba_name in attach arg, specify interface attribute 2005-10-11 15:59:16 +00:00
drochner
69f432c06d -put gpio stuff inside #if NGPIO > 0
-kill gba_name in attach arg, specify interface attribute
2005-10-11 15:58:37 +00:00
riz
4b5421222c Add support for the gpio(4) framework to the elansc(4) system controller.
From Alexander Yurchenko (grange@openbsd), via OpenBSD.
Approved by jmcneill.
2005-10-07 15:59:49 +00:00
jmcneill
777503501e Add NS Geode PCI-ISA bridge GPIO support. 2005-09-27 02:42:44 +00:00
dyoung
ca9595c087 Suppress false 'WARNING: LAST RESET DUE TO WATCHDOG EXPIRATION!'
indications by clearing the WDOVF status flag for real.  The way
to do that is by writing 1, not 0.
2005-09-22 19:34:58 +00:00
dyoung
9a5e721b1e Cosmetic: s/writing writing/writing/ in comments. 2005-09-22 18:57:39 +00:00
dyoung
65eb42952c Add a driver for the watchdog timer on the AMD Geode SC1100. 2005-09-22 07:09:35 +00:00
fair
762e4993e8 The Cyrix cs5530 PCI host bridge does not have a broken latch on the i8254
clock core, unlike its predecessors the cs5510 and cs5520.

This reverses the setting from i386/1386/identcpu.c where it argueably should
not have been set in the first place, as argued in PR kern/25261

XXX One other thing: the i8254 latch compensation code is only found in
i386/isa/clock.c and NOT in i386/i386/microtime.S where it should also be.
2005-06-26 02:09:59 +00:00
sekiya
e45d20fa18 Remove unnecessary #includes. 2005-06-22 19:17:35 +00:00
sekiya
a3df0e92f9 It turns out that pci_addr_fixup() doesn't require PCIBIOS either. Decouple,
run it from mainbus_attach().
2005-06-22 00:58:48 +00:00
sekiya
087e54e558 Error out if obsolete fixup config directives are used.
Pointed out by wiz@
2005-06-21 11:46:25 +00:00
sekiya
0919f4d283 Rework the configuration scheme for PCI fixups:
* bus enumeration fixups are not PCIBIOS-specific, interrupt fixups are done
  by both PCIBIOS and ACPI.  The redundancy is very redundant.  Therefore,
  rename PCIBIOS_*_FIXUP to PCI_*_FIXUP, use PCI_INTR_FIXUP in place of
  ACPI_PCI_FIXUP, and change code refences to match.

* move the fixup defines from opt_pcibios.h to opt_pcifixup.h to reflect
  the above.

* fix up the PCI bus numbering in mainbus_attach(), right after we detect the
  configuration mode.  This probably renders the fixup in pcibios.c
  redundant -- but it should be harmless.

These changes make cardbus work in ACPI-only machines, when PCI_BUS_FIXUP
and PCI_INTR_FIXUP are defined.
2005-06-21 08:19:25 +00:00
sekiya
b7d7ac9d1a Fix uninitialized pointer problem in rbus code ... just because the kernel is
compiled with PCIBIOS_ADDR_FIXUP doesn't necessarily mean that
pcibios_addr_fixup() succeeded ...
2005-06-21 06:51:29 +00:00
sekiya
c354a96fdc Remove unneeded dependancy on PCIBIOS. 2005-06-20 11:04:46 +00:00
sekiya
d91bd456e7 pci_device_foreach(), pci_device_foreach_min(), pci_bridge_foreach(), and
pci_bridge_hook don't actually have any dependancies on PCIBIOS-specific code,
and they can be used to fixup PCI bus numbering in the absence of the BIOS.

To that end, decouple them from PCIBIOS.
2005-06-20 11:04:15 +00:00
atatat
df13e3579e Change the rest of the sysctl subsystem to use const consistently.
The __UNCONST macro is now used only where necessary and the RW macros
are gone.  Most of the changes here are consumers of the
sysctl_createv(9) interface that now takes a pair of const pointers
which used not to be.
2005-06-20 02:49:18 +00:00
christos
2514b28c3f PR/30387: Nicolas Joly: -current i386 GENERIC_LAPTOP kernel compilation failure 2005-05-31 17:51:49 +00:00
perry
35adf4031a de-__P, partially ANSIfy 2005-02-03 21:35:44 +00:00
drochner
9f4d33cf9a On my laptop, the SMI handler for the TCO interrupt appearently
re-tickles the watchdog, keeping the system from rebooting.
So enable the SMI for TCO only if the hardware reset is not available,
as a last resort.
2005-01-12 17:45:58 +00:00