Add support for the VIA SMBus controller found on the VT8235 PCI-ISA
bridge.
This commit is contained in:
jmcneill
parent
8d15124682
commit
73e1e8a116
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@ -1,4 +1,4 @@
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# $NetBSD: files.i386,v 1.282 2006/02/19 21:41:18 jmcneill Exp $
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# $NetBSD: files.i386,v 1.283 2006/03/17 12:19:49 jmcneill Exp $
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#
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# new style config file for i386 architecture
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#
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@ -208,7 +208,7 @@ file arch/i386/pci/pceb.c pceb
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# PCI-ISA bridges
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device pcib: isabus
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attach pcib at pci
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file arch/i386/pci/pcib.c pcib | ichlpcib | gscpcib
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file arch/i386/pci/pcib.c pcib | ichlpcib | gscpcib | viapcib
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# PCI-LPC bridges
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device ichlpcib: isabus, sysmon_wdog
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@ -219,6 +219,10 @@ device gscpcib: isabus, gpiobus
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attach gscpcib at pci
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file arch/i386/pci/gscpcib.c gscpcib
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device viapcib: isabus, i2cbus
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attach viapcib at pci
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file arch/i386/pci/viapcib.c viapcib
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# PCI-MCA bridges
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device pcmb: mcabus
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attach pcmb at pci
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@ -0,0 +1,703 @@
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/* $NetBSD: viapcib.c,v 1.1 2006/03/17 12:19:49 jmcneill Exp $ */
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/* $FreeBSD: src/sys/pci/viapm.c,v 1.10 2005/05/29 04:42:29 nyan Exp $ */
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/*-
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* Copyright (c) 2005, 2006 Jared D. McNeill <jmcneill@invisible.ca>
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions, and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. The name of the author may not be used to endorse or promote products
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* derived from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
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* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
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* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
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* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
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* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*/
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/*-
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* Copyright (c) 2001 Alcove - Nicolas Souchu
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*/
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#include <sys/cdefs.h>
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__KERNEL_RCSID(0, "$NetBSD: viapcib.c,v 1.1 2006/03/17 12:19:49 jmcneill Exp $");
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#include <sys/types.h>
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/device.h>
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#include <sys/proc.h>
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#include <machine/bus.h>
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#include <dev/pci/pcireg.h>
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#include <dev/pci/pcivar.h>
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#include <dev/pci/pcidevs.h>
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#include <dev/i2c/i2cvar.h>
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#include <i386/pci/viapcibreg.h>
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/*#define VIAPCIB_DEBUG*/
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#ifdef VIAPCIB_DEBUG
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#define DPRINTF(x) printf x
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#else
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#define DPRINTF(x)
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#endif
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struct viapcib_softc {
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struct device sc_dev;
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bus_space_tag_t sc_iot;
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bus_space_handle_t sc_ioh;
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struct i2c_controller sc_i2c;
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int sc_revision;
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struct simplelock sc_lock;
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};
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static int viapcib_match(struct device *, struct cfdata *, void *);
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static void viapcib_attach(struct device *, struct device *, void *);
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static int viapcib_clear(struct viapcib_softc *);
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static int viapcib_busy(struct viapcib_softc *);
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#define viapcib_smbus_read(sc, o) \
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bus_space_read_1((sc)->sc_iot, (sc)->sc_ioh, (o))
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#define viapcib_smbus_write(sc, o, v) \
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bus_space_write_1((sc)->sc_iot, (sc)->sc_ioh, (o), (v))
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#define VIAPCIB_SMBUS_TIMEOUT 10000
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static int viapcib_acquire_bus(void *, int);
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static void viapcib_release_bus(void *, int);
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static int viapcib_exec(void *, i2c_op_t, i2c_addr_t, const void *,
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size_t, void *, size_t, int);
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/* SMBus operations */
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static int viapcib_smbus_quick_write(void *, i2c_addr_t);
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static int viapcib_smbus_quick_read(void *, i2c_addr_t);
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static int viapcib_smbus_send_byte(void *, i2c_addr_t, uint8_t);
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static int viapcib_smbus_receive_byte(void *, i2c_addr_t,
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uint8_t *);
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static int viapcib_smbus_read_byte(void *, i2c_addr_t, uint8_t,
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int8_t *);
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static int viapcib_smbus_write_byte(void *, i2c_addr_t, uint8_t,
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int8_t);
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static int viapcib_smbus_read_word(void *, i2c_addr_t, uint8_t,
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int16_t *);
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static int viapcib_smbus_write_word(void *, i2c_addr_t, uint8_t,
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int16_t);
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static int viapcib_smbus_block_write(void *, i2c_addr_t, uint8_t,
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int, void *);
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static int viapcib_smbus_block_read(void *, i2c_addr_t, uint8_t,
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int, void *);
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/* XXX Should be moved to smbus layer */
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#define SMB_MAXBLOCKSIZE 32
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/* from arch/i386/pci/pcib.c */
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extern void pcibattach(struct device *, struct device *, void *);
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CFATTACH_DECL(viapcib, sizeof(struct viapcib_softc), viapcib_match,
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viapcib_attach, NULL, NULL);
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static int
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viapcib_match(struct device *parent, struct cfdata *match, void *opaque)
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{
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struct pci_attach_args *pa;
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pa = (struct pci_attach_args *)opaque;
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if (PCI_VENDOR(pa->pa_id) != PCI_VENDOR_VIATECH)
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return 0;
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switch (PCI_PRODUCT(pa->pa_id)) {
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case PCI_PRODUCT_VIATECH_VT8235:
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return 2; /* match above generic pcib(4) */
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}
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return 0;
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}
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static void
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viapcib_attach(struct device *parent, struct device *self, void *opaque)
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{
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struct viapcib_softc *sc;
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struct pci_attach_args *pa;
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pcireg_t addr, val;
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sc = (struct viapcib_softc *)self;
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pa = (struct pci_attach_args *)opaque;
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/* XXX Only the 8235 is supported for now */
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sc->sc_iot = pa->pa_iot;
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addr = pci_conf_read(pa->pa_pc, pa->pa_tag, SMB_BASE3);
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addr &= 0xfff0;
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if (bus_space_map(sc->sc_iot, addr, 8, 0, &sc->sc_ioh)) {
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printf(": failed to map SMBus I/O space\n");
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addr = 0;
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goto core_pcib;
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}
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simple_lock_init(&sc->sc_lock);
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val = pci_conf_read(pa->pa_pc, pa->pa_tag, SMB_HOST_CONFIG);
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if ((val & 1) == 0) {
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printf(": SMBus is disabled\n");
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addr = 0;
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/* XXX We can enable the SMBus here by writing 1 to
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* SMB_HOST_CONFIG, but do we want to?
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*/
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goto core_pcib;
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}
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#ifdef VIAPCIB_DEBUG
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switch (val & 0x0e) {
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case 8:
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printf(": interrupting at irq 9\n");
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break;
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case 0:
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printf(": interrupting at SMI#\n");
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break;
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default:
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printf(": interrupt misconfigured\n");
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break;
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}
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#endif /* !VIAPCIB_DEBUG */
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val = pci_conf_read(pa->pa_pc, pa->pa_tag, SMB_REVISION);
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sc->sc_revision = val;
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core_pcib:
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pcibattach(parent, self, opaque);
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if (addr != 0) {
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struct i2cbus_attach_args iba;
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uint8_t b;
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printf("%s: SMBus found at 0x%x (revision 0x%x)\n",
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sc->sc_dev.dv_xname, addr, sc->sc_revision);
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/* Disable slave function */
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b = viapcib_smbus_read(sc, SMBSLVCNT);
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viapcib_smbus_write(sc, SMBSLVCNT, b & ~1);
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memset(&sc->sc_i2c, 0, sizeof(sc->sc_i2c));
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iba.iba_name = "iic";
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#ifdef I2C_TYPE_SMBUS
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iba.iba_type = I2C_TYPE_SMBUS;
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#endif
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iba.iba_tag = &sc->sc_i2c;
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iba.iba_tag->ic_cookie = (void *)sc;
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iba.iba_tag->ic_acquire_bus = viapcib_acquire_bus;
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iba.iba_tag->ic_release_bus = viapcib_release_bus;
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iba.iba_tag->ic_exec = viapcib_exec;
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config_found(&sc->sc_dev, &iba, iicbus_print);
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}
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return;
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}
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static int
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viapcib_wait(struct viapcib_softc *sc)
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{
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int rv, timeout;
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uint8_t val;
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timeout = VIAPCIB_SMBUS_TIMEOUT;
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rv = 0;
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while (timeout--) {
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val = viapcib_smbus_read(sc, SMBHSTSTS);
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if (!(val & SMBHSTSTS_BUSY) && (val & SMBHSTSTS_INTR))
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break;
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DELAY(10);
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}
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if (timeout == 0)
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rv = EBUSY;
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if ((val & SMBHSTSTS_FAILED) || (val & SMBHSTSTS_COLLISION) ||
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(val & SMBHSTSTS_ERROR))
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rv = EIO;
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viapcib_clear(sc);
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return rv;
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}
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static int
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viapcib_clear(struct viapcib_softc *sc)
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{
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viapcib_smbus_write(sc, SMBHSTSTS,
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(SMBHSTSTS_FAILED | SMBHSTSTS_COLLISION | SMBHSTSTS_ERROR |
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SMBHSTSTS_INTR));
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DELAY(10);
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return 0;
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}
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static int
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viapcib_busy(struct viapcib_softc *sc)
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{
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uint8_t val;
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val = viapcib_smbus_read(sc, SMBHSTSTS);
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return (val & SMBHSTSTS_BUSY);
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}
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static int
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viapcib_acquire_bus(void *opaque, int flags)
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{
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struct viapcib_softc *sc;
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DPRINTF(("viapcib_i2c_acquire_bus(%p, 0x%x)\n", opaque, flags));
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sc = (struct viapcib_softc *)opaque;
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simple_lock(&sc->sc_lock);
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return 0;
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}
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static void
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viapcib_release_bus(void *opaque, int flags)
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{
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struct viapcib_softc *sc;
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DPRINTF(("viapcib_i2c_release_bus(%p, 0x%x)\n", opaque, flags));
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sc = (struct viapcib_softc *)opaque;
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simple_unlock(&sc->sc_lock);
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return;
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}
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static int
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viapcib_exec(void *opaque, i2c_op_t op, i2c_addr_t addr, const void *vcmd,
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size_t cmdlen, void *vbuf, size_t buflen, int flags)
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{
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struct viapcib_softc *sc;
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uint8_t cmd;
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int rv = -1;
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DPRINTF(("viapcib_exec(%p, 0x%x, 0x%x, %p, %d, %p, %d, 0x%x)\n",
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opaque, op, addr, vcmd, cmdlen, vbuf, buflen, flags));
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sc = (struct viapcib_softc *)opaque;
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if (op != I2C_OP_READ_WITH_STOP &&
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op != I2C_OP_WRITE_WITH_STOP)
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return -1;
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if (cmdlen > 0)
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cmd = *(uint8_t *)(__UNCONST(vcmd)); /* XXX */
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switch (cmdlen) {
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case 0:
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switch (buflen) {
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case 0:
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/* SMBus quick read/write */
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if (I2C_OP_READ_P(op))
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rv = viapcib_smbus_quick_read(sc, addr);
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else
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rv = viapcib_smbus_quick_write(sc, addr);
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return rv;
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case 1:
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/* SMBus send/receive byte */
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if (I2C_OP_READ_P(op))
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rv = viapcib_smbus_send_byte(sc, addr,
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*(uint8_t *)vbuf);
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else
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rv = viapcib_smbus_receive_byte(sc, addr,
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(uint8_t *)vbuf);
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return rv;
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default:
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return -1;
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}
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case 1:
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switch (buflen) {
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case 0:
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return -1;
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case 1:
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/* SMBus read/write byte */
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if (I2C_OP_READ_P(op))
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rv = viapcib_smbus_read_byte(sc, addr,
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cmd, (uint8_t *)vbuf);
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else
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rv = viapcib_smbus_write_byte(sc, addr,
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cmd, *(uint8_t *)vbuf);
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return rv;
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case 2:
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/* SMBus read/write word */
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if (I2C_OP_READ_P(op))
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rv = viapcib_smbus_read_word(sc, addr,
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cmd, (uint16_t *)vbuf);
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else
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rv = viapcib_smbus_write_word(sc, addr,
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cmd, *(uint16_t *)vbuf);
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return rv;
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default:
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/* SMBus read/write block */
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if (I2C_OP_READ_P(op))
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rv = viapcib_smbus_block_read(sc, addr,
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cmd, buflen, vbuf);
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else
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rv = viapcib_smbus_block_write(sc, addr,
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cmd, buflen, vbuf);
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return rv;
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}
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}
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return -1; /* XXX ??? */
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}
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static int
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viapcib_smbus_quick_write(void *opaque, i2c_addr_t slave)
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{
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struct viapcib_softc *sc;
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sc = (struct viapcib_softc *)opaque;
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DPRINTF(("viapcib_smbus_quick_write(%p, 0x%x)\n", opaque, slave));
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viapcib_clear(sc);
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if (viapcib_busy(sc))
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return EBUSY;
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viapcib_smbus_write(sc, SMBHSTADD, (slave & 0x7f) << 1);
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viapcib_smbus_write(sc, SMBHSTCNT, SMBHSTCNT_QUICK);
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if (viapcib_wait(sc))
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return EBUSY;
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viapcib_smbus_write(sc, SMBHSTCNT, SMBHSTCNT_QUICK | SMBHSTCNT_START);
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return viapcib_wait(sc);
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}
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static int
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viapcib_smbus_quick_read(void *opaque, i2c_addr_t slave)
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{
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struct viapcib_softc *sc;
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||||
sc = (struct viapcib_softc *)opaque;
|
||||
|
||||
DPRINTF(("viapcib_smbus_quick_read(%p, 0x%x)\n", opaque, slave));
|
||||
|
||||
viapcib_clear(sc);
|
||||
if (viapcib_busy(sc))
|
||||
return EBUSY;
|
||||
|
||||
viapcib_smbus_write(sc, SMBHSTADD, ((slave & 0x7f) << 1) | 1);
|
||||
viapcib_smbus_write(sc, SMBHSTCNT, SMBHSTCNT_QUICK);
|
||||
if (viapcib_wait(sc))
|
||||
return EBUSY;
|
||||
viapcib_smbus_write(sc, SMBHSTCNT, SMBHSTCNT_QUICK | SMBHSTCNT_START);
|
||||
|
||||
return viapcib_wait(sc);
|
||||
}
|
||||
|
||||
static int
|
||||
viapcib_smbus_send_byte(void *opaque, i2c_addr_t slave, uint8_t byte)
|
||||
{
|
||||
struct viapcib_softc *sc;
|
||||
|
||||
sc = (struct viapcib_softc *)opaque;
|
||||
|
||||
DPRINTF(("viapcib_smbus_send_byte(%p, 0x%x, 0x%x)\n", opaque,
|
||||
slave, byte));
|
||||
|
||||
viapcib_clear(sc);
|
||||
if (viapcib_busy(sc))
|
||||
return EBUSY;
|
||||
|
||||
viapcib_smbus_write(sc, SMBHSTADD, (slave & 0x7f) << 1);
|
||||
viapcib_smbus_write(sc, SMBHSTCMD, byte);
|
||||
viapcib_smbus_write(sc, SMBHSTCNT, SMBHSTCNT_SENDRECV);
|
||||
if (viapcib_wait(sc))
|
||||
return EBUSY;
|
||||
viapcib_smbus_write(sc, SMBHSTCNT,
|
||||
SMBHSTCNT_START | SMBHSTCNT_SENDRECV);
|
||||
|
||||
return viapcib_wait(sc);
|
||||
}
|
||||
|
||||
static int
|
||||
viapcib_smbus_receive_byte(void *opaque, i2c_addr_t slave, uint8_t *pbyte)
|
||||
{
|
||||
struct viapcib_softc *sc;
|
||||
int rv;
|
||||
|
||||
sc = (struct viapcib_softc *)opaque;
|
||||
|
||||
DPRINTF(("viapcib_smbus_receive_byte(%p, 0x%x, %p)\n", opaque,
|
||||
slave, pbyte));
|
||||
|
||||
viapcib_clear(sc);
|
||||
if (viapcib_busy(sc))
|
||||
return EBUSY;
|
||||
|
||||
viapcib_smbus_write(sc, SMBHSTADD, ((slave & 0x7f) << 1) | 1);
|
||||
viapcib_smbus_write(sc, SMBHSTCNT, SMBHSTCNT_SENDRECV);
|
||||
if (viapcib_wait(sc))
|
||||
return EBUSY;
|
||||
viapcib_smbus_write(sc, SMBHSTCNT,
|
||||
SMBHSTCNT_START | SMBHSTCNT_SENDRECV);
|
||||
|
||||
rv = viapcib_wait(sc);
|
||||
if (rv == 0)
|
||||
*pbyte = viapcib_smbus_read(sc, SMBHSTDAT0);
|
||||
|
||||
return rv;
|
||||
}
|
||||
|
||||
static int
|
||||
viapcib_smbus_write_byte(void *opaque, i2c_addr_t slave, uint8_t cmd,
|
||||
int8_t byte)
|
||||
{
|
||||
struct viapcib_softc *sc;
|
||||
|
||||
sc = (struct viapcib_softc *)opaque;
|
||||
|
||||
DPRINTF(("viapcib_smbus_write_byte(%p, 0x%x, 0x%x, 0x%x)\n", opaque,
|
||||
slave, cmd, byte));
|
||||
|
||||
viapcib_clear(sc);
|
||||
if (viapcib_busy(sc))
|
||||
return EBUSY;
|
||||
|
||||
viapcib_smbus_write(sc, SMBHSTADD, (slave & 0x7f) << 1);
|
||||
viapcib_smbus_write(sc, SMBHSTCMD, cmd);
|
||||
viapcib_smbus_write(sc, SMBHSTDAT0, byte);
|
||||
viapcib_smbus_write(sc, SMBHSTCNT, SMBHSTCNT_BYTE);
|
||||
if (viapcib_wait(sc))
|
||||
return EBUSY;
|
||||
viapcib_smbus_write(sc, SMBHSTCNT, SMBHSTCNT_START | SMBHSTCNT_BYTE);
|
||||
|
||||
return viapcib_wait(sc);
|
||||
}
|
||||
|
||||
static int
|
||||
viapcib_smbus_read_byte(void *opaque, i2c_addr_t slave, uint8_t cmd,
|
||||
int8_t *pbyte)
|
||||
{
|
||||
struct viapcib_softc *sc;
|
||||
int rv;
|
||||
|
||||
sc = (struct viapcib_softc *)opaque;
|
||||
|
||||
DPRINTF(("viapcib_smbus_read_byte(%p, 0x%x, 0x%x, %p)\n", opaque,
|
||||
slave, cmd, pbyte));
|
||||
|
||||
viapcib_clear(sc);
|
||||
if (viapcib_busy(sc))
|
||||
return EBUSY;
|
||||
|
||||
viapcib_smbus_write(sc, SMBHSTADD, ((slave & 0x7f) << 1) | 1);
|
||||
viapcib_smbus_write(sc, SMBHSTCMD, cmd);
|
||||
viapcib_smbus_write(sc, SMBHSTCNT, SMBHSTCNT_BYTE);
|
||||
if (viapcib_wait(sc))
|
||||
return EBUSY;
|
||||
viapcib_smbus_write(sc, SMBHSTCNT, SMBHSTCNT_START | SMBHSTCNT_BYTE);
|
||||
rv = viapcib_wait(sc);
|
||||
if (rv == 0)
|
||||
*pbyte = viapcib_smbus_read(sc, SMBHSTDAT0);
|
||||
|
||||
return rv;
|
||||
}
|
||||
|
||||
static int
|
||||
viapcib_smbus_write_word(void *opaque, i2c_addr_t slave, uint8_t cmd,
|
||||
int16_t word)
|
||||
{
|
||||
struct viapcib_softc *sc;
|
||||
|
||||
sc = (struct viapcib_softc *)opaque;
|
||||
|
||||
DPRINTF(("viapcib_smbus_write_word(%p, 0x%x, 0x%x, 0x%x)\n", opaque,
|
||||
slave, cmd, word));
|
||||
|
||||
viapcib_clear(sc);
|
||||
if (viapcib_busy(sc))
|
||||
return EBUSY;
|
||||
|
||||
viapcib_smbus_write(sc, SMBHSTADD, (slave & 0x7f) << 1);
|
||||
viapcib_smbus_write(sc, SMBHSTCMD, cmd);
|
||||
viapcib_smbus_write(sc, SMBHSTDAT0, word & 0x00ff);
|
||||
viapcib_smbus_write(sc, SMBHSTDAT1, (word & 0xff00) >> 8);
|
||||
viapcib_smbus_write(sc, SMBHSTCNT, SMBHSTCNT_WORD);
|
||||
if (viapcib_wait(sc))
|
||||
return EBUSY;
|
||||
viapcib_smbus_write(sc, SMBHSTCNT, SMBHSTCNT_START | SMBHSTCNT_WORD);
|
||||
|
||||
return viapcib_wait(sc);
|
||||
}
|
||||
|
||||
static int
|
||||
viapcib_smbus_read_word(void *opaque, i2c_addr_t slave, uint8_t cmd,
|
||||
int16_t *pword)
|
||||
{
|
||||
struct viapcib_softc *sc;
|
||||
int rv;
|
||||
int8_t high, low;
|
||||
|
||||
sc = (struct viapcib_softc *)opaque;
|
||||
|
||||
DPRINTF(("viapcib_smbus_read_word(%p, 0x%x, 0x%x, %p)\n", opaque,
|
||||
slave, cmd, pword));
|
||||
|
||||
viapcib_clear(sc);
|
||||
if (viapcib_busy(sc))
|
||||
return EBUSY;
|
||||
|
||||
viapcib_smbus_write(sc, SMBHSTADD, ((slave & 0x7f) << 1) | 1);
|
||||
viapcib_smbus_write(sc, SMBHSTCMD, cmd);
|
||||
viapcib_smbus_write(sc, SMBHSTCNT, SMBHSTCNT_WORD);
|
||||
if (viapcib_wait(sc))
|
||||
return EBUSY;
|
||||
viapcib_smbus_write(sc, SMBHSTCNT, SMBHSTCNT_START | SMBHSTCNT_WORD);
|
||||
|
||||
rv = viapcib_wait(sc);
|
||||
if (rv == 0) {
|
||||
low = viapcib_smbus_read(sc, SMBHSTDAT0);
|
||||
high = viapcib_smbus_read(sc, SMBHSTDAT1);
|
||||
*pword = ((high & 0xff) << 8) | (low & 0xff);
|
||||
}
|
||||
|
||||
return rv;
|
||||
}
|
||||
|
||||
static int
|
||||
viapcib_smbus_block_write(void *opaque, i2c_addr_t slave, uint8_t cmd,
|
||||
int cnt, void *data)
|
||||
{
|
||||
struct viapcib_softc *sc;
|
||||
int8_t *buf;
|
||||
int remain, len, i;
|
||||
int rv;
|
||||
|
||||
sc = (struct viapcib_softc *)opaque;
|
||||
buf = (int8_t *)data;
|
||||
rv = 0;
|
||||
|
||||
DPRINTF(("viapcib_smbus_block_write(%p, 0x%x, 0x%x, %d, %p)\n",
|
||||
opaque, slave, cmd, cnt, data));
|
||||
|
||||
viapcib_clear(sc);
|
||||
if (viapcib_busy(sc))
|
||||
return EBUSY;
|
||||
|
||||
remain = cnt;
|
||||
while (remain) {
|
||||
len = min(remain, SMB_MAXBLOCKSIZE);
|
||||
|
||||
viapcib_smbus_write(sc, SMBHSTADD, (slave & 0x7f) << 1);
|
||||
viapcib_smbus_write(sc, SMBHSTCMD, cmd);
|
||||
viapcib_smbus_write(sc, SMBHSTDAT0, len);
|
||||
i = viapcib_smbus_read(sc, SMBHSTCNT);
|
||||
/* XXX FreeBSD does this, but it looks wrong */
|
||||
for (i = 0; i < len; i++) {
|
||||
viapcib_smbus_write(sc, SMBBLKDAT,
|
||||
buf[cnt - remain + i]);
|
||||
}
|
||||
viapcib_smbus_write(sc, SMBHSTCNT, SMBHSTCNT_BLOCK);
|
||||
if (viapcib_wait(sc))
|
||||
return EBUSY;
|
||||
viapcib_smbus_write(sc, SMBHSTCNT,
|
||||
SMBHSTCNT_START | SMBHSTCNT_BLOCK);
|
||||
if (viapcib_wait(sc))
|
||||
return EBUSY;
|
||||
|
||||
remain -= len;
|
||||
}
|
||||
|
||||
return rv;
|
||||
}
|
||||
|
||||
static int
|
||||
viapcib_smbus_block_read(void *opaque, i2c_addr_t slave, uint8_t cmd,
|
||||
int cnt, void *data)
|
||||
{
|
||||
struct viapcib_softc *sc;
|
||||
int8_t *buf;
|
||||
int remain, len, i;
|
||||
int rv;
|
||||
|
||||
sc = (struct viapcib_softc *)opaque;
|
||||
buf = (int8_t *)data;
|
||||
rv = 0;
|
||||
|
||||
DPRINTF(("viapcib_smbus_block_read(%p, 0x%x, 0x%x, %d, %p)\n",
|
||||
opaque, slave, cmd, cnt, data));
|
||||
|
||||
viapcib_clear(sc);
|
||||
if (viapcib_busy(sc))
|
||||
return EBUSY;
|
||||
|
||||
remain = cnt;
|
||||
while (remain) {
|
||||
viapcib_smbus_write(sc, SMBHSTADD, ((slave & 0x7f) << 1) | 1);
|
||||
viapcib_smbus_write(sc, SMBHSTCMD, cmd);
|
||||
viapcib_smbus_write(sc, SMBHSTCNT, SMBHSTCNT_BLOCK);
|
||||
if (viapcib_wait(sc))
|
||||
return EBUSY;
|
||||
viapcib_smbus_write(sc, SMBHSTCNT,
|
||||
SMBHSTCNT_START | SMBHSTCNT_BLOCK);
|
||||
if (viapcib_wait(sc))
|
||||
return EBUSY;
|
||||
|
||||
len = viapcib_smbus_read(sc, SMBHSTDAT0);
|
||||
i = viapcib_smbus_read(sc, SMBHSTCNT);
|
||||
|
||||
len = min(len, remain);
|
||||
|
||||
/* FreeBSD does this too... */
|
||||
for (i = 0; i < len; i++) {
|
||||
buf[cnt - remain + i] =
|
||||
viapcib_smbus_read(sc, SMBBLKDAT);
|
||||
}
|
||||
|
||||
remain -= len;
|
||||
}
|
||||
|
||||
return rv;
|
||||
}
|
||||
|
|
@ -0,0 +1,68 @@
|
|||
/* $NetBSD: viapcibreg.h,v 1.1 2006/03/17 12:19:49 jmcneill Exp $ */
|
||||
|
||||
/*-
|
||||
* Copyright (c) 2005, 2006 Jared D. McNeill <jmcneill@invisible.ca>
|
||||
* All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
* 1. Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions, and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
* 3. The name of the author may not be used to endorse or promote products
|
||||
* derived from this software without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
|
||||
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
|
||||
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
|
||||
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
|
||||
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
|
||||
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
|
||||
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
|
||||
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
|
||||
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
|
||||
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
|
||||
* SUCH DAMAGE.
|
||||
*/
|
||||
|
||||
#ifndef _SYS_ARCH_I386_PCI_VIAPCIBREG_H
|
||||
#define _SYS_ARCH_I386_PCI_VIAPCIBREG_H
|
||||
|
||||
/* PCI configuration registers for SMB base address; chip dependent */
|
||||
#define SMB_BASE1 0x90
|
||||
#define SMB_BASE2 0x80
|
||||
#define SMB_BASE3 0xd0
|
||||
|
||||
#define SMB_HOST_CONFIG 0xd2
|
||||
#define SMB_REVISION (SMB_HOST_CONFIG + 4)
|
||||
|
||||
/* SMBus register offsets; from Linux and FreeBSD */
|
||||
#define SMBHSTSTS 0x00
|
||||
#define SMBHSTSTS_BUSY 0x01
|
||||
#define SMBHSTSTS_INTR 0x02
|
||||
#define SMBHSTSTS_ERROR 0x04
|
||||
#define SMBHSTSTS_COLLISION 0x08
|
||||
#define SMBHSTSTS_FAILED 0x10
|
||||
#define SMBHSLVSTS 0x01
|
||||
#define SMBHSTCNT 0x02
|
||||
#define SMBHSTCNT_QUICK 0x00
|
||||
#define SMBHSTCNT_KILL 0x02
|
||||
#define SMBHSTCNT_SENDRECV 0x04
|
||||
#define SMBHSTCNT_BYTE 0x08
|
||||
#define SMBHSTCNT_WORD 0x0c
|
||||
#define SMBHSTCNT_BLOCK 0x14
|
||||
#define SMBHSTCNT_START 0x40
|
||||
#define SMBHSTCMD 0x03
|
||||
#define SMBHSTADD 0x04
|
||||
#define SMBHSTDAT0 0x05
|
||||
#define SMBHSTDAT1 0x06
|
||||
#define SMBBLKDAT 0x07
|
||||
#define SMBSLVCNT 0x08
|
||||
#define SMBSHDWCMD 0x09
|
||||
#define SMBSLVEVT 0x0a
|
||||
#define SMBSLVDAT 0x0c
|
||||
|
||||
#endif /* !_SYS_ARCH_I386_PCI_VIAPCIBREG_H */
|
||||
Loading…
Reference in New Issue