The Cyrix cs5530 PCI host bridge does not have a broken latch on the i8254
clock core, unlike its predecessors the cs5510 and cs5520. This reverses the setting from i386/1386/identcpu.c where it argueably should not have been set in the first place, as argued in PR kern/25261 XXX One other thing: the i8254 latch compensation code is only found in i386/isa/clock.c and NOT in i386/i386/microtime.S where it should also be.
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@ -1,4 +1,4 @@
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/* $NetBSD: pcib.c,v 1.35 2005/02/03 21:35:44 perry Exp $ */
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/* $NetBSD: pcib.c,v 1.36 2005/06/26 02:09:59 fair Exp $ */
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/*-
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* Copyright (c) 1996, 1998 The NetBSD Foundation, Inc.
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@ -37,7 +37,7 @@
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*/
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#include <sys/cdefs.h>
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__KERNEL_RCSID(0, "$NetBSD: pcib.c,v 1.35 2005/02/03 21:35:44 perry Exp $");
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__KERNEL_RCSID(0, "$NetBSD: pcib.c,v 1.36 2005/06/26 02:09:59 fair Exp $");
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#include <sys/types.h>
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#include <sys/param.h>
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@ -156,6 +156,24 @@ pcibmatch(struct device *parent, struct cfdata *match, void *aux)
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*/
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return (0);
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}
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/*
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* The Cyrix cs5530 PCI host bridge does not have a broken
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* latch on the i8254 clock core, unlike its predecessors
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* the cs5510 and cs5520. This reverses the setting from
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* i386/1386/identcpu.c where it argueably should not have
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* been set in the first place. XXX
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*/
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case PCI_VENDOR_CYRIX:
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switch (PCI_PRODUCT(pa->pa_id)) {
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case PCI_PRODUCT_CYRIX_CX5530_PCIB:
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{
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extern int clock_broken_latch;
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clock_broken_latch = 0;
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}
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return(1);
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}
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break;
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}
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if (PCI_CLASS(pa->pa_class) == PCI_CLASS_BRIDGE &&
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