More clearly document the amazing lossage of this chip/core in an
expanded BUGS section. Sprinkle more mdoc macros in appropriate places.
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.\" $NetBSD: geodeide.4,v 1.2 2004/07/30 23:12:16 rumble Exp $
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.\" $NetBSD: geodeide.4,v 1.3 2005/06/26 01:50:52 fair Exp $
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.\"
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.\" Copyright (c) 2004 Manuel Bouyer.
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.\"
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.\" INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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.\" THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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.\"
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.Dd July 30, 2004
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.Dd June 25, 2005
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.Dt GEODEIDE 4
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.Os
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.Sh NAME
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.Sh DESCRIPTION
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The
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.Nm
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driver supports the AMD Geode CS5530A and SC1100 IDE controllers,
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driver supports the
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.Tn AMD
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Geode CS5530A and SC1100
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.Tn IDE
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controllers,
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and provides the interface with the hardware for the
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.Xr ata 4
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driver.
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.Pp
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The 0x0002 flag forces the
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.Nm
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driver to disable DMA on chipsets for which DMA would normally be
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enabled.
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driver to disable
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.Tn DMA
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on chipsets for which
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.Tn DMA
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would normally be enabled.
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This can be used as a debugging aid, or to work around
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problems where the IDE controller is wired up to the system incorrectly.
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problems where the
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.Tn IDE
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controller is wired up to the system incorrectly.
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.Sh SEE ALSO
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.Xr ata 4 ,
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.Xr atapi 4 ,
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@ -60,3 +69,29 @@ problems where the IDE controller is wired up to the system incorrectly.
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.Sh BUGS
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The SC1100 controller requires 4-byte aligned data transfers and
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cannot handle transfers of exactly 64 kilobytes.
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.Pp
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The CS5530 multifunction chip/core's
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.Tn IDE
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section claims to be capable of
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.Tn UDMA
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mode 2
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.Pq 33.3MB/s
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but in practice using that mode swamps the controller so badly that
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.Nm
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limits the
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.Tn UDMA
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negotiation to mode 1
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.Pq 25MB/s
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so that the other functions of this chip continue to work.
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.Pp
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The
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.Tn IDE DMA
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engine in the CS5530 can only do transfers on cache-line
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.Pq 16-byte
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boundaries.
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Attempts to perform
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.Tn DMA
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on any other alignment will crash the system.
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This problem may also exist in the SC1100 since the CS5530 was its
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direct predecessor, and it is not clear that National Semiconductor
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fixed any bugs in it.
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