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Don't try to fixup PCI interrupt routing here; we're going to use ACPI to 

do this for us instead. This prevents us from having to write chipset
specific support -- yay!
This commit is contained in:
jmcneill 2006-06-19 02:30:35 +00:00
parent 2c3d85cc29
commit dda9d480db
2 changed files with 4 additions and 41 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

27
sys/arch/i386/pci/ichlpcib.c
View File

@ -1,4 +1,4 @@
/* $NetBSD: ichlpcib.c,v 1.13 2006/06/16 23:04:25 jmcneill Exp $ */
/* $NetBSD: ichlpcib.c,v 1.14 2006/06/19 02:30:35 jmcneill Exp $ */
/*-
* Copyright (c) 2004 The NetBSD Foundation, Inc.
@ -46,7 +46,7 @@
*/
#include <sys/cdefs.h>
__KERNEL_RCSID(0, "$NetBSD: ichlpcib.c,v 1.13 2006/06/16 23:04:25 jmcneill Exp $");
__KERNEL_RCSID(0, "$NetBSD: ichlpcib.c,v 1.14 2006/06/19 02:30:35 jmcneill Exp $");
#include <sys/types.h>
#include <sys/param.h>
@ -78,7 +78,6 @@ struct lpcib_softc {
/* Power management */
void *sc_powerhook;
struct pci_conf_state sc_pciconf;
pcireg_t sc_pirq[8];
};
static int lpcibmatch(struct device *, struct cfdata *, void *);
@ -178,32 +177,10 @@ lpcib_powerhook(int why, void *opaque)
switch (why) {
case PWR_SUSPEND:
pci_conf_capture(pc, tag, &sc->sc_pciconf);
/* capture PIRQ routing control registers */
sc->sc_pirq[0] = pci_conf_read(pc, tag, LPCIB_PCI_PIRQA_ROUT);
sc->sc_pirq[1] = pci_conf_read(pc, tag, LPCIB_PCI_PIRQB_ROUT);
sc->sc_pirq[2] = pci_conf_read(pc, tag, LPCIB_PCI_PIRQC_ROUT);
sc->sc_pirq[3] = pci_conf_read(pc, tag, LPCIB_PCI_PIRQD_ROUT);
sc->sc_pirq[4] = pci_conf_read(pc, tag, LPCIB_PCI_PIRQE_ROUT);
sc->sc_pirq[5] = pci_conf_read(pc, tag, LPCIB_PCI_PIRQF_ROUT);
sc->sc_pirq[6] = pci_conf_read(pc, tag, LPCIB_PCI_PIRQG_ROUT);
sc->sc_pirq[7] = pci_conf_read(pc, tag, LPCIB_PCI_PIRQH_ROUT);
break;
case PWR_RESUME:
pci_conf_restore(pc, tag, &sc->sc_pciconf);
/* restore PIRQ routing control registers */
pci_conf_write(pc, tag, LPCIB_PCI_PIRQA_ROUT, sc->sc_pirq[0]);
pci_conf_write(pc, tag, LPCIB_PCI_PIRQB_ROUT, sc->sc_pirq[1]);
pci_conf_write(pc, tag, LPCIB_PCI_PIRQC_ROUT, sc->sc_pirq[2]);
pci_conf_write(pc, tag, LPCIB_PCI_PIRQD_ROUT, sc->sc_pirq[3]);
pci_conf_write(pc, tag, LPCIB_PCI_PIRQE_ROUT, sc->sc_pirq[4]);
pci_conf_write(pc, tag, LPCIB_PCI_PIRQF_ROUT, sc->sc_pirq[5]);
pci_conf_write(pc, tag, LPCIB_PCI_PIRQG_ROUT, sc->sc_pirq[6]);
pci_conf_write(pc, tag, LPCIB_PCI_PIRQH_ROUT, sc->sc_pirq[7]);
break;
}

18
sys/arch/i386/pci/piixpcib.c
View File

@ -1,4 +1,4 @@
/* $NetBSD: piixpcib.c,v 1.4 2006/06/17 19:00:03 mrg Exp $ */
/* $NetBSD: piixpcib.c,v 1.5 2006/06/19 02:30:35 jmcneill Exp $ */
/*-
* Copyright (c) 2004, 2006 The NetBSD Foundation, Inc.
@ -43,7 +43,7 @@
*/
#include <sys/cdefs.h>
__KERNEL_RCSID(0, "$NetBSD: piixpcib.c,v 1.4 2006/06/17 19:00:03 mrg Exp $");
__KERNEL_RCSID(0, "$NetBSD: piixpcib.c,v 1.5 2006/06/19 02:30:35 jmcneill Exp $");
#include <sys/types.h>
#include <sys/param.h>
@ -77,8 +77,6 @@ struct piixpcib_softc {
void *sc_powerhook;
struct pci_conf_state sc_pciconf;
pcireg_t sc_pirqrc[4];
};
static int piixpcibmatch(struct device *, struct cfdata *, void *);
@ -166,21 +164,9 @@ piixpcib_powerhook(int why, void *opaque)
switch (why) {
case PWR_SUSPEND:
pci_conf_capture(pc, tag, &sc->sc_pciconf);
/* capture PIRQX route control registers */
sc->sc_pirqrc[0] = pci_conf_read(pc, tag, PIIX4_PIRQRCA);
sc->sc_pirqrc[1] = pci_conf_read(pc, tag, PIIX4_PIRQRCB);
sc->sc_pirqrc[2] = pci_conf_read(pc, tag, PIIX4_PIRQRCC);
sc->sc_pirqrc[3] = pci_conf_read(pc, tag, PIIX4_PIRQRCD);
break;
case PWR_RESUME:
pci_conf_restore(pc, tag, &sc->sc_pciconf);
/* restore PIRQX route control registers */
pci_conf_write(pc, tag, PIIX4_PIRQRCA, sc->sc_pirqrc[0]);
pci_conf_write(pc, tag, PIIX4_PIRQRCB, sc->sc_pirqrc[1]);
pci_conf_write(pc, tag, PIIX4_PIRQRCC, sc->sc_pirqrc[2]);
pci_conf_write(pc, tag, PIIX4_PIRQRCD, sc->sc_pirqrc[3]);
break;
}