Commit Graph

849 Commits

Author SHA1 Message Date
joerg
3ce4c44911 Fix header guard. 2013-07-05 02:11:59 +00:00
macallan
9c39c70523 we can read the timebase register as a 64bit chunk when _ARCH_PPC64 is defined,
not necessarily LP64
2013-04-25 00:08:48 +00:00
christos
caafbf4e1b add missing SSIZE_MIN 2013-04-11 00:57:34 +00:00
kiyohara
b73bbcbf2e More stack for ibm4xx slow machines. 2013-01-29 15:47:16 +00:00
kiyohara
f870b0a58c Support 16bits over stack size. 2013-01-29 15:45:43 +00:00
matt
f82647e665 Make the 85xx get closer to spinning up the secondary CPUs.
Don't assume TLB1[0] has the mapping for VA/PA 0.
Make sure the TLB1 entries that map physical memory have the M (memory
coherent) bit set.
2012-11-27 19:24:45 +00:00
christos
72708a99b3 provide _ENTRY(x) because some code needs it. 2012-11-25 01:10:37 +00:00
chs
cbab9cadce split device_t/softc for all remaining drivers.
replace "struct device *" with "device_t".
use device_xname(), device_unit(), etc.
2012-10-27 17:17:22 +00:00
kiyohara
515e584834 Support Cache Protocol 'MEI' with MULTIPROCESSOR. 2012-10-20 14:42:15 +00:00
christos
e62c0b0fdf move common tlb stuff to uvm 2012-10-02 23:51:39 +00:00
mrg
d87a39703d increase powerpc NKMEMPAGES_MAX_DEFAULT to 256MB. remove the macppc
overrides that are now the same as the powerpc default.
2012-09-23 22:31:38 +00:00
matt
17674df3f2 Add support for _UC_TLSBASE. Make sure to preserve backwards compat for
programs built before TLS support was added.
2012-09-11 00:15:19 +00:00
matt
143ca138fb Add a machine splhist command to give (a incomplete) spl history.
(only the most recent are going to be accurate).

splraise(6) from 0 at 549214603
splraise(7) from 6 at 549214643 (+40)
splx(6) from 7 at 549214691 (+48)
splx(0) from 6 at 549214730 (+39)
2012-08-01 21:30:21 +00:00
matt
8c3b0a4f45 Export dump_trapframe. 2012-08-01 16:35:50 +00:00
matt
261130358b Fix a problem where the kernel could randomly reset due to a watchdog event.
When an exception happens, the srr0 (exception PC) was being saved in the
normal location of the current callframe.  This was fine except when the
routine was in its prologue after it had saved LR but had not yet updated the
stack pointer or when the routine was in its epilogue after it has restored
the stack pointer but not yet loaded the LR.  In either case this would cause
the LR to be corrupted (either running the routine forever or by branching
to itself forever).  Now we save and restore the contents of that memory
location so the corruption can't happen.
2012-08-01 16:19:42 +00:00
matt
0a110b1873 Fix some copy&paste bugs. 2012-08-01 00:45:18 +00:00
matt
bc80e11446 Add command line processing from uboot
bootm $loadaddr [opts] [device]
where opts is -[advqs] and device is the boot device.
cpu_rootconf will now wait a bit for devices to appear until the boot device
appears.
2012-07-29 21:39:43 +00:00
matt
927b8a6c6e Fix -fno-common fallout. 2012-07-28 23:08:56 +00:00
matt
75d1db6793 Fix -fno-common fallout. 2012-07-27 22:24:13 +00:00
matt
234c45d0cb Fix some -fno-common fallout 2012-07-27 22:13:58 +00:00
matt
d303a3d4ea Add ESDHC DCR definitions 2012-07-26 18:41:32 +00:00
matt
a162208b2f Add some more PVRs and SVRs 2012-07-18 20:46:36 +00:00
matt
c988344e70 Add P1025 support to the PCI truth tables.
P1025 only has two PCIe ports, not 3.
2012-07-18 19:38:26 +00:00
matt
0803c20a9e Define the MPC8XX traps 2012-07-18 16:44:52 +00:00
matt
c53bebd619 MPC8xx SPR defintions 2012-07-17 20:46:07 +00:00
matt
20c73c17d6 The ETSEC on the P1025 has been moved/split so the MDIO stayed in the same
place but each ETSEC has been split into two virtual halves (G0 and G1) and
each one has a new different base address.
For some reason, tsec1 connects to phy 2 and tsec2 connects to phy 1.
Adjust config file to match
2012-07-17 01:36:12 +00:00
matt
a8a82a563c Add support for the Freescale TWR-P1025 evaluation board and the P1025/P1016
QorIQ processors.  XXX tsec isn't working yet on the TWR-P1025.
2012-07-15 08:44:56 +00:00
matt
789d060691 Add some e500mc/e5500 machines. 2012-07-09 17:58:34 +00:00
matt
dd01d67e95 Allow the use of the full 4GB address space. 2012-07-09 17:55:15 +00:00
matt
d2df93c65d Use pmap_segtab_t 2012-07-09 17:48:31 +00:00
matt
7f99503816 More cleanup. Use a union (pmap_segtab) and a typedef (pmap_segtab_t). Add
more functionality from the mips pmap and try to make it more common to ease
the transition for mips in the future.
2012-07-09 17:45:22 +00:00
matt
283eda5a32 Add __HAVE_RAS support. Do it in userret. 2012-05-26 00:31:07 +00:00
matt
94a2d5c844 Add an KASSERT to check that PSL_PR is always set. 2012-05-17 16:21:45 +00:00
matt
12ca21c5bb Preserve some MACCFG2 bits 2012-05-07 23:04:22 +00:00
matt
1f81b2fdc7 Don't use global asm for __clang__ 2012-04-10 16:57:50 +00:00
matt
271a309329 Add e500_tlb_minimize prototype. 2012-03-29 15:45:06 +00:00
matt
20e78297f8 Add vsize_t to pmap_md_{un,}map_poolpage.
Add pmap_kvptefill prototype.
Slightly change pmap_bootstrap prototype.
2012-03-29 15:44:40 +00:00
christos
7484a2dbbe - Normalize inclusion protection (remove)
- Move CHAR_{MIN,MAX} to a common file.
- Fix broken comments
2012-03-28 17:03:27 +00:00
matt
9e3fcedeae Add CPU_EXECPROT sysctl so that atf can enable exec permission tests for
PPC Booke.
2012-03-16 07:41:54 +00:00
matt
46b7d7283d Export MIN_PAGE_SIZE and MAX_PAGE_SIZE for modular kernels. 2012-02-23 20:33:29 +00:00
matt
f326ce849e Restore back to double alignment. 2012-02-21 02:19:01 +00:00
matt
84b41e5d58 Change ALIGNBYTES to be AltiVec savvy 2012-02-21 02:09:35 +00:00
rmind
ad12c77015 Remove COMPAT_SA / KERN_SA. Welcome to 6.99.3!
Approved by core@.
2012-02-19 21:05:51 +00:00
macallan
a6d582eda0 make BATs >256MB work, now macppc works again on 745x CPUs as well
ok riz
2012-02-15 04:33:19 +00:00
matt
69545c610e When making BATU, use (BAT_XBL|BAT_BL) for the extended bat lengths. 2012-02-15 01:46:42 +00:00
matt
413fb4c3c5 Enable XBSEN and HIGHBAT for OEA 7455 and related CPUs.
The BAT entries now have a resolution of 8MB.  (Adjacent entries are merged
up to a total of 2GB per entry).
2012-02-01 05:25:57 +00:00
matt
2144269334 Use C89 function prototypes. 2012-02-01 02:02:07 +00:00
matt
ccd880d5ab Switch to using ANSI prototypes. 2012-01-30 23:34:58 +00:00
matt
c8f14b1af6 PowerPC wants 16-byte aligned stacks (for AltiVec). 2012-01-30 06:04:32 +00:00
christos
dd23e71080 Use and define ALIGN() ALIGN_POINTER() and STACK_ALIGN() consistently,
and avoid definining them in 10 different places if not needed.
2012-01-24 20:03:36 +00:00
joerg
e8bec33be1 Change CMSG_SPACE and CMSG_LEN to provide Integer Constant Expressions
again. This was changed in sys/socket.h r1.51 to work around fallout
from the IPv6 aux data migration. It broke the historic ABI on some
platforms. This commit restores compatibility for netbsd32 code on such
platforms and provides a template for future changes to the CMSG_*
alignment. Revert PCC/Clang workarounds in postfix and tmux.
2012-01-20 14:08:04 +00:00
phx
ab57155f50 Some PICs have the capability to define the interrupt's polarity (OpenPIC
for example). So the accepted interrupt types have been extended to:
- IST_EDGE_FALLING (which is the same as IST_EDGE)
- IST_EDGE_RISING (new)
- IST_LEVEL_LOW (is the same as IST_LEVEL)
- IST_LEVEL_HIGH (new)
Old code will continue to work without modification.
2012-01-14 19:35:58 +00:00
kiyohara
ea91035967 Remove white-spaces. 2011-12-13 11:03:51 +00:00
chs
c15c5cf4db avoid linker warnings with the new binutils by not forcing rump modules
to be soft-float.
2011-10-26 15:57:26 +00:00
christos
c9c18fa5a1 - Indent ifdefs, comment endif and else cpp tags
- Add missing END macro for LP64
- Make whitespace consistent
2011-10-26 01:46:11 +00:00
jym
325494fe33 Modify *ASSERTMSG() so they are now used as variadic macros. The main goal
is to provide routines that do as KASSERT(9) says: append a message
to the panic format string when the assertion triggers, with optional
arguments.

Fix call sites to reflect the new definition.

Discussed on tech-kern@. See
http://mail-index.netbsd.org/tech-kern/2011/09/07/msg011427.html
2011-09-27 01:02:33 +00:00
matt
1f2907ad40 First pass of the new PCI MSI/MSI ABI definitions. (return EOPNOTSUPP for
now).
2011-08-17 18:52:00 +00:00
matt
b9dc213bc8 Add some more DDR register definitions 2011-08-02 00:23:34 +00:00
matt
f2875a1c9c MPC8544 don't any onchip irqs of 20/21 2011-08-02 00:22:02 +00:00
dyoung
d181d57cd1 Enable new-style <sys/bus.h> on several PowerPC ports supporting PCI
buses.  Make non-inline implementations of bus_space(9) and bus_dma(9)
routines and move them to appropriate .c files.

This may leave amigappc in a bad state, sorry.  Fortunately, it will be
easy to repair by imitating the bus.h -> bus_{defs,funcs}.h split in
some other PowerPC port.
2011-07-17 23:23:53 +00:00
joerg
3eb244d801 Retire varargs.h support. Move machine/stdarg.h logic into MI
sys/stdarg.h and expect compiler to provide proper builtins, defaulting
to the GCC interface. lint still has a special fallback.
Reduce abuse of _BSD_VA_LIST_ by defining __va_list by default and
derive va_list as required by standards.
2011-07-17 20:54:30 +00:00
dyoung
9aff02ebc1 #include <sys/bus.h> instead of <machine/bus.h>. 2011-07-01 20:57:45 +00:00
dyoung
4ada7c5071 Add new files involved in the bus.h->bus_defs.h/bus_funcs.h split. 2011-07-01 17:28:55 +00:00
dyoung
59adf08e17 Per discussion at
<http://mail-index.netbsd.org/tech-kern/2010/04/02/msg007941.html>,
divide each machine's bus.h into bus_defs.h (constants & data types)
and bus_funcs.h (macro implementations of bus_space(9) routines and MD
prototypes).

Note that some bus_space(9) routines' implementation will move to .c
files from inline subroutines or macros in .h files.

I've only made the split for machine architectures where there is PCI.
All of the non-PCI-having architectures will require a similar split.

These #include files are not referenced by any (committed) Makefiles or
header files, yet.  Changes to Makefiles, to <sys/bus.h>, and to some
more machine-dependent files will dribble in before I throw the switch.
2011-07-01 17:09:58 +00:00
mrg
1566d50022 add GCC 4.5 support 2011-07-01 01:26:38 +00:00
matt
b4c4a0ac2c Add prototypes for lbc_* routines. 2011-06-30 04:45:38 +00:00
matt
c2d496ba0e Add LSOR register 2011-06-30 04:45:04 +00:00
matt
4a40b01453 Modify mapiodev to take a third argument indicating whether the space
should be prefetchable (true) or not (false).
2011-06-30 00:52:55 +00:00
matt
599d43de9d Add some e500 MP prototypes. 2011-06-29 06:01:33 +00:00
matt
9dcc0b6f65 Declare cpu_hatch_data 2011-06-29 06:00:56 +00:00
matt
1543ad8fcb Cleanup hatch names.
Add cpuset_info.
2011-06-29 06:00:17 +00:00
matt
c0b4eeb495 Redo how the pte_*wire* inlines work. Now pmap.c makes no assuming about
what type pt_entry_t.  It can now be a scalar or a union/struct.
2011-06-23 20:46:15 +00:00
matt
055140992d Move some MD parts back to the booke pmap.c. Cleanup initialization a bit. 2011-06-23 02:33:44 +00:00
matt
8b35e8e3c4 Switch to using the common <common/pmap/tlb/tlb.h> 2011-06-23 01:27:20 +00:00
matt
dd2488a8b3 Add support pci_intr_setattr.
Export non-inline version of pci api for modules (_MODULE is defined).
Fix definition of pc_conf_hook and pc_conf_interrupt.
Switch to using inlines instead of macros.
Switch ibm4xx to use <powerpc/pci_machdep.h>
2011-06-22 18:06:32 +00:00
matt
fd8fff1eed Add a common cpu_ast(l, ci) routine.
Add a ci_pmap_asid_cur for BOOKE debugging.
2011-06-21 06:32:36 +00:00
matt
3edffcf969 Reap the ci_ev_soft* evcnts since every variant implements __HAVE_FAST_SOFTINTS 2011-06-21 04:21:16 +00:00
matt
f399d1bd6e forward declare cpu_info and trapframe. 2011-06-21 04:19:22 +00:00
matt
0a807611dd Readd powerpc/include/vmparam.h to the set lists
Export it to powerpc/include.h
Protect pmap.h and vmparam.h from getting an #error when included
from userland.
Export safe definitions of VM_MAXUSER_ADDRESS, VM_MIN_ADDRESS,
VM_MAX_ADDRESS when _RUMPKERNEL is defined.
2011-06-20 21:45:16 +00:00
matt
fc311b7702 PowerPC now exports a common view of cpu.h, vmparam.h and pmap.h
when building a MODULAR kernel or compiling _MODULE.
It should be noted that MODULAR or _MODULE export a view of the kernel
as being MULTIPROCESSOR (even if isn't).
The shared pmap TLB uses mdpg in places where it used mdpg to avoid
deadly embrance inclusion problems.
2011-06-20 20:24:28 +00:00
matt
dba36e0322 Change IBM4xx to use the common powerpc PIC framework.
Consolidate most ibm4xx initppc function into ibm4xx_init
and Make all IBM4xx use it.
Change explora to use initppc instead of bootstrap.
2011-06-20 17:44:33 +00:00
matt
1ccd59cea1 Make struct cpu_info the same size if building MODULAR
kernels or compiling a module.
2011-06-20 17:15:38 +00:00
matt
9f9b390495 Make more module friendly (part 1).
Don't export frame.h and psl.h to all of the kernel.
add lwp_pc and clkf accessor functions.
whitespace cleanup.
2011-06-20 08:47:12 +00:00
matt
90b2f9b46e Add #error for unknown PPC variant
Now that oea calls cpu_fixup_stubs, we don't need pmap_fixup_stubs.
2011-06-20 08:07:03 +00:00
matt
a4d141ba75 Don't export USER_SR if _MODULE is defined.
Add a common <powerpc/vmparam.h> like we have for <powerpc/pmap.h>
2011-06-20 08:01:13 +00:00
matt
f4082af472 Pad out trapframe for OEA so that trapframe has identical sizes for all
PPC variants.
2011-06-20 07:31:18 +00:00
matt
544a61dd20 Fixup PSL handling to be tolerant of modules. Move evbppc psl changes
into powerpc psl.h
2011-06-20 07:23:36 +00:00
matt
179b37ab20 Cleanup powerpc param.h. If compiling a MODULE, ignore port-specific stuff.
Only include <machine/cpu.h> in <powerpc/param.h> at the end.
2011-06-20 06:29:53 +00:00
matt
10c6a9d272 Explicitly include <powerpc/psl.h> 2011-06-20 06:24:30 +00:00
matt
74692028f6 <arch/powerpc/... -> <powerpc/... 2011-06-20 06:21:45 +00:00
matt
79d5c05dc5 Include <powerpc/psl.h> 2011-06-20 06:04:33 +00:00
matt
37ea7f5287 Explicitly include <powerpc/psl.h> 2011-06-20 06:00:46 +00:00
matt
b1991f6793 Move PVR definitions to <powerpc/ibm4xx/spr.h>
No need to include <powerpc/cpu.h> in <powerpc/ib4xx/cpu.h>
2011-06-18 17:06:52 +00:00
matt
e2a71f6c7b intr.h must not include cpu due to deadly embrace with SOFTINT_COUNT.
Cleanup intr.h so MD definitions can overload common definitions.
Rototill pic/intr.c.  Virtual IRQs can now be reclaimed.  separate virq
from hwirq from picirq.  Redo intr mask calculations.
tested on pmppc and macppc (MP).
2011-06-17 23:36:17 +00:00
matt
a5b7432590 struct device * -> device_t 2011-06-17 19:04:00 +00:00
matt
036ca983e1 struct device * -> device_t
struct cfdata * -> cfdata_t
split device/softc (CFATTACH_DECL_NEW)
use device_accessors and device_private
constify
2011-06-17 19:03:00 +00:00
matt
06d8da7df3 Change from level to ipl since we aren't dealing a mask anymore, just a
simple value.
Fix intr_calculatemasks to deal with ipl isn't a mask.  Let establish
and disestablish determine the highest ipl for the interrut source being
modified.  No reason to recompute that for every source when only one changes
at a time.  Only change idepth while in the loop.
2011-06-17 05:15:22 +00:00
macallan
b5ffed7530 enable FAST_SOFTINTR support for all ports that use powerpc/pic/
This has been successfully tested on macppc
TODO:
- ibm4xx needs to be adapted
- SMP doesn't work yet, 2nd CPU crashes when trying to leave the idle loop
2011-06-16 02:43:42 +00:00
matt
d5e2b0cf4d Move booke_fixup_stubs() to fixup.c and rename it to cpu_fixup_stubs().
This makes it easier for other PPC variants to use it.
2011-06-15 15:18:20 +00:00
matt
3fbf2742ed Add IST_PULSE and intr_typename (converts IST_* to a name). 2011-06-15 15:11:50 +00:00