locore calls to go via a locore-entry jumptable.
Cast the (int) arguments to MachTLBUpdateEntry() to avoid
warnings. Variables TLB entries are still type-punned as either structs
or ints, without any regard, when the pmax-specific VM code passes
them as arguments to functions.
locore calls to go via a locore-entry jumptable.
Use mips_btop(), mips_round_page, mips_trunc_seg() instead
of pmax_btop(), pmax_round_page, pmax_trunc_seg().
Add Per's software-readonly-bit mechanism, since the r2000 and r4000
hardware TLB entries are very different, and the r4k has no space for
software bits in TLB entries. That is, this pmap code still won't work
on r4000 machines. Some other solution, like another jump table for
clients of the pmap code, is necessary.
locore calls to go via a locore-entry jumptable.
Declare r2000- and r4000-specific exception-handler functions, to which
trap() and interrupt() dispatch exceptions. Initialize r2000- and r4000-
specific exception-handler vectors, when CPU_R4000 and CPU_R2000 are
defined.
Update the stack-traceback code (partially) to understand and print
the new low-level exception-handler code, via which machine exception-vectors
send exceptions to call trap() or interrupt(). This needs more work.
an vector (struct) of function pointers. Add prototype declarations for
each vector entry.
Add declarations for the r2000 (MIPS-I) and r4000 (MIPS-III) locore
versions of the relevant functions.
to all mips ports.
So far, this consists of code to initialize a vector, or jump-table, of
pointers to locore functions that require different definitions on different
Mips CPUs (eg., r2000/3000 and r4000); a generic wrapper for setting up
CPU-specific exception vectors; and CPU and FPU identification code.
locore functions. The new names are used by C code to construct a jump-table,.
making it less infeasible to have a single kernel image work on both
r3000 and r4000 systems.
Add prototypes to (most of) src/sys/arch/pmax/pmax. (The un-protytyped
parts still have pending merges with the Pica port.)
Fix splx() glitches in pmax/clock.c.
Delete old cpu/fpu identification from pmax/autoconf.c, use r4400/r4600/idt
aware code from Pica port, now in mips/mips/mips_machdep.c.
Delete unused multi-CPU autoconfiguration code; NetBSD/pmax does not
support decsystem 5800s anyway.
Replace impliclty-sized types (u_long, u_short) used in
declarations of byteorder functions witho explicitly sized types
(u_int32_t, u_int16_t).
Avoids problems with using ntohl(foo) as (eg) an argument to printf().
Do not define __BDEVSW_DUMP_OLD_TYPE, as it breaks prototyping
of device dump functions, and should be port-dependent in any case.
The pmax 4.4bsd/pmax-derived drivers are being fixed, and the pica port
uses the MI scsi drivers already.
Move to mips/pmax/genassym.c, as (most of) the assembler locore code is
being merged into a generic-MIPS locore.
Remove the redundant pmax/pmax/genassym.c.
* cut-and-paste all the code for both r2000 (MIPS-I) and r4000 (MIPS-III)
into both the pica and pmax locore.S.
* Change the names of the small segments of vector code that are
bcopied to the machine vector locations, to avoid clashing.
Get rid of the Sprite MachXXX names for the vector code, and
use use mips_r2000_xxx and mips_r4000_xxx instead.
Update the names used in the vector-copying code and trap handlers
to match.
* Most of the rest of the pica locore.S was copied from the pmax
locore.S, and then edited to work on an r4000. The names of
functions and of manifest constants stayed the same, although
both assmbler code and constant values changed.
cut-and-paste such code into contiguous blocks protected by
#if / #endif. Much of the cache and trap-handling code
needs r3000-only register fields, on the r3000, and r4000-only
insns and registers on the r4000.
* change the pmax r2000 exception-handling code to extract a trap
code with the user/kernel bit at 0x20 rather than 0x10.
(r2000s have 4-bit execption codes, r4000s have 5-bit.)
Use the a 16 from-user-space + 16-from-kernel space jump table,
just like on the r4000 pica port.
* add NOPs to the common code where required by the r4000 pipeline
constraints.
* add _C_LABEL() macros to the r4000 locore.
Comitted to provide a snapshot for others to test, and work on a cleaner merge.
* add "MIPS_3k_" for the MIPS-I r[23]000-specific register definitions.
* add "MIPS_4k_" for the MIPS-II/III r4000-specific register definitions.
* add #defines that provide the old values for locore and user
code, so the existing code continues to compile.
Regression-tested against the old headers by grepping for #define's,
editing out the defined symbols, and preprocessing with both the previous
machConst.h headers and this version.
Some unused symbols (CPU and FPU must-be-zero constants) are no longer defined.
Pica interrupt masks are now constant expressions instead of constant
values.
TODO:
* factor out the common #defines into src/sys/arch/mips.
* Get rid of the Sprite coding-style names (MACH_xxx).
* Separate out the r3k/r4k differences from the Pica/pmax differences.
* Figure out how to have a run-time choice of r3k vs. r4k support,
instead of a compile-time choice.
* Delete pmax-specific functions and declarations from trap.c
* Delete mips-geeneric functions and declaratinos from pmax_trap.c
* Rename the function pointer used to handle hardware interrupts to
"mips_hardware_intr". Define it in trap.c. Change references elsewhere,
including machdep.c.
Verified to boot on a 5000/200.
* Add spl4() and spl5() functions from the Pica port.
* Add MachFPTrap() as an alternate entry point for MachFPInterrupt.
The r4k reports floating-point execptions as a trap, not an interrupt,
and the Pica port uses the name MachFPTrap().
* Add nops to the Mach_spl?() functions and MachFPInterrupt, as required
for the r4k port.
Commit "floppy" interrupt counter for vmstat -i.
always be eight digits.
Copy the kn02 memory-interrupt reporting function to the kn03 (5k/240)
memory-error handler, since the 3MAXPLUS seems to use the same ECC hardware
as the 3MAX.
Update the include-idempotency preprocessor token to match.
References to machAsmDefs in vendor (sprite, 4.4bsd) headers left unchanged,
for historical accuracy.
provide r3k and r4k versions of each, and move to sys/arch/mips/include.
Note in comments where each mips-based port should provide
definitions in its own cpu.h after including this file.
opcodes from the Pica port. Per Fogelstrom claims the latter are all
supposedly MIPS-II (r6000) instructions, rather than MIPS-III (R4000),
but we haven't checked to be sure. Are LL/SC really in MIPS-II?
CVS:: ----------------------------------------------------------------------
versions work correctly; at some point between then and the immediately
preceding revisions, the "stylistic" changes to one (or both) stdarg.h
and varargs.h broke passing doubles to printf().
parameter parameters shadowing locals. Replace vmapbuf() and vunmapbuf()
with the Alpha-port versions, which are cleaner (use round_page(),
trunc_page(), etc.)
* add a new enum decstation_intr_t to trap.c, naming each instrumented
interrupt symbolically, and used to index into intrcnt[]. Change the
model-specific interrupt handlers to use the decstation_intr_t when
updating interrupt counters.
* add instrumentation to the kmin and maxine interrupt handlers.
* fix a bug that counted each hardclock interrupts on the kn02 twice.
The hardcoded mapping from locore names to units is gross; but these
counters will hopefully be useful in identifying interrupt hot-spots
and PPP problems on the 3MIN.
Rename the ioctl asic register and slot macros from ASIC_<xxx> to
IOASIC_<xxx>, to be compatible with the machine-indpendent names in
sys/dev/tc/ioasicvar.h. The pmax code still uses
sys/arch/pmax/pmax/asic.h, as some of the registers and offsets
defined there are not yet defined in sys/dev/tc/ioasicvar.h.
Rename the ioctl asic base-address pointer from `asic_base' to `ioasic_base'.
independent TC support in sys/dev/tc/tc.c and sys/dev/tc/tcvar.h:
* Change the tc autoconfiguration tables to use a struct tc_attach_args
instead of the ad-hoc structure.
* Change all pmax device drivers to use a `struct confargs' that's
assignment-compatible with sys/dev/tc/tcvar.h `struct tcdev_attach_args'.
Devices that can be present on a TC or as ioctl asic/mainbus builtins
use the same `struct confargs'.
* Eliminate the `BUS_CVTADDR()' macros which the pmax port inherited from
an old, now-obsolete sys/arch/alpha snapshot.
* Update the comments and debugging code in interrupt handlers to
be consistent with the machine-independent TC support.
Other commits that overlap the same source files include: re-enabling
clock-tick interrupts earlier, and counting hardclock ticks for vmstat -i.
Kernel-debugger breakpoints in user space, or FP insns that cause
underflow in a delay slot, should now work properly. Single-stepping
of arbitrary user processes, from user level, should be added.
* define PT_GETREGS and PT_SETREGS in pmax/include/ptrace.h
* Flesh out the stubs in pmax/pmax/process_machdep.c to handle
those requests.
* Now that "struct reg" is actually used, remove the bogus
#ifdef LANGUAGE_C around its definition, and redo pmax/include/reg.h
so that the definitions needed by locore.S are in a separate file,
pmax/include/regnum.h.
* update locore.S to match.
to "kn01_<func>", to avoid confounding a model name (PMAX) with the name of the
entire port (pmax).
Change the signature of interrupt-handlers to take a void *
(a pointer to the softc) and return an int (indicating spurious
interrupts or other conditions.)
Pass softc pointers to the scsi and ethernet kn01 (DS_PMAX) drivers,
rather than having unit numbers wired into the base-level interrupt
handler.
consistent with the (default) prepending of underscores to identifiers.
Because this reference is inside an ASM string it's too hairy to
conditionalize to support different toolchains that don't prepend underscores.
(Just don't do profiling with such toolchains.)
Instead of being a no-op, kn03_intr_enable() sets the sw copy of the
interrupt-enable mask *and* writes it into the IO asic intr-enable
register. Boot code sets the sw copy (kn03_tc_imask) to something
sane (KN03_IM0, with tc option slots turned off). Tested and works.
Interrupt code for other IOASIC machines should be redone so that
interrupts for devices are enabled by drivers, rather than by
cpu-specific boot code. Functions common to all IOASIC machines
(PSWARN?) should be done by asic_init().
Checked in without the above changes so that 3MAX+, MAXINE and 3MIN
interrupt-(enable,handle) can converge.
Also change the stack-traceback code to avoid having multiple returns
(and thus multiple stack pops) because with gcc -O2 that breaks the
heuristic that a "jr ra" preceding the PC precedes code to push the
current stack frame. Which breaks stacktrace() before it even
traces past itself :-(. Use a goto instead.
traps, and interrupts The earlier (4.4bsd) code didn't do the first two, and
got the last one wrong. Also print some functions (e.g., trap handlers)
by name. Add hook to use something other than printf() as the output
function, e.g,. for kernel debugging.
Tested with the `native' toolset, but not ELF format kernels.
(i.e., unwinding the $GP register is not tested.)
The stack backtrace code that interprets and unwinds stackframes is still
opaque and stylistically awkward.
and wasn't unrolled. This code runs cached and unrolled, giving an order
of magnitude improvement in some cases (e.g., DMA-capable network devices).
In use at Stanford DSG since late January 1995.
(A similar fix needs to be applied to the 3min and xine handlers.
This fixes a long-standing problem when booting with a card that
wants to interrupt (e.g., a network interface) would have interrupts
enabled before a handler was set up.
Add interrupt-counting code to model-independent interrupt handler,
and 3max (5k/200) and 3max+ (5k/240) md handlers, for vmstat -i.
Similar changes for 3min and xine are obvious but not done.
Add code for 5k/240 to read, and latch, the current value of the
IOASIC bus-cycle counter at each timer interrupt. The latched
counter is needed to accurately interpolate the bus-cycle counter value
as a high-resolution clock.
