Commit Graph

1849 Commits

Author SHA1 Message Date
ad 59d979c5f1 Pass an ipl argument to pool_init/POOL_INIT to be used when initializing
the pool's lock.
2007-03-12 18:18:22 +00:00
thorpej 0bc4ff9912 Use _lock_cas() instead of the interrupt-blocking atomic_cas(). 2007-03-09 20:08:26 +00:00
thorpej 4fd718b62e [Missed this file in the initial commit.]
Rewrite the ARM mutex implementation to be of the simple-mutex variety.
Because pre-v6 ARM lacks support for an atomic compare-and-swap, we
implement _lock_cas() as a restartable atomic squence that is checked
in the IRQ handler right before AST processing.  (This is safe because,
for all practical purposes, there are no SMP pre-v6 ARM systems.)

This can serve as a model for other non-MP platforms that lack the
necessary atomic operations for mutexes (SuperH, for example).

Upshots of this change:
- kmutex_t is now down to 8 bytes on ARM; about as good as we can get.
- ARM2 systems don't have to trap and emulate SWP or SWPB for mutexes.

The acorn26 port is not updated by this commit to do the LOCK_CAS_CHECK.
That is left as an exercise for the port maintainer.

Reviewed and tested by Matt Thomas.
2007-03-09 19:29:28 +00:00
thorpej 165d4e6d83 Rewrite the ARM mutex implementation to be of the simple-mutex variety.
Because pre-v6 ARM lacks support for an atomic compare-and-swap, we
implement _lock_cas() as a restartable atomic squence that is checked
in the IRQ handler right before AST processing.  (This is safe because,
for all practical purposes, there are no SMP pre-v6 ARM systems.)

This can serve as a model for other non-MP platforms that lack the
necessary atomic operations for mutexes (SuperH, for example).

Upshots of this change:
- kmutex_t is now down to 8 bytes on ARM; about as good as we can get.
- ARM2 systems don't have to trap and emulate SWP or SWPB for mutexes.

The acorn26 port is not updated by this commit to do the LOCK_CAS_CHECK.
That is left as an exercise for the port maintainer.

Reviewed and tested by Matt Thomas.
2007-03-09 19:21:57 +00:00
skrll 9bd69a33e6 Typo in comment. 2007-03-09 11:30:28 +00:00
thorpej 0eddebcf62 Elaborate a bit more in the first paragraph. 2007-03-09 07:13:06 +00:00
thorpej 7a35085f7e Update the theory statement for the ARM mutex implementation.
There is still work to be done here.
2007-03-09 07:11:10 +00:00
thorpej d1d10b58ab Make ipl_t and ipl_cookie_t 8-bit values. kmutex is now down to 12 bytes
(from 20) on ARM.

Approved by Matt Thomas.
2007-03-09 06:45:19 +00:00
thorpej d995c0d9c9 Make __cpu_simple_lock_t an unsigned char if _KERNEL, and operate on it
using SWPB.

Approved by Matt Thomas.
2007-03-09 05:40:08 +00:00
matt d471ccf3aa Clean the bitrotting ofw code. Don't export export the underlying irq
dispatch mechanism to the rest of the kernel; they don't need to know.
Nuke IRQSTATS entirely.

XXX ofwgencfg_clock needs to taught about timecounters
2007-03-08 20:48:39 +00:00
matt 4dd05a4c0a Fix inverted test (cputype != 0) and now my shark boots again! 2007-03-08 20:42:48 +00:00
he bc250f04cf Cast to char* before doing pointer arithmetic, convert one void* to char*
for ease of pointer arithmetic.
2007-03-05 22:18:59 +00:00
nonaka e8284b2c49 Use (char *) on pointer arith. 2007-03-05 00:44:31 +00:00
nonaka cc37e30de1 Use (char *) on pointer arith. 2007-03-05 00:30:58 +00:00
chris 282f3bfbc1 Fix caddr_t fallout for cats kernel builds. 2007-03-04 17:55:10 +00:00
bjh21 5dbe04b416 Finally make cpufuncs work properly on acorn26, since something seems to be
using it.  This entailed adding support for ARM2 and ARM2as, and allowing
for getting CPU IDs other than from CP15, since ARM2(as) doesn't have CP15.
2007-03-04 14:47:18 +00:00
bjh21 d4eec8400b Un-__P. 2007-03-04 13:42:51 +00:00
bjh21 c58989c955 src/sys/arch/arm32 is long gone, so stop referring to it. 2007-03-04 12:08:58 +00:00
christos 5ebcdbe8b5 fix caddr_t fallout. 2007-03-04 10:21:25 +00:00
matt fa610d2cd3 Don't export to userland functions that will only be used in the kernel. 2007-03-04 06:51:53 +00:00
christos 53524e44ef Kill caddr_t; there will be some MI fallout, but it will be fixed shortly. 2007-03-04 05:59:00 +00:00
tsutsui 4f4391e397 Move mkldscript.sh, which is used to create ldscript dynamically to
merge link_set_* sections into the text section for a.out kernels,
from sys/arch/arm/conf/ to sys/conf/ since there is no ARM specific
stuff in it and other ports would share it.
2007-03-04 02:35:49 +00:00
bjh21 81b7c41b62 PROG26 version of __with_interrupts_disabled(), and hence of the various
functions in this file.
2007-02-28 23:46:17 +00:00
bjh21 d6e0a9e5aa KNF
(waiting for a test kernel to compile...)
2007-02-28 23:26:10 +00:00
macallan 12dd6f9c02 add OF_setprop() 2007-02-28 20:30:57 +00:00
chris b07025ae18 Make this file compile with PCI_DEBUG defined. Needed to figure out why
the latest ABLE firmware was causing an interrupt mapping issue on cats.
It seems that the latest ABLE firmware is using native-PCI mode, rather
than compatibility mode, but doesn't setup an irq for us to use, so we fail
to map the interrupt handler.
2007-02-25 18:42:00 +00:00
nonaka 8d4fbc454e Add PXA2x0 RTC driver. 2007-02-25 13:46:40 +00:00
thorpej ab87c6666d TRUE -> true, FALSE -> false 2007-02-22 05:14:04 +00:00
matt 93feeb1203 Fix lossage from boolean_t -> bool and updated x86 bus_dma. 2007-02-22 04:38:02 +00:00
thorpej dd962f8680 Pick up some additional files that were missed before due to conflicts
with newlock2 merge:

Replace the Mach-derived boolean_t type with the C99 bool type.  A
future commit will replace use of TRUE and FALSE with true and false.
2007-02-21 23:48:10 +00:00
thorpej 712239e366 Replace the Mach-derived boolean_t type with the C99 bool type. A
future commit will replace use of TRUE and FALSE with true and false.
2007-02-21 22:59:35 +00:00
mrg 4410329b87 add a pair of new bus_dma(9) functions:
int _bus_dmatag_subregion(bus_dma_tag_t tag,
				  bus_addr_t min_addr,
				  bus_addr_t max_addr,
				  bus_dma_tag_t *newtag,
				  int flags)
	void _bus_dmatag_destroy(bus_dma_tag_t tag)

that allow a (normally broken/limited) device to restrict the bus address
range it can talk to.  this is used by bce(4) to limit DMA addresses to
1GB range, the maximum the chip can address.

all this is from Yorick Hardy <yhardy@uj.ac.za> with input from several
people on tech-kern.

XXX: bus_dma(9) needs an update still.
2007-02-21 20:41:23 +00:00
matt 35747137de Protect MB_* and <arm/cpufunc.h> by _KERNEL 2007-02-20 04:29:00 +00:00
matt f647a6c8ed Don't double count uvmexp.softs 2007-02-20 04:14:23 +00:00
matt 07250b0fdd _setsoftintr takes a si, not a ipl, so don't map it.
Shark now boots to multiuser!
2007-02-20 03:43:22 +00:00
ad d43ea32af9 - Add /a modifier to trace that allows a specific LWP to be selected.
- When doing trace/t, always note which pid/lid combination is being traced.
2007-02-20 01:02:02 +00:00
matt 499d835e35 Add KERNEL_BASE 2007-02-20 00:05:14 +00:00
he 7772633798 Since drain_writebuf() is #defined in <arm/cpufunc.h>, we need to
include it here.
2007-02-19 23:35:49 +00:00
matt af22d52131 Don't do softinit_init from irq_init. 2007-02-19 21:46:32 +00:00
matt 74b259d1ca Make softintr_names const. 2007-02-19 21:45:23 +00:00
he ebb5f3bcdf Fix a typo, spotted by martin (I stared myself blind on that one...). 2007-02-19 15:54:00 +00:00
briggs fc7b39db52 Get DOMAIN_CLIENT directly from arm/arm32/pte.h instead of from genassym
to avoid redefinition when both assymh and pte.h are included (as in
INTEGRATOR's intmmu.S, which uses more macros from pte.h).
2007-02-19 01:59:23 +00:00
ad 7cfa6abfaf More signals/locking changes. 2007-02-18 21:10:32 +00:00
ad be01a71411 + mb_memory() 2007-02-18 21:07:40 +00:00
matt 7a2b6251f2 Adapt to newlock2 2007-02-18 21:04:01 +00:00
matt ac1041d913 Move declaration of spl_smasks. make spl_smasks and soft_interrupts static. 2007-02-18 21:03:22 +00:00
matt c47c836ecb Equate mb_write and mb_read to drain_writebuf (from cpu.h) 2007-02-18 21:01:50 +00:00
briggs 069c9702dd Adapt to newlock2. 2007-02-18 20:05:20 +00:00
briggs 04a29fca2b Adapt to newlock2. 2007-02-18 19:59:25 +00:00
briggs 5f2083f440 Install atomic.h, as needed by the installed rwlock.h. 2007-02-18 15:53:55 +00:00