restore %fs/%gs appropriately.
Fixes kern/14275 - compat svr4 works on i386 again :)
Thanks to MOCHIDA Shuji for initial investigation on the issue, that helped
to find the bug a lot.
Make sure the CPUCLASS_686 entry has really 17 (i.e. 16 + default)
name entries as it's supposed to, so that code won't crash when
run on Intel CPUCLASS_686 processor which doesn't have name entry
in the table.
Reported and fix provided by Naoto Morishima in kern/14380.
%fs/%gs as appropriate.
XXX Note that the new sigcontext uses the new sigset_t instead of old
int sc_mask. The new FreeBSD sigcontext doesn't contain any backward
compatibility sc_mask, so basically old FreeBSD application making
use of sigcontext are hosed. This can't be fixed in NetBSD compat code.
the etc Makefile override that by putting USETOOLS into $.MAKEOVERRIDES
This way the default for kernel compiles is still to use the installed
toolchain instead of depending on $TOOLDIR. $TOOLDIR can be used by
simply adding USETOOLS=yes to the command line as usual.
Adjust each ports template to set the default no setting and also pull in
bsd.own.mk if they weren't already to ensure they'll build correctly
with the new toolchain setup.
amount of kvm used for buffers was set at 70%, some 188M. Then
the total amount of kvm became 1G, and the amount for buffers
thus became some 716M. This is really too much, and some
device drivers want to map quite a bit of kvm these days.
So, cap it at 384M, which gives each buffer a little over 8k (the
default FFS blocksize) physical in an 1G physram configuration.
-remove the check for i810's internal graphics completely: we'll attach
AGP whether in GFX or AGP mode anyway, and the SMRAM register test
was of questionable value (should have masked with 0xc0, but even then
the builtin graphics appeared enabled although I used an external
PCI card)
- remove special treatment of pager_map mappings in pmaps. this is
required now, since I've removed the globals that expose the address range.
pager_map now uses pmap_kenter_pa() instead of pmap_enter(), so there's
no longer any need to special-case it.
- eliminate struct uvm_vnode by moving its fields into struct vnode.
- rewrite the pageout path. the pager is now responsible for handling the
high-level requests instead of only getting control after a bunch of work
has already been done on its behalf. this will allow us to UBCify LFS,
which needs tighter control over its pages than other filesystems do.
writing a page to disk no longer requires making it read-only, which
allows us to write wired pages without causing all kinds of havoc.
- use a new PG_PAGEOUT flag to indicate that a page should be freed
on behalf of the pagedaemon when it's unlocked. this flag is very similar
to PG_RELEASED, but unlike PG_RELEASED, PG_PAGEOUT can be cleared if the
pageout fails due to eg. an indirect-block buffer being locked.
this allows us to remove the "version" field from struct vm_page,
and together with shrinking "loan_count" from 32 bits to 16,
struct vm_page is now 4 bytes smaller.
- no longer use PG_RELEASED for swap-backed pages. if the page is busy
because it's being paged out, we can't release the swap slot to be
reallocated until that write is complete, but unlike with vnodes we
don't keep a count of in-progress writes so there's no good way to
know when the write is done. instead, when we need to free a busy
swap-backed page, just sleep until we can get it busy ourselves.
- implement a fast-path for extending writes which allows us to avoid
zeroing new pages. this substantially reduces cpu usage.
- encapsulate the data used by the genfs code in a struct genfs_node,
which must be the first element of the filesystem-specific vnode data
for filesystems which use genfs_{get,put}pages().
- eliminate many of the UVM pagerops, since they aren't needed anymore
now that the pager "put" operation is a higher-level operation.
- enhance the genfs code to allow NFS to use the genfs_{get,put}pages
instead of a modified copy.
- clean up struct vnode by removing all the fields that used to be used by
the vfs_cluster.c code (which we don't use anymore with UBC).
- remove kmem_object and mb_object since they were useless.
instead of allocating pages to these objects, we now just allocate
pages with no object. such pages are mapped in the kernel until they
are freed, so we can use the mapping to find the page to free it.
this allows us to remove splvm() protection in several places.
The sum of all these changes improves write throughput on my
decstation 5000/200 to within 1% of the rate of NetBSD 1.5
and reduces the elapsed time for "make release" of a NetBSD 1.5
source tree on my 128MB pc to 10% less than a 1.5 kernel took.
device (rather, the device that carries that attribute) also
carry one or more attributes indicating which type of controller
it might be.
This will allow systems that might have AGP, but would never have
e.g. an Intel PCI-Host bridge, to trim out code that won't be used.
This prevents attaching multiple [E]ISA buses, which we don't support
(Is there any such thing to support? I'm skeptical) and avoids the
"panic: isaattach: ISA bus already seen" that occurs on some laptops
with docking stations and EISA boxes. Since there is only one [E]ISA bus,
logically, the ISA device probe will still find devices on the
docking station.
This does not address the problem of inserting or removing the docking station
at runtime.
Relevant PRs: kern/6544, port-i386/10392, kern/11627, kern/13557,
install/13865.
This will allow improvements to the pmaps so that they can more easily defer expensive operations, eg tlb/cache flush, til the last possible moment.
Currently this is a no-op on most platforms, so they should see no difference.
Reviewed by Jason.
be spread over several devices, and the phcb is usually the main one.
Add agp_machdep.c file which implements MD agp functions (currently
just agp_flush_cache).
APM_IOC_GETPOWER ioctl read/write. Setting the batteryid in the passed
structure returns the data for just that battery. The old ioctl
remains for binary compatibility but has been renamed.
Itojun already did the hard work -- I just added a couple of lines.
reviewed by: thorpej
This also involved updating the in-kernel DES functions to correspond
to the versions in our in-tree OpenSSL, because the des_SPtrans table
has changed; the asm code will not work with the old permutation table!
C and i386 asm code for the DES, 3DES, and Blowfish CBC modes is also
included; it is not currently built as the ESP processing in esp_core.c
splits the CBC operation and the cipher transform apart. Hopefully that
will be fixed as there is a substantial performance improvement to be had
from doing so. It will remain necessary to use the C version of the
Blowfish CBC function on some i386 machines, however, as the asm version
uses bswapl, which ony 486 and later processors have. The DES CBC code
doesn't have this problem.
Finally, change esp_core.c to use the ecb3_encrypt function instead of
calling ecb_encrypt three times; this improves performance a bit, in
particular in the asm case.
in the ARMADA config. On the M700 at least, the SMBus host controller lies
it 0x4000 (the beginning of the range allocated by default to rbus), and
stomping all over it causes bad things to happen.
- If we detect SSE/SSE2 support in the CPU, enable SSE exceptions
and set i386_has_{sse,sse2} as appropriate.
- Expose i386_use_fxsave and i386_has_{sse,sse2} through sysctl
as machdep.{osfsxr,sse,sse2}.
adding optimized versions for various CPU classes/models.
Split the 386 version of copyout into a separate routine, and
add a 486 version that doesn't have the class/page-writeability
check.
using level triggered interrupts, which livelocks calling intr routine
if the data register is not read in the interrupt routine, as it's case
when polling after interrupts are enabled during boot.
Block all interrupts when polling for keypress, and modify intr routine
to read and store value from data register. The latter one is to avoid
losing a keypress when one would manage to press a key when kernel is
not in spl-guarded code section.
Tested with classic pccons, 'pcconskbd at pckbc' and 'pckbd at pckbc'
configurations, on i386.
and with the comment '4.2BSD TCP/IP bug compat. Not recommended'
Add commented out 'TCP_DEBUG # Record last TCP_NDEBUG packets with SO_DEBUG'
(All hail amiga and atari which make some attempt to automate the
multiplicity of config files...)
on all platforms but the i386. On the i386 we look at T_PROTFLT and send
a SIGSEGV instead of SIGBUS. This makes allegro lisp 5.0 and pvs (a proof
verification system) to work.
XXX[1]: We need to go through each architecture and verify that we send
the correct signal on each trap type.
XXX[2]: trap.c on all other architectures but i386 needs to be modified
to s/trapsignal/(*p->p_emul->e_trapsignal)/g
trap/interrupt/syscall entry from userspace.
Remove special-case "by hand" validation of fs/gs register values as
well as special handling of them in various signal handling paths.
Now, like %ds and %es, they are validated by the hardware on return to
userland.
This paves the way for the use of %fs for per-cpu data on
multiprocessor systems, and fixes an otherwise difficult-to-fix
interaction between threads/clone(2) and USER_LDT.
Discussed in advance with Frank van der Linden.
them define __HAVE_PCIIDE_MACHDEP_COMPAT_INTR_ESTABLISH
in pci_machdep.h and pciide_map_compat_intr() only calls
pciide_machdep_compat_intr_establish() if that preprocessor
define exists.
Ports that don't need to do this no longer need to supply a
dummy function.
when the system is "warm", i.e. interrupts are not blocked anymore.
This seems to be necessary on my PS/2 Model 70 keyboard - without this,
system ends up in endless loop calling the keyboard intr routine if a key
is pressed when polling. This _may_ be just specific to level-triggered
interrupts PS/2 MCA uses, though it's more likely it's just the way the
particular keyboard controller works.
Discussed on tech-kern@.
enabling the INET6_MD_CKSUM option, which is defopted into opt_inet.h.
Supply an i386 assembly version of in6_cksum in in_cksum.s; on
P6-family cpu's, this is is roughly 20% faster than the C code in
sys/netinet6 for ethernet-mtu-sized mbufs in L1 cache. Turn on
INET6_MD_CKSUM in i386/conf/std.i386
While we're here, also nuke some now-obsolete XXX comments from
in_cksum.s.
(and unlock) the other pmap's pte's before continuing to the next
pmap. Avoids pmap lock leaks (generates LOCKDEBUG warning, deadlocks
MULTIPROCESSOR).
* recognize PS/2 L40 via biosmca() and biosmca_ps2model in gatea20.c, instead
of being a compile time option
* if the system is PS/2 with MCA bus, map DTYPE_ESDI disks to ed(4) for
COMPAT_OLDBOOT
The new code is conditional on SUPPORT_PS2 define, which is on by default
for biosboot-based bootblocks.
itself, and that got replaced with a call to memcpy. Ross deserves
most of the credit.
note that if you've seen bcopy elsewhere in the kernel, systm.h
defines it as a macro...
infrastructure) to indicate what C stubs should be generated for
various entry points.
2) Add comments noting various artifacts discovered while performing
task 1), including a bunch of stuff that may very well no longer be
used.
variable, if the machine has a MCA bus according to info returned
by BIOS (i.e. on machines without MCA bus, biosmca_ps2model would be zero).
biosmca() is expected to be called on beginning the initialization,
and biosmca_ps2model is then used for further checks.
using the APIC bit instead, according to the AMD Processor Recognition
App. Note. Add a fixup routine to patch up cpu_feature in this case.
XXX Need a way to kick the pmap to enable pmap_pg_g -- look at how the
MP branch deals with this.
- Start with 2 initial color bins, and recolor once we've determined
the number of color bins based on the formula:
(largest_cache_size / associativity) / PAGE_SIZE
- Add "associativity" to the cache_info structure.
- Add a (*cpu_cacheinfo)() function pointer, like we have a
(*cpu_setup)() function pointer. Cache info in the `cpuid'
is vendor-specific.
