fc7183f440
GC unsed sparc_vme_bus_tag.
2004-06-27 16:08:42 +00:00
bd8eb3b5ed
Add (commented out) ALTQ options to all GENERIC-like files
2004-06-26 07:32:05 +00:00
596aec9a47
have pf and pflog pseudo-device (commented out).
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reviewed by matt, perry, christos
2004-06-22 14:09:49 +00:00
84fafa3db5
Ignore errors on some rm -rf's for platforms that aren't quite
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POSIX compliant
and return errors on r/o source (FreeBSD) for -rf. Fixes PR#25022
2004-06-21 18:20:08 +00:00
4c2f43b8cf
Better support for booting from partitions != a or at the start of the
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disk, allow commands like "boot disk:d disk:d/netbsd" to work.
Use the real RF_PROTECTED_SECTORS define instead of a local magic number.
While there, minor cosmetics in diagnostics/output format.
2004-06-18 21:04:39 +00:00
31895478bc
Use RF_PROTECTED_SECTORS instead of a (wrong) magic value.
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The bootblock now is able to load ofwboot from a raid1 root.
2004-06-18 18:42:15 +00:00
c22e4ed8cd
ptm is now mandatory, depends on pty, and can be disabled with -DNO_DEV_PTM
2004-06-18 15:02:29 +00:00
0399e839cf
Add pseudo-device ptm on all the generic flavored kernels.
2004-06-16 15:07:39 +00:00
e33c2bb5d5
Add the %MAKEOPTIONSAPPEND token at the end of the file, after the
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common Makefile.kern.inc has been included.
2004-06-04 04:45:49 +00:00
b1998403bc
Back to SIZEOF_HEADERS.
2004-05-24 07:20:26 +00:00
ebfe3ad1ce
Instead of SIZEOF_HEADERS (which ld gets wrong) use 1024 for now.
2004-05-23 16:10:25 +00:00
40559f7fcc
10+ entries in the kernel sources can't be wrong ... no, wait, they can:
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it really is "panicking" instead of "panicing", so revert rev 1.211
thanks to Klaus for holding the spelling bee
2004-05-13 16:34:22 +00:00
e2323790a2
typo in comment: panicking -> panicing
2004-05-13 15:20:18 +00:00
cf098aff50
No need to pull in <bsd_openprom.h> explicitly.
2004-05-13 09:36:44 +00:00
d5cc51b7d3
Remove obsolete `timerok' code, which dates back to when the timer/counter
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interrupt handlers were pre-wired.
2004-05-12 15:44:28 +00:00
19f047f8d0
SIGTRAMP_VALID() should not pollute the user namespace
2004-05-10 21:51:49 +00:00
7b3b647647
Factor out W{CHAR,INT}_{MAX,MIN} into their own header file.
2004-05-08 21:51:47 +00:00
a02ca1366c
viking_module_error: check for unconfigured cpus.
2004-05-07 14:59:26 +00:00
0ba9b6aa91
`uvmexp.swtch++' is already done in exit1().
2004-05-04 15:48:45 +00:00
9c57555f1b
When calculating the allocated symbol table size, round up the section
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sizes with ELF_ALIGN().
Fixes PR port-sparc64/25429.
2004-05-02 19:45:55 +00:00
1af1129600
The cpu_exit() detour is no longer necessary.
2004-05-02 11:22:06 +00:00
4ad27a5358
add COMPAT_20
2004-05-02 03:13:34 +00:00
17e88886cc
pmap_kremove4m,pmap_protect4m,pmap_extract4m: the `demap' lock needs interrupt
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protection.
2004-05-01 08:20:11 +00:00
84af51b7e0
Rename `sc_hasiocache' => `sc_cachecoherent'. Avoid the cache flush in
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dma_load() if we have coherency.
2004-04-28 12:38:19 +00:00
ff7821ed81
Fast trap handler for Illegal Instruction traps for (user space) FLUSH
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instructions (these occur only on Cypress CPUs).
2004-04-28 12:36:48 +00:00
fde3b5dfae
Replace home-grown cachestats with event counters.
2004-04-27 16:37:43 +00:00
cd955b850f
Bits 0 (MMU Enable) and 1 (Fault inhibit) are common among the implementations
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of the SRMMU control register. Reflect that fact in the definitions here.
Also add the swift `store allocate' bit.
2004-04-27 13:05:38 +00:00
202c3ce64e
Add instrumentation for `PMEG' management on sun4/4c.
2004-04-27 11:26:43 +00:00
429ad918eb
Limit buffer cache VM to prevent too many locked `PMEGs' on small sun4c
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systems.
2004-04-27 11:25:24 +00:00
0e5d242328
Update for new pci_devinfo(9) signature.
2004-04-24 15:49:00 +00:00
77addc8b55
Increase buffer size for s[dt]-targets PROM property
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otherwise some machines (including my SS1+) with old PROM fails to get it.
2004-04-23 13:04:59 +00:00
82161a9cbe
Protect against multiple inclusion.
2004-04-23 09:20:20 +00:00
a2ce1a6818
ctx_free: reset the context's page table pointers in each context table.
2004-04-22 11:57:33 +00:00
c996a0d95b
Fix logic botch in previous commit.
2004-04-22 11:45:48 +00:00
4c005fd35b
Mostly undo rev. 1.287: for modified pages a table walk must be forced on
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the next write access to get the modified bit set in the PTE and that
won't happen if it hits the cache.
2004-04-22 10:14:58 +00:00
a22adee52d
Default to not inlining __cpu_simple_lock().
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- the locore version attempts to detect stuck locks
- not inlining saves about 60K on the kernel's text
2004-04-20 15:55:30 +00:00
aa53aca844
Turn __CPU_SIMPLE_LOCK_INLINE into !__CPU_SIMPLE_LOCK_NOINLINE, so we don't
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screw up user land.
2004-04-20 08:48:03 +00:00
e2cab98f9e
Always provide the __cpu_simple_lock() entry point (for LKMs).
2004-04-20 08:38:41 +00:00
ce78973db2
Provide a fast trap path for AST IPIs.
2004-04-20 08:36:46 +00:00
3097bbf440
pmap_extract4m: We can read a spurious invalid pte if the system is in
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the middle of the PTE update protocol. So, if at first we get an invalid
PTE, retry with the demap lock held.
2004-04-19 15:20:42 +00:00
2e643fb9ae
__cpu_simple_lock() isn't a pure function.
2004-04-19 12:41:53 +00:00
a484ad4f3f
CMP_PTE_USER_READ4M: drop instruction that's effectively a no-op.
2004-04-19 10:01:41 +00:00
fecb3b619b
Drop spurious variable.
2004-04-19 08:50:21 +00:00
03a07196d9
srmmu_vcache_flush_page/range: cover the case where we're called during
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bootstrap before the cache parameters are setup.
2004-04-18 21:49:09 +00:00
27f928584a
Code srmmu_vcache_flush_range & srmmu_vcache_flush_page more efficiently.
2004-04-18 20:46:39 +00:00
57bbd955d1
Various ft_srmmu_vcache_*() functions: use `branch on greater (unsigned)'
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instead of `branch on positive'.
2004-04-18 20:44:39 +00:00
68f30ee7af
Make inlining __cpu_simple_lock() optional. Add a version with a built-in
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spin out counter that panics with a diagnostic.
2004-04-18 19:20:09 +00:00
38bdc6fab2
Remove the cache_flush() trampoline; it's no longer directly cross-called.
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Instead, implement the MP parts in terms of cross-callable vcache_flush_range()
function.
2004-04-17 23:45:40 +00:00
66a6704d83
Update fast xcall interrupt event counter.
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ft_srmmu_vcache_flush_range: adjust length for address alignment
2004-04-17 23:28:44 +00:00
e68993f7e4
Add EV_COUNT.
2004-04-17 22:36:54 +00:00
3c3af40e65
Add xcall event counters.
2004-04-17 22:34:14 +00:00
89f5c8768c
When acknowledging a sun4m soft interrupt, read back the pending interrupts
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hw register to make sure it gets through on Ross CPUs.
2004-04-17 11:55:06 +00:00
1e5ff8a716
raise_ipi: don't bother fetching the cpu type from memory in order to
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avoid one instruction.
2004-04-17 11:50:23 +00:00
727a9ca138
The macro CMP_PTE_USER_READ4M now needs to consider more PTE access
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rights combinations, since the access rights table in pmap has changed.
2004-04-17 11:26:36 +00:00
66178209d2
Use fast cross calls for MP cache flush ops.
2004-04-17 10:13:13 +00:00
f714ca590d
Add CPUINFO_XMSG_* symbols for use in fast xcall handlers.
2004-04-17 10:07:58 +00:00
ebfb6e3b0a
Implement fast trap handlers for TLB and cache flushes.
2004-04-17 10:06:29 +00:00
901271fbc8
Use a fast cross call for TLB flushes.
2004-04-17 10:04:20 +00:00
4eac0385f6
xcallintr: arg3 is gone.
2004-04-17 10:01:55 +00:00
8bc2760490
Add support for fast cross call handlers that execute in the trap window
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on the destination CPU. The `fast handler' address takes the place of the
unused fourth argument to xcall().
2004-04-17 10:01:11 +00:00
299dfa38bf
De-__P().
2004-04-15 10:07:32 +00:00
dab35b2e8d
xcall: increase spin-out; fix diag output.
2004-04-15 08:11:20 +00:00
cd891bd771
Re-enable the HyperSPARC on-board instruction cache on multi-processor machines.
2004-04-13 14:55:48 +00:00
86fce030ee
Handle `unimplemented flush' traps by flushing the entire I-cache (if
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there is one).
2004-04-13 14:04:29 +00:00
e76253f84e
Turn FLUSH instructions that wind up here into no-ops.
2004-04-13 14:00:24 +00:00
ebfcdb612b
Drop the special sun4d `tlb flush' lock. The pte update function already
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serialises access to the PTEs to reliably get ref/mod bits.
Rename pte4m_lock => demap_lock.
2004-04-12 14:26:01 +00:00
4f969ab39c
pv_syncflags4m: no need to flush the cache. If the page is still mapped,
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its ref/mod status may change at any moment anyway. If a definitive status
is required the UVM code will unmap the page first.
2004-04-12 12:52:42 +00:00
fd1ba25dd1
Drop sparc_protection_init4m() in favour of a (ro) data initialiser.
2004-04-12 10:00:28 +00:00
9450998e71
pmap_copy_page4m(): we only need to flush the local cache since we use
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private virtual addresses.
2004-04-10 20:51:24 +00:00
9d95da7f96
Remove a number of redundant TLB page flushed, which are now done in
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setpgt4m_va() and updatepte4m() as necessary.
2004-04-10 20:43:02 +00:00
6452e19758
De-__P().
2004-04-10 20:00:29 +00:00
217297d742
Remove a remnant instance of __P().
2004-04-10 19:58:45 +00:00
6d82d89741
Expose CPUSET_ALL to non-MULTIPROCESSOR source.
2004-04-10 19:55:57 +00:00
667d14673b
Group updatepte4m() and the MP & SP versions of setpgt4m_va() together,
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which is just a bit more pleasing to the eyes.
2004-04-10 19:40:19 +00:00
83037215bf
Do not maintain the number of valid pages per segment (`sg_npte') anymore
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for the kernel map on SRMMU machines. This allows pmap_kenter() and
pmap_kremove() to update mappings without needing to lock the pmap
or raising the interrupt level.
2004-04-10 19:22:59 +00:00
2648b0d48c
pmap_protect4m: skip PTE update for invalid pages in the specified range.
2004-04-10 18:48:35 +00:00
f852e1c1e4
setpte4m: remove ineffective debug assertions.
2004-04-10 18:40:04 +00:00
e2b036a2e4
Add comment to indicate that the SunSwift Sbus HME/FAS366 SCSI
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combination board attaches esp* at sbus*; it's not just "older proms"
2004-04-10 04:02:29 +00:00
f95fd4f56f
compat mode: skip double map at VA 0 if the physical load address is 0.
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This allows a much wider range of historic kernels to be booted (w/ `-C').
2004-04-08 07:35:34 +00:00
12d5178857
For now, disable Hypersparc instruction cache on MP machines.
2004-04-04 18:54:01 +00:00
8066aa3aa5
* Allow pv_link4_4c() to fail with ENOMEM on pool allocation failures
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(catching up with pv_link4m()).
* Fix return code checking for pv_link4m() calls.
* Add low water setting to pv pool.
2004-04-04 18:34:35 +00:00
486f4170eb
Remove private declarations of maxdmap and maxsmap.
2004-04-04 18:24:22 +00:00
32a2d102bd
redo previous slightly; move the "int unode;" decl inside the
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if (CPU_ISSUN4D) code block, reducing #ifdef/#endif count by one.
2004-04-04 10:09:41 +00:00
f92c1b091a
Unused variable "unode" caused compiler warning when !defined(SUN4D).
2004-04-04 08:54:29 +00:00
af0db768b1
Maintain pmap resident count as pages are mapped and unmapped instead
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of traversing the page tables each time it's needed.
2004-04-03 23:11:14 +00:00
ec48121fb7
add some SUN4D stuff.
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zs and zstty no longer need "needs-count" or "needs-flag",
so get rid of those and wild-card the extra zs devices on SUN4D.
2004-04-03 17:43:50 +00:00
89e7b5360f
don't complain about mid == 0 on SUN4D, it's normal there.
2004-04-03 17:42:27 +00:00
8e5882e190
add a bootbus (SUN4D) attachment. from Stephen Sukovich in PR 24199.
2004-04-03 17:42:07 +00:00
81f3e5aec7
fix find_cpus() for SUN4D. from Stephen Sukovich in PR 24198.
2004-04-03 17:41:54 +00:00
70e1de69c4
Max data size -> 512MB; default stack size -> 8MB.
2004-04-03 12:39:51 +00:00
5957cb9b16
On sun4c, clip max data & stack size to avoid the MMU hole.
2004-04-03 12:38:14 +00:00
7bbe926f59
iommu_dmamap_load: deal with pmap_extract() failing.
2004-03-28 19:35:13 +00:00
c83eb997b8
nothing cares about __HAVE_SIGINFO anymore, so nuke it
2004-03-26 21:39:57 +00:00
cf8b697c65
remove license clauses 3 and 4 from my cpoyright notices
2004-03-24 17:06:57 +00:00
1fecae985a
Remove my name from the old UCB copyright notice, thereby reducing its
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reference count to 1.
2004-03-24 15:44:46 +00:00
19af35fd0d
Tango on sysctl_createv() and flags. The flags have all been renamed,
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and sysctl_createv() now uses more arguments.
2004-03-24 15:34:46 +00:00
24bb95542f
Add openfirmware() entry point.
2004-03-23 15:36:08 +00:00
bfbcd7cff5
prom_pa_location: re-arrange code a bit; use u_long cast to make this compile on 64 bit systems; to do: openfirmware version of this.
2004-03-23 15:29:56 +00:00
2a62a8f3dd
The function prom_pa_location casts magic spells that probably won't
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work on 64 bit kernels (and at least do not compile). Since this function
is not used there, #ifndef _LP64 it for now.
2004-03-23 11:40:29 +00:00
b744961066
Leverage the PROM's ability to identify the on-board location of a
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physical memory address.
2004-03-22 12:37:43 +00:00
pk