Maintain pmap resident count as pages are mapped and unmapped instead
of traversing the page tables each time it's needed.
This commit is contained in:
pk
parent
bf8f08004d
commit
af0db768b1
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@ -1,4 +1,4 @@
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/* $NetBSD: pmap.h,v 1.70 2003/08/16 19:21:23 pk Exp $ */
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/* $NetBSD: pmap.h,v 1.71 2004/04/03 23:11:14 pk Exp $ */
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/*
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* Copyright (c) 1996
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@ -242,7 +242,7 @@ int pmap_dumpmmu __P((int (*)__P((dev_t, daddr_t, caddr_t, size_t)),
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daddr_t));
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#define pmap_kernel() (&kernel_pmap_store)
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#define pmap_resident_count(pmap) pmap_count_ptes(pmap)
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#define pmap_resident_count(pm) ((pm)->pm_stats.resident_count)
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#define PMAP_PREFER(fo, ap) pmap_prefer((fo), (ap))
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@ -253,7 +253,6 @@ int pmap_dumpmmu __P((int (*)__P((dev_t, daddr_t, caddr_t, size_t)),
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void pmap_activate __P((struct lwp *));
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void pmap_deactivate __P((struct lwp *));
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void pmap_bootstrap __P((int nmmu, int nctx, int nregion));
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int pmap_count_ptes __P((struct pmap *));
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void pmap_prefer __P((vaddr_t, vaddr_t *));
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int pmap_pa_exists __P((paddr_t));
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void pmap_unwire __P((pmap_t, vaddr_t));
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@ -1,4 +1,4 @@
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/* $NetBSD: pmap.c,v 1.276 2004/02/13 11:36:18 wiz Exp $ */
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/* $NetBSD: pmap.c,v 1.277 2004/04/03 23:11:14 pk Exp $ */
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/*
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* Copyright (c) 1996
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@ -56,7 +56,7 @@
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*/
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#include <sys/cdefs.h>
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__KERNEL_RCSID(0, "$NetBSD: pmap.c,v 1.276 2004/02/13 11:36:18 wiz Exp $");
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__KERNEL_RCSID(0, "$NetBSD: pmap.c,v 1.277 2004/04/03 23:11:14 pk Exp $");
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#include "opt_ddb.h"
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#include "opt_kgdb.h"
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@ -1595,6 +1595,7 @@ mmu_setup4m_L3(pagtblptd, sp)
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case SRMMU_TEPTE:
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sp->sg_npte++;
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setpgt4m(&sp->sg_pte[i], te | PPROT_U2S_OMASK);
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pmap_kernel()->pm_stats.resident_count++;
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break;
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case SRMMU_TEPTD:
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panic("mmu_setup4m_L3: PTD found in L3 page table");
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@ -3474,6 +3475,7 @@ pmap_bootstrap4_4c(top, nctx, nregion, nsegment)
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npte = ++scookie < zseg ? NPTESG : lastpage;
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sp->sg_npte = npte;
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sp->sg_nwired = npte;
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pmap_kernel()->pm_stats.resident_count += npte;
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rp->rg_nsegmap += 1;
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for (i = 0; i < npte; i++)
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sp->sg_pte[i] = getpte4(p + i * NBPG) | PG_WIRED;
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@ -3599,6 +3601,7 @@ pmap_bootstrap4_4c(top, nctx, nregion, nsegment)
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sp = &rp->rg_segmap[VA_VSEG(p)];
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sp->sg_nwired--;
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sp->sg_npte--;
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pmap_kernel()->pm_stats.resident_count--;
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sp->sg_pte[VA_VPG(p)] = 0;
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setpte4(p, 0);
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}
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@ -3911,6 +3914,7 @@ pmap_bootstrap4m(top)
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pte |= PPROT_WRITE;
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setpgt4m(ptep, pte);
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pmap_kernel()->pm_stats.resident_count++;
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}
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if ((cpuinfo.flags & CPUFLG_CACHEPAGETABLES) == 0) {
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@ -4750,6 +4754,7 @@ pmap_rmk4_4c(pm, va, endva, vr, vs)
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if (inmmu)
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setpte4(va, 0);
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*ptep = 0;
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pm->pm_stats.resident_count--;
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}
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#ifdef DIAGNOSTIC
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@ -4822,6 +4827,7 @@ pmap_rmk4m(pm, va, endva, vr, vs)
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}
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setpgt4m_va(va, &sp->sg_pte[VA_SUN4M_VPG(va)],
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SRMMU_TEINVALID, 1, 0, CPUSET_ALL);
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pm->pm_stats.resident_count--;
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nleft--;
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#ifdef DIAGNOSTIC
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if (nleft < 0)
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@ -4925,6 +4931,7 @@ pmap_rmu4_4c(pm, va, endva, vr, vs)
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if (pte & PG_WIRED)
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sp->sg_nwired--;
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*ptep = 0;
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pm->pm_stats.resident_count--;
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}
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#ifdef DIAGNOSTIC
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@ -5016,6 +5023,7 @@ pmap_rmu4m(pm, va, endva, vr, vs)
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#endif
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setpgt4m_va(va, &pte0[VA_SUN4M_VPG(va)], SRMMU_TEINVALID,
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pm->pm_ctx != NULL, pm->pm_ctxnum, PMAP_CPUSET(pm));
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pm->pm_stats.resident_count--;
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}
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/*
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@ -5136,6 +5144,7 @@ pmap_page_protect4_4c(pg, prot)
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}
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*ptep = 0;
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pm->pm_stats.resident_count--;
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if (nleft == 0)
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pgt_lvl23_remove4_4c(pm, rp, sp, vr, vs);
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npv = pv->pv_next;
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@ -5425,6 +5434,8 @@ pmap_page_protect4m(pg, prot)
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setpgt4m_va(va, &sp->sg_pte[VA_SUN4M_VPG(va)], SRMMU_TEINVALID,
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pm->pm_ctx != NULL, pm->pm_ctxnum, PMAP_CPUSET(pm));
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pm->pm_stats.resident_count--;
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if ((tpte & SRMMU_TETYPE) != SRMMU_TEPTE)
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panic("pmap_page_protect !PG_V: pg %p va %lx", pg, va);
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@ -5729,6 +5740,7 @@ pmap_enk4_4c(pm, va, prot, flags, pg, pteproto)
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}
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if (pte & PG_WIRED)
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sp->sg_nwired--;
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pm->pm_stats.resident_count--;
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} else {
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/* adding new entry */
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if (sp->sg_npte++ == 0) {
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@ -5754,6 +5766,7 @@ pmap_enk4_4c(pm, va, prot, flags, pg, pteproto)
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*ptep = pteproto;
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if (pteproto & PG_WIRED)
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sp->sg_nwired++;
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pm->pm_stats.resident_count++;
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#ifdef DIAGNOSTIC
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if (sp->sg_nwired > sp->sg_npte || sp->sg_nwired < 0)
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@ -5914,6 +5927,7 @@ pmap_enu4_4c(pm, va, prot, flags, pg, pteproto)
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}
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if (pte & PG_WIRED)
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sp->sg_nwired--;
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pm->pm_stats.resident_count--;
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} else {
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/* adding new entry */
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sp->sg_npte++;
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@ -5934,6 +5948,7 @@ pmap_enu4_4c(pm, va, prot, flags, pg, pteproto)
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*ptep = pteproto;
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if (pteproto & PG_WIRED)
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sp->sg_nwired++;
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pm->pm_stats.resident_count++;
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#ifdef DIAGNOSTIC
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if (sp->sg_nwired > sp->sg_npte || sp->sg_nwired < 0)
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@ -6344,6 +6359,7 @@ printf("pmap_enk4m: changing existing va=>pa entry: va 0x%lx, pteproto 0x%x, "
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setpgt4m_va(va, &sp->sg_pte[VA_SUN4M_VPG(va)],
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SRMMU_TEINVALID, pm->pm_ctx != NULL,
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pm->pm_ctxnum, PMAP_CPUSET(pm));
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pm->pm_stats.resident_count--;
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} else {
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/* adding new entry */
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sp->sg_npte++;
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@ -6360,6 +6376,7 @@ printf("pmap_enk4m: changing existing va=>pa entry: va 0x%lx, pteproto 0x%x, "
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}
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setpgt4m(&sp->sg_pte[VA_SUN4M_VPG(va)], pteproto);
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pm->pm_stats.resident_count++;
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out:
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simple_unlock(&pm->pm_lock);
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PMAP_MAP_TO_HEAD_UNLOCK();
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@ -6536,6 +6553,7 @@ pmap_enu4m(pm, va, prot, flags, pg, pteproto)
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setpgt4m_va(va, &sp->sg_pte[VA_SUN4M_VPG(va)],
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SRMMU_TEINVALID, pm->pm_ctx != NULL,
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pm->pm_ctxnum, PMAP_CPUSET(pm));
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pm->pm_stats.resident_count--;
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} else {
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/* adding new entry */
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sp->sg_npte++;
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@ -6562,6 +6580,7 @@ pmap_enu4m(pm, va, prot, flags, pg, pteproto)
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* Update PTEs, flush TLB as necessary.
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*/
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setpgt4m(&sp->sg_pte[VA_SUN4M_VPG(va)], pteproto);
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pm->pm_stats.resident_count++;
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out:
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simple_unlock(&pm->pm_lock);
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@ -7496,33 +7515,6 @@ kvm_iocache(va, npages)
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#endif
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}
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int
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pmap_count_ptes(pm)
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struct pmap *pm;
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{
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int idx, vs, total;
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struct regmap *rp;
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struct segmap *sp;
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if (pm == pmap_kernel()) {
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rp = &pm->pm_regmap[NUREG];
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idx = NKREG;
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} else {
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rp = pm->pm_regmap;
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idx = NUREG;
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}
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for (total = 0; idx;) {
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if ((sp = rp[--idx].rg_segmap) == NULL) {
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continue;
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}
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for (vs = 0; vs < NSEGRG; vs++) {
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total += sp[vs].sg_npte;
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}
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}
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pm->pm_stats.resident_count = total;
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return (total);
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}
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/*
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* Find first virtual address >= *va that is
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* least likely to cause cache aliases.
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