- use primary MMU context for consistency with other trap/interrupt handlers.
sparc64_ipi_save_fpstate, savefpstate:
- avoid storing fp registers as we can.
sparc64_ipi_save_fpstate, savefpstate, loadfpstate:
- remove unaligned case since buffers allocated with pool_cache are ensured
64-byte aligned.
Ok by martin@.
- don't use separate statintr on primary CPU.
- invoke clockintr instead of statintr on secondary CPUs.
This change fixes the problem setitimer(2) didn't work on secodary CPUs.
- make IPI takes two arguments.
- add IPI event counters per-CPU.
- implement IPI functions which were missing or broken.
- insert DELAY while halting primary CPU in IPI handler.
cpu. There is a tiny bit of cheating involved, but I assume we won't run
parallel + recursive ddb scripts to play towers of hanoi.
This fixes the wrong prompt, and (more importantly) makes things like
"mach dtlb" display the registers of the right MMU.
- Reduce available SPL levels for hardware devices to none, vm, sched, high.
- Acquire kernel_lock only for interrupts at IPL_VM.
- Implement threaded soft interrupts.
done via locked 4 MB pages. The old format could only record physically
continous kernel text mappings.
For compatibility reasons, just extend the structure and fill in all the
old fields as well.
This branch was a major cleanup and rototill of many of the various OEA
cpu based PPC ports that focused on sharing as much code as possible
between the various ports to eliminate near-identical copies of files in
every tree. Additionally there is a new PIC system that unifies the
interface to interrupt code for all different OEA ppc arches. The work
for this branch was done by a variety of people, too long to list here.
TODO:
bebox still needs work to complete the transition to -renovation.
ofppc still needs a bunch of work, which I will be looking at.
ev64260 still needs to be renovated
amigappc was not attempted.
NOTES:
pmppc was removed as an arch, and moved to a evbppc target.
of the corresponding 32bit architecture.
Use it for the 64bit items in netbsd32_statvfs so that the structure
doesn't collect 8byte alignment (and 4 bytes of trailing padding).
This replaces the 'packed' attribute which wasn't architecture specific
and would cause massive overheads accessing every member of sparc64.
Should allow the MIPS64 port do DTRT.
