Make schedintr interrupt handler per-CPU.
While there rename tickintr interrupt handler and share initialization code with schedintr.
This commit is contained in:
nakayama
parent
5a25c0ad57
commit
6456819faa
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@ -1,4 +1,4 @@
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/* $NetBSD: cpu.h,v 1.76 2008/03/14 15:38:00 nakayama Exp $ */
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/* $NetBSD: cpu.h,v 1.77 2008/03/17 04:04:00 nakayama Exp $ */
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/*
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* Copyright (c) 1992, 1993
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@ -127,7 +127,8 @@ struct cpu_info {
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/* Interrupts */
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struct intrhand *ci_intrpending[16];
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struct intrhand *ci_intrlev0;
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struct intrhand *ci_tick_ih;
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struct intrhand *ci_sched_ih;
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/* Event counters */
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struct evcnt ci_tick_evcnt;
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@ -317,6 +318,7 @@ extern struct intrhand *intrhand[];
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extern struct intrhand *intrlev[MAXINTNUM];
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void intr_establish(int level, struct intrhand *);
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struct intrhand *init_softint(int, int (*)(void *));
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/* disksubr.c */
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struct dkbad;
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@ -328,6 +330,7 @@ struct timeval;
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int tickintr(void *); /* level 10/14 (tick) interrupt code */
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int clockintr(void *); /* level 10 (clock) interrupt code */
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int statintr(void *); /* level 14 (statclock) interrupt code */
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int schedintr(void *); /* level 10 (schedclock) interrupt code */
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void tickintr_establish(int, int (*)(void *));
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/* locore.s */
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struct fpstate64;
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@ -1,4 +1,4 @@
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/* $NetBSD: clock.c,v 1.91 2008/03/15 20:14:17 nakayama Exp $ */
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/* $NetBSD: clock.c,v 1.92 2008/03/17 04:04:00 nakayama Exp $ */
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/*
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* Copyright (c) 1992, 1993
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@ -55,7 +55,7 @@
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*/
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#include <sys/cdefs.h>
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__KERNEL_RCSID(0, "$NetBSD: clock.c,v 1.91 2008/03/15 20:14:17 nakayama Exp $");
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__KERNEL_RCSID(0, "$NetBSD: clock.c,v 1.92 2008/03/17 04:04:00 nakayama Exp $");
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#include "opt_multiprocessor.h"
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@ -124,7 +124,6 @@ static struct intrhand level10 = { .ih_fun = clockintr };
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#ifndef MULTIPROCESSOR
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static struct intrhand level14 = { .ih_fun = statintr };
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#endif
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static struct intrhand schedint = { .ih_fun = schedintr };
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static int timermatch(struct device *, struct cfdata *, void *);
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static void timerattach(struct device *, struct device *, void *);
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@ -317,21 +316,11 @@ tickintr_establish(int pil, int (*fun)(void *))
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int s;
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struct intrhand *ih;
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ih = malloc(sizeof(struct intrhand), M_DEVBUF, M_NOWAIT|M_ZERO);
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KASSERT(ih != NULL);
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ih->ih_fun = fun;
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ih->ih_arg = 0;
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ih->ih_clr = 0;
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ih = init_softint(pil, fun);
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ih->ih_number = 1;
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if (CPU_IS_PRIMARY(curcpu()))
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intr_establish(pil, ih);
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else {
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ih->ih_pil = pil;
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ih->ih_pending = 0;
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ih->ih_next = NULL;
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}
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curcpu()->ci_intrlev0 = ih;
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curcpu()->ci_tick_ih = ih;
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/* set the next interrupt time */
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curcpu()->ci_tick_increment = curcpu()->ci_cpu_clockrate[0] / hz;
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@ -436,10 +425,7 @@ cpu_initclocks()
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/*
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* Establish scheduler softint.
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*/
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schedint.ih_pil = PIL_SCHED;
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schedint.ih_clr = NULL;
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schedint.ih_arg = 0;
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schedint.ih_pending = 0;
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curcpu()->ci_sched_ih = init_softint(PIL_SCHED, schedintr);
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schedhz = stathz/4;
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/*
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@ -594,7 +580,7 @@ statintr(cap)
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if (schedhz)
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if ((++ci->ci_schedstate.spc_schedticks & 3) == 0)
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send_softint(-1, PIL_SCHED, &schedint);
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send_softint(-1, PIL_SCHED, curcpu()->ci_sched_ih);
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#ifdef MULTIPROCESSOR
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s = intr_disable();
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next_tick(newint);
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@ -1,4 +1,4 @@
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/* $NetBSD: cpu.c,v 1.71 2008/03/15 20:14:17 nakayama Exp $ */
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/* $NetBSD: cpu.c,v 1.72 2008/03/17 04:04:00 nakayama Exp $ */
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/*
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* Copyright (c) 1996
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@ -52,7 +52,7 @@
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*/
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#include <sys/cdefs.h>
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__KERNEL_RCSID(0, "$NetBSD: cpu.c,v 1.71 2008/03/15 20:14:17 nakayama Exp $");
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__KERNEL_RCSID(0, "$NetBSD: cpu.c,v 1.72 2008/03/17 04:04:00 nakayama Exp $");
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#include "opt_multiprocessor.h"
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@ -421,6 +421,7 @@ cpu_hatch()
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cpu_reset_fpustate();
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curlwp = curcpu()->ci_data.cpu_idlelwp;
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membar_sync();
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curcpu()->ci_sched_ih = init_softint(PIL_SCHED, schedintr);
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tickintr_establish(PIL_STATCLOCK, statintr);
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spl0();
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}
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@ -1,4 +1,4 @@
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# $NetBSD: genassym.cf,v 1.54 2008/03/14 15:38:00 nakayama Exp $
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# $NetBSD: genassym.cf,v 1.55 2008/03/17 04:04:00 nakayama Exp $
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#
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# Copyright (c) 1997 The NetBSD Foundation, Inc.
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@ -174,7 +174,7 @@ define CI_IDLELWP offsetof(struct cpu_info, ci_data.cpu_idlelwp)
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define CI_CLOCKRATE offsetof(struct cpu_info, ci_cpu_clockrate)
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define CI_IDEPTH offsetof(struct cpu_info, ci_idepth)
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define CI_INTRPENDING offsetof(struct cpu_info, ci_intrpending)
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define CI_INTRLEV0 offsetof(struct cpu_info, ci_intrlev0)
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define CI_TICK_IH offsetof(struct cpu_info, ci_tick_ih)
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define CI_CTXBUSY offsetof(struct cpu_info, ci_ctxbusy)
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define CI_TSB_DMMU offsetof(struct cpu_info, ci_tsb_dmmu)
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define CI_TSB_IMMU offsetof(struct cpu_info, ci_tsb_immu)
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@ -1,4 +1,4 @@
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/* $NetBSD: intr.c,v 1.56 2008/03/02 15:28:26 nakayama Exp $ */
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/* $NetBSD: intr.c,v 1.57 2008/03/17 04:04:00 nakayama Exp $ */
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/*
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* Copyright (c) 1992, 1993
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@ -41,7 +41,7 @@
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*/
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#include <sys/cdefs.h>
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__KERNEL_RCSID(0, "$NetBSD: intr.c,v 1.56 2008/03/02 15:28:26 nakayama Exp $");
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__KERNEL_RCSID(0, "$NetBSD: intr.c,v 1.57 2008/03/17 04:04:00 nakayama Exp $");
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#include "opt_ddb.h"
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#include "opt_multiprocessor.h"
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@ -239,3 +239,20 @@ intr_establish(int level, struct intrhand *ih)
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splx(s);
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}
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/*
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* Prepare an interrupt handler used for send_softint.
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*/
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struct intrhand *
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init_softint(int pil, int (*fun)(void *))
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{
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struct intrhand *ih;
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ih = malloc(sizeof(struct intrhand), M_DEVBUF, M_NOWAIT|M_ZERO);
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if (ih == NULL)
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panic("could not allocate softint interrupt handler");
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ih->ih_fun = fun;
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ih->ih_pil = pil;
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return ih;
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}
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@ -1,4 +1,4 @@
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/* $NetBSD: locore.s,v 1.270 2008/03/14 15:38:00 nakayama Exp $ */
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/* $NetBSD: locore.s,v 1.271 2008/03/17 04:04:00 nakayama Exp $ */
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/*
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* Copyright (c) 1996-2002 Eduardo Horvath
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@ -4048,10 +4048,10 @@ ENTRY_NOPROFILE(sparc_interrupt)
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rd SOFTINT, %g1
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btst 1, %g1
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bz,pt %icc, 0f
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sethi %hi(CPUINFO_VA+CI_INTRLEV0), %g3
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sethi %hi(CPUINFO_VA+CI_TICK_IH), %g3
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wr %g0, 1, CLEAR_SOFTINT
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ba,pt %icc, setup_sparcintr
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LDPTR [%g3 + %lo(CPUINFO_VA+CI_INTRLEV0)], %g5
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LDPTR [%g3 + %lo(CPUINFO_VA+CI_TICK_IH)], %g5
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0:
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! Increment the per-cpu interrupt level
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