diff --git a/sys/arch/sparc64/include/cpu.h b/sys/arch/sparc64/include/cpu.h
index ab8e9579364f..d294fff0222a 100644
--- a/sys/arch/sparc64/include/cpu.h
+++ b/sys/arch/sparc64/include/cpu.h
@@ -1,4 +1,4 @@
-/*	$NetBSD: cpu.h,v 1.76 2008/03/14 15:38:00 nakayama Exp $ */
+/*	$NetBSD: cpu.h,v 1.77 2008/03/17 04:04:00 nakayama Exp $ */
 
 /*
  * Copyright (c) 1992, 1993
@@ -127,7 +127,8 @@ struct cpu_info {
 
 	/* Interrupts */
 	struct intrhand		*ci_intrpending[16];
-	struct intrhand		*ci_intrlev0;
+	struct intrhand		*ci_tick_ih;
+	struct intrhand		*ci_sched_ih;
 
 	/* Event counters */
 	struct evcnt		ci_tick_evcnt;
@@ -317,6 +318,7 @@ extern struct intrhand *intrhand[];
 extern struct intrhand *intrlev[MAXINTNUM];
 
 void	intr_establish(int level, struct intrhand *);
+struct intrhand *init_softint(int, int (*)(void *));
 
 /* disksubr.c */
 struct dkbad;
@@ -328,6 +330,7 @@ struct timeval;
 int	tickintr(void *);	/* level 10/14 (tick) interrupt code */
 int	clockintr(void *);	/* level 10 (clock) interrupt code */
 int	statintr(void *);	/* level 14 (statclock) interrupt code */
+int	schedintr(void *);	/* level 10 (schedclock) interrupt code */
 void	tickintr_establish(int, int (*)(void *));
 /* locore.s */
 struct fpstate64;
diff --git a/sys/arch/sparc64/sparc64/clock.c b/sys/arch/sparc64/sparc64/clock.c
index f3949e6496c9..a08c0114f415 100644
--- a/sys/arch/sparc64/sparc64/clock.c
+++ b/sys/arch/sparc64/sparc64/clock.c
@@ -1,4 +1,4 @@
-/*	$NetBSD: clock.c,v 1.91 2008/03/15 20:14:17 nakayama Exp $ */
+/*	$NetBSD: clock.c,v 1.92 2008/03/17 04:04:00 nakayama Exp $ */
 
 /*
  * Copyright (c) 1992, 1993
@@ -55,7 +55,7 @@
  */
 
 #include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: clock.c,v 1.91 2008/03/15 20:14:17 nakayama Exp $");
+__KERNEL_RCSID(0, "$NetBSD: clock.c,v 1.92 2008/03/17 04:04:00 nakayama Exp $");
 
 #include "opt_multiprocessor.h"
 
@@ -124,7 +124,6 @@ static struct intrhand level10 = { .ih_fun = clockintr };
 #ifndef MULTIPROCESSOR
 static struct intrhand level14 = { .ih_fun = statintr };
 #endif
-static struct intrhand schedint = { .ih_fun = schedintr };
 
 static int	timermatch(struct device *, struct cfdata *, void *);
 static void	timerattach(struct device *, struct device *, void *);
@@ -317,21 +316,11 @@ tickintr_establish(int pil, int (*fun)(void *))
 	int s;
 	struct intrhand *ih;
 
-	ih = malloc(sizeof(struct intrhand), M_DEVBUF, M_NOWAIT|M_ZERO);
-	KASSERT(ih != NULL);
-
-	ih->ih_fun = fun;
-	ih->ih_arg = 0;
-	ih->ih_clr = 0;
+	ih = init_softint(pil, fun);
 	ih->ih_number = 1;
 	if (CPU_IS_PRIMARY(curcpu()))
 		intr_establish(pil, ih);
-	else {
-		ih->ih_pil = pil;
-		ih->ih_pending = 0;
-		ih->ih_next = NULL;
-	}
-	curcpu()->ci_intrlev0 = ih;
+	curcpu()->ci_tick_ih = ih;
 
 	/* set the next interrupt time */
 	curcpu()->ci_tick_increment = curcpu()->ci_cpu_clockrate[0] / hz;
@@ -436,10 +425,7 @@ cpu_initclocks()
 	/* 
 	 * Establish scheduler softint.
 	 */
-	schedint.ih_pil = PIL_SCHED;
-	schedint.ih_clr = NULL;
-	schedint.ih_arg = 0;
-	schedint.ih_pending = 0;
+	curcpu()->ci_sched_ih = init_softint(PIL_SCHED, schedintr);
 	schedhz = stathz/4;
 
 	/* 
@@ -594,7 +580,7 @@ statintr(cap)
 
 	if (schedhz)
 		if ((++ci->ci_schedstate.spc_schedticks & 3) == 0)
-			send_softint(-1, PIL_SCHED, &schedint);
+			send_softint(-1, PIL_SCHED, curcpu()->ci_sched_ih);
 #ifdef MULTIPROCESSOR
 	s = intr_disable();
 	next_tick(newint);
diff --git a/sys/arch/sparc64/sparc64/cpu.c b/sys/arch/sparc64/sparc64/cpu.c
index 09b300fb2e21..d0285c05d3c0 100644
--- a/sys/arch/sparc64/sparc64/cpu.c
+++ b/sys/arch/sparc64/sparc64/cpu.c
@@ -1,4 +1,4 @@
-/*	$NetBSD: cpu.c,v 1.71 2008/03/15 20:14:17 nakayama Exp $ */
+/*	$NetBSD: cpu.c,v 1.72 2008/03/17 04:04:00 nakayama Exp $ */
 
 /*
  * Copyright (c) 1996
@@ -52,7 +52,7 @@
  */
 
 #include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: cpu.c,v 1.71 2008/03/15 20:14:17 nakayama Exp $");
+__KERNEL_RCSID(0, "$NetBSD: cpu.c,v 1.72 2008/03/17 04:04:00 nakayama Exp $");
 
 #include "opt_multiprocessor.h"
 
@@ -421,6 +421,7 @@ cpu_hatch()
 	cpu_reset_fpustate();
 	curlwp = curcpu()->ci_data.cpu_idlelwp;
 	membar_sync();
+	curcpu()->ci_sched_ih = init_softint(PIL_SCHED, schedintr);
 	tickintr_establish(PIL_STATCLOCK, statintr);
 	spl0();
 }
diff --git a/sys/arch/sparc64/sparc64/genassym.cf b/sys/arch/sparc64/sparc64/genassym.cf
index 00024f44b37c..4f271812307e 100644
--- a/sys/arch/sparc64/sparc64/genassym.cf
+++ b/sys/arch/sparc64/sparc64/genassym.cf
@@ -1,4 +1,4 @@
-#	$NetBSD: genassym.cf,v 1.54 2008/03/14 15:38:00 nakayama Exp $
+#	$NetBSD: genassym.cf,v 1.55 2008/03/17 04:04:00 nakayama Exp $
 
 #
 # Copyright (c) 1997 The NetBSD Foundation, Inc.
@@ -174,7 +174,7 @@ define	CI_IDLELWP	offsetof(struct cpu_info, ci_data.cpu_idlelwp)
 define	CI_CLOCKRATE	offsetof(struct cpu_info, ci_cpu_clockrate)
 define	CI_IDEPTH	offsetof(struct cpu_info, ci_idepth)
 define	CI_INTRPENDING	offsetof(struct cpu_info, ci_intrpending)
-define	CI_INTRLEV0	offsetof(struct cpu_info, ci_intrlev0)
+define	CI_TICK_IH	offsetof(struct cpu_info, ci_tick_ih)
 define	CI_CTXBUSY	offsetof(struct cpu_info, ci_ctxbusy)
 define	CI_TSB_DMMU	offsetof(struct cpu_info, ci_tsb_dmmu)
 define	CI_TSB_IMMU	offsetof(struct cpu_info, ci_tsb_immu)
diff --git a/sys/arch/sparc64/sparc64/intr.c b/sys/arch/sparc64/sparc64/intr.c
index d225edae79cb..8e158299f2f1 100644
--- a/sys/arch/sparc64/sparc64/intr.c
+++ b/sys/arch/sparc64/sparc64/intr.c
@@ -1,4 +1,4 @@
-/*	$NetBSD: intr.c,v 1.56 2008/03/02 15:28:26 nakayama Exp $ */
+/*	$NetBSD: intr.c,v 1.57 2008/03/17 04:04:00 nakayama Exp $ */
 
 /*
  * Copyright (c) 1992, 1993
@@ -41,7 +41,7 @@
  */
 
 #include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: intr.c,v 1.56 2008/03/02 15:28:26 nakayama Exp $");
+__KERNEL_RCSID(0, "$NetBSD: intr.c,v 1.57 2008/03/17 04:04:00 nakayama Exp $");
 
 #include "opt_ddb.h"
 #include "opt_multiprocessor.h"
@@ -239,3 +239,20 @@ intr_establish(int level, struct intrhand *ih)
 
 	splx(s);
 }
+
+/*
+ * Prepare an interrupt handler used for send_softint.
+ */
+struct intrhand *
+init_softint(int pil, int (*fun)(void *))
+{
+	struct intrhand *ih;
+
+	ih = malloc(sizeof(struct intrhand), M_DEVBUF, M_NOWAIT|M_ZERO);
+	if (ih == NULL)
+		panic("could not allocate softint interrupt handler");
+
+	ih->ih_fun = fun;
+	ih->ih_pil = pil;
+	return ih;
+}
diff --git a/sys/arch/sparc64/sparc64/locore.s b/sys/arch/sparc64/sparc64/locore.s
index b5b55837a42f..8d3cbd5e49fb 100644
--- a/sys/arch/sparc64/sparc64/locore.s
+++ b/sys/arch/sparc64/sparc64/locore.s
@@ -1,4 +1,4 @@
-/*	$NetBSD: locore.s,v 1.270 2008/03/14 15:38:00 nakayama Exp $	*/
+/*	$NetBSD: locore.s,v 1.271 2008/03/17 04:04:00 nakayama Exp $	*/
 
 /*
  * Copyright (c) 1996-2002 Eduardo Horvath
@@ -4048,10 +4048,10 @@ ENTRY_NOPROFILE(sparc_interrupt)
 	rd	SOFTINT, %g1
 	btst	1, %g1
 	bz,pt	%icc, 0f
-	 sethi	%hi(CPUINFO_VA+CI_INTRLEV0), %g3
+	 sethi	%hi(CPUINFO_VA+CI_TICK_IH), %g3
 	wr	%g0, 1, CLEAR_SOFTINT
 	ba,pt	%icc, setup_sparcintr
-	 LDPTR	[%g3 + %lo(CPUINFO_VA+CI_INTRLEV0)], %g5
+	 LDPTR	[%g3 + %lo(CPUINFO_VA+CI_TICK_IH)], %g5
 0:
 
 	! Increment the per-cpu interrupt level