Remove the (now unused) second 64k page mapped per CPU.

From matthew green, with small changes by me. All bugs are mine.
This commit is contained in:
martin 2007-09-06 20:22:51 +00:00
parent c5afd73c62
commit 5bb7297fe4
5 changed files with 36 additions and 79 deletions

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@ -1,4 +1,4 @@
/* $NetBSD: param.h,v 1.40 2007/08/25 19:16:10 martin Exp $ */
/* $NetBSD: param.h,v 1.41 2007/09/06 20:22:51 martin Exp $ */
/*
* Copyright (c) 1992, 1993
@ -167,11 +167,8 @@ extern int nbpg, pgofset, pgshift;
* and panicstack (32KB)
* KERNEND+0x018000: CPUINFO_VA -- cpu_info structure
* KERNEND+0x020000: unmapped space (top of panicstack)
* KERNEND+0x030000: KSTACK_VA -- per-cpu 64K locked TTE
* bottom of kernel stack
* KERNEND+0x040000: INITSTACK_VA -- initial kernel stack pointer
* KERNEND+0x040000: IODEV_BASE -- begin mapping IO devices here.
* 0x00000000fe000000: IODEV_END -- end of device mapping space.
* KERNEND+0x022000: IODEV_BASE -- begin mapping IO devices here.
* 0x00000000f0000000: IODEV_END -- end of device mapping space.
*
*/
#define KERNBASE 0x001000000 /* start of kernel virtual space */
@ -186,14 +183,12 @@ extern int nbpg, pgofset, pgshift;
/*
* Here's the location of the interrupt stack and CPU structure.
*/
#define INTSTACK ( KERNEND + 8*_MAXNBPG)
#define EINTSTACK ( INTSTACK + 4*_MAXNBPG)
#define INTSTACK ( KERNEND + 8*_MAXNBPG)
#define EINTSTACK ( INTSTACK + 4*_MAXNBPG)
#define CPUINFO_VA ( EINTSTACK )
#define PANICSTACK ( INTSTACK + 8*_MAXNBPG)
#define KSTACK_VA ( INTSTACK + 16*_MAXNBPG) /* make this 16 to have a redzone */
/* #define INITSTACK_VA ( KSTACK_VA + 8*_MAXNBPG) */
#define IODEV_BASE ( KSTACK_VA + 8*_MAXNBPG)
#define IODEV_END 0x0f0000000UL /* 16 MB of iospace */
#define PANICSTACK ( INTSTACK + 8*_MAXNBPG)
#define IODEV_BASE ( INTSTACK + 9*_MAXNBPG) /* 1 page redzone */
#define IODEV_END 0x0f0000000UL /* ~16 MB of iospace */
/*
* Constants related to network buffer management.

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@ -1,4 +1,4 @@
/* $NetBSD: cpu.c,v 1.60 2007/08/25 19:16:10 martin Exp $ */
/* $NetBSD: cpu.c,v 1.61 2007/09/06 20:22:51 martin Exp $ */
/*
* Copyright (c) 1996
@ -52,7 +52,7 @@
*/
#include <sys/cdefs.h>
__KERNEL_RCSID(0, "$NetBSD: cpu.c,v 1.60 2007/08/25 19:16:10 martin Exp $");
__KERNEL_RCSID(0, "$NetBSD: cpu.c,v 1.61 2007/09/06 20:22:51 martin Exp $");
#include <sys/param.h>
#include <sys/systm.h>
@ -103,7 +103,7 @@ alloc_cpuinfo(u_int cpu_node)
{
paddr_t pa0, pa;
vaddr_t va, va0;
vsize_t sz = 16 * PAGE_SIZE;
vsize_t sz = 8 * PAGE_SIZE;
int portid;
struct cpu_info *cpi, *ci;
extern paddr_t cpu0paddr;

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@ -1,4 +1,4 @@
/* $NetBSD: locore.s,v 1.256 2007/08/25 19:16:10 martin Exp $ */
/* $NetBSD: locore.s,v 1.257 2007/09/06 20:22:51 martin Exp $ */
/*
* Copyright (c) 1996-2002 Eduardo Horvath
@ -4970,29 +4970,16 @@ ENTRY_NOPROFILE(cpu_initialize) /* for cosmetic reasons - nicer backtrace */
andn %l1, %l4, %l1 ! Mask the phys page number
or %l2, %l1, %l1 ! Now take care of the high bits
or %l1, TTE_DATABITS, %l2 ! And low bits: L=1|CP=1|CV=?|E=0|P=1|W=0|G=0
or %l1, TTE_DATABITS, %l2 ! And low bits: L=1|CP=1|CV=?|E=0|P=1|W=1|G=0
!!
!! Now, map in the interrupt stack as context==0
!!
set TLB_TAG_ACCESS, %l5
set 1f, %o5
sethi %hi(INTSTACK), %l0
set INTSTACK, %l0
stxa %l0, [%l5] ASI_DMMU ! Make DMMU point to it
membar #Sync ! We may need more membar #Sync in here
stxa %l2, [%g0] ASI_DMMU_DATA_IN ! Store it
membar #Sync ! We may need more membar #Sync in here
flush %o5
1:
!!
!! Map in idle u area and kernel stack
!!
sethi %hi(KSTACK_VA), %l0
stxa %l0, [%l5] ASI_DMMU ! Make DMMU point to it
membar #Sync
stxa %l2, [%g0] ASI_DMMU_DATA_IN ! Store it
membar #Sync
flush %o5
!! Setup kernel stack (we rely on curlwp on this cpu
!! being lwp0 here and it's uarea is mapped special
@ -5047,12 +5034,14 @@ ENTRY_NOPROFILE(cpu_initialize) /* for cosmetic reasons - nicer backtrace */
andn %l0, %l3, %l0 ! Mask off size and split bits
or %l0, %l2, %l0 ! Make a TSB pointer
stxa %l0, [%l4] ASI_DMMU ! Install data TSB pointer
membar #Sync
andn %l1, %l3, %l1 ! Mask off size and split bits
or %l1, %l2, %l1 ! Make a TSB pointer
stxa %l1, [%l4] ASI_IMMU ! Install instruction TSB pointer
membar #Sync
set 1f, %l1
flush %l1
1:
/* set trap table */
set _C_LABEL(trapbase), %l1
@ -5117,8 +5106,9 @@ ENTRY_NOPROFILE(cpu_initialize) /* for cosmetic reasons - nicer backtrace */
*/
ENTRY(cpu_mp_startup)
wrpr %g0, 0, %cleanwin
! wrpr %g0, 0, %pstate
wrpr %g0, 0, %tl ! Make sure we're not in NUCLEUS mode
wrpr %g0, WSTATE_KERN, %wstate
wrpr %g0, PSTATE_KERN, %pstate
flushw
/*
@ -5132,42 +5122,22 @@ ENTRY(cpu_mp_startup)
or %l4, 0xfff, %l4 ! We can just load this in 12 (of 13) bits
andn %l1, %l4, %l1 ! Mask the phys page number
or %l2, %l1, %l1 ! Now take care of the high bits
#ifdef NO_VCACHE
or %l1, TTE_L|TTE_CP|TTE_P|TTE_W, %l2 ! And low bits: L=1|CP=1|CV=0|E=0|P=1|W=0|G=0
#else
or %l1, TTE_L|TTE_CP|TTE_CV|TTE_P|TTE_W, %l2 ! And low bits: L=1|CP=1|CV=1|E=0|P=1|W=0|G=0
#endif
or %l1, TTE_DATABITS, %l2 ! And low bits: L=1|CP=1|CV=?|E=0|P=1|W=1|G=0
/*
* Now, map in the interrupt stack & cpu_info as context==0
*/
set TLB_TAG_ACCESS, %l5
set 1f, %o5
set INTSTACK, %l0
stxa %l0, [%l5] ASI_DMMU ! Make DMMU point to it
membar #Sync
stxa %l2, [%g0] ASI_DMMU_DATA_IN ! Store it
membar #Sync
flush %o5
flush %l0
1:
/*
* Map in idle u area and kernel stack
*/
set KSTACK_VA, %l0
stxa %l0, [%l5] ASI_DMMU ! Make DMMU point to it
membar #Sync
stxa %l2, [%g0] ASI_DMMU_DATA_IN ! Store it
membar #Sync
flush %o5
flush %l0
/*
* Set 0 as primary context XXX
*/
mov CTX_PRIMARY, %o0
stxa %g0, [%o0] ASI_DMMU
flush %o5
membar #Sync
/*
* Temporarily use the interrupt stack
@ -5203,6 +5173,9 @@ ENTRY(cpu_mp_startup)
or %l1, %l2, %l1 ! Make a TSB pointer
stxa %l1, [%l4] ASI_IMMU ! Install instruction TSB pointer
membar #Sync
set 1f, %o0
flush %o0
1:
/* set trap table */
set _C_LABEL(trapbase), %l1
@ -5223,6 +5196,7 @@ ENTRY(cpu_mp_startup)
sub %l0, BIAS, %l0 ! and biased
#endif
mov %l0, %sp
flushw
/*
* Switch to the kernel mode and run away.
@ -5230,7 +5204,6 @@ ENTRY(cpu_mp_startup)
wrpr %g0, 13, %pil
wrpr %g0, PSTATE_INTR|PSTATE_PEF, %pstate
wr %g0, FPRS_FEF, %fprs ! Turn on FPU
wrpr %g0, WSTATE_KERN, %wstate
call _C_LABEL(cpu_hatch)
clr %g4

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@ -1,4 +1,4 @@
/* $NetBSD: machdep.c,v 1.200 2007/07/09 20:52:32 ad Exp $ */
/* $NetBSD: machdep.c,v 1.201 2007/09/06 20:22:52 martin Exp $ */
/*-
* Copyright (c) 1996, 1997, 1998 The NetBSD Foundation, Inc.
@ -78,7 +78,7 @@
*/
#include <sys/cdefs.h>
__KERNEL_RCSID(0, "$NetBSD: machdep.c,v 1.200 2007/07/09 20:52:32 ad Exp $");
__KERNEL_RCSID(0, "$NetBSD: machdep.c,v 1.201 2007/09/06 20:22:52 martin Exp $");
#include "opt_ddb.h"
#include "opt_multiprocessor.h"
@ -1513,7 +1513,6 @@ static int sparc_bus_alloc(bus_space_tag_t, bus_addr_t, bus_addr_t, bus_size_t,
bus_size_t, bus_size_t, int, bus_addr_t *, bus_space_handle_t *);
static void sparc_bus_free(bus_space_tag_t, bus_space_handle_t, bus_size_t);
vaddr_t iobase = IODEV_BASE;
struct extent *io_space = NULL;
/*
@ -1575,8 +1574,6 @@ sparc_bus_map(bus_space_tag_t t, bus_addr_t addr, bus_size_t size,
vm_prot_t pm_prot = VM_PROT_READ;
int err, map_little = 0;
if (iobase == 0UL)
iobase = IODEV_BASE;
if (io_space == NULL)
/*
* And set up IOSPACE extents.

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@ -1,4 +1,4 @@
/* $NetBSD: pmap.c,v 1.194 2007/09/06 19:36:33 martin Exp $ */
/* $NetBSD: pmap.c,v 1.195 2007/09/06 20:22:52 martin Exp $ */
/*
*
* Copyright (C) 1996-1999 Eduardo Horvath.
@ -26,7 +26,7 @@
*/
#include <sys/cdefs.h>
__KERNEL_RCSID(0, "$NetBSD: pmap.c,v 1.194 2007/09/06 19:36:33 martin Exp $");
__KERNEL_RCSID(0, "$NetBSD: pmap.c,v 1.195 2007/09/06 20:22:52 martin Exp $");
#undef NO_VCACHE /* Don't forget the locked TLB in dostart */
#define HWREF
@ -752,9 +752,9 @@ pmap_bootstrap(u_long kernelstart, u_long kernelend)
#endif
/*
* Allocate a ncpu*128KB page for the cpu_info & stack structure now.
* Allocate a ncpu*64KB page for the cpu_info & stack structure now.
*/
cpu0paddr = prom_alloc_phys(16 * PAGE_SIZE * sparc_ncpus, 8 * PAGE_SIZE);
cpu0paddr = prom_alloc_phys(8 * PAGE_SIZE * sparc_ncpus, 8 * PAGE_SIZE);
if (cpu0paddr == 0) {
prom_printf("Cannot allocate cpu_infos\n");
prom_halt();
@ -1052,9 +1052,9 @@ pmap_bootstrap(u_long kernelstart, u_long kernelend)
BDPRINTF(PDB_BOOT1,
("Inserting cpu_info into pmap_kernel() at %p\n",
cpus));
/* Now map in all 16 pages of interrupt stack/cpu_info */
/* Now map in all 8 pages of interrupt stack/cpu_info */
pa = cpu0paddr;
prom_map_phys(pa, 128*KB, vmmap, -1);
prom_map_phys(pa, 64*KB, vmmap, -1);
/*
* Also map it in as the interrupt stack.
@ -1064,8 +1064,7 @@ pmap_bootstrap(u_long kernelstart, u_long kernelend)
* before installing the locked TTE.
*/
prom_map_phys(pa, 64*KB, INTSTACK, -1);
prom_map_phys(pa + 64*KB, 64*KB, KSTACK_VA, -1);
for (i = 0; i < 16; i++) {
for (i = 0; i < 8; i++) {
int64_t data1;
data1 = TSB_DATA(0 /* global */,
@ -1084,7 +1083,7 @@ pmap_bootstrap(u_long kernelstart, u_long kernelend)
BDPRINTF(PDB_BOOT1, ("Initializing cpu_info\n"));
/* Initialize our cpu_info structure */
memset((void *)intstk, 0, 128 * KB);
memset((void *)intstk, 0, 64 * KB);
cpus->ci_self = cpus;
cpus->ci_next = NULL;
cpus->ci_curlwp = &lwp0;
@ -1102,7 +1101,7 @@ pmap_bootstrap(u_long kernelstart, u_long kernelend)
lwp0.l_md.md_tf = (struct trapframe64*)(u0va + USPACE
- sizeof(struct trapframe64));
cpu0paddr += 128 * KB;
cpu0paddr += 64 * KB;
CPUSET_CLEAR(cpus_active);
CPUSET_ADD(cpus_active, 0);
@ -2065,13 +2064,6 @@ pmap_extract(pm, va, pap)
if (pap != NULL)
*pap = pa;
return TRUE;
} else if (pm == pmap_kernel() && va >= KSTACK_VA && va < (KSTACK_VA + 64*KB)) {
pa = (paddr_t)(curcpu()->ci_paddr - KSTACK_VA + va);
DPRINTF(PDB_EXTRACT, ("pmap_extract (kstack): va=%lx pa=%llx\n",
(u_long)va, (unsigned long long)pa));
if (pap != NULL)
*pap = pa;
return TRUE;
} else {
if (pm != pmap_kernel()) {
simple_lock(&pm->pm_lock);